diff options
| author | Rahul Sharma <rahul.sharma@samsung.com> | 2013-08-29 01:37:06 -0400 |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2013-08-29 20:47:45 -0400 |
| commit | 9b229d8b04b4050938257e1f2a12860670e52e80 (patch) | |
| tree | d9ec9aaad7b24132452bb4db42c3a43db6aeba90 /drivers/clk | |
| parent | c9f3f0815909386c2dba1cdb803af5cef34ec796 (diff) | |
clk/exynos5420: add gate clock for mixer sysmmu
Adding sysmmu clock for mixer for exynos5420.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/samsung/clk-exynos5420.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index a86cadc76650..4e0c13e88569 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c | |||
| @@ -138,7 +138,7 @@ enum exynos5420_clks { | |||
| 138 | aclk300_gscl = 460, smmu_gscl0, smmu_gscl1, gscl_wa, gscl_wb, gscl0, | 138 | aclk300_gscl = 460, smmu_gscl0, smmu_gscl1, gscl_wa, gscl_wb, gscl0, |
| 139 | gscl1, clk_3aa, aclk266_g2d = 470, sss, slim_sss, mdma0, | 139 | gscl1, clk_3aa, aclk266_g2d = 470, sss, slim_sss, mdma0, |
| 140 | aclk333_g2d = 480, g2d, aclk333_432_gscl = 490, smmu_3aa, smmu_fimcl0, | 140 | aclk333_g2d = 480, g2d, aclk333_432_gscl = 490, smmu_3aa, smmu_fimcl0, |
| 141 | smmu_fimcl1, smmu_fimcl3, fimc_lite3, aclk_g3d = 500, g3d, | 141 | smmu_fimcl1, smmu_fimcl3, fimc_lite3, aclk_g3d = 500, g3d, smmu_mixer, |
| 142 | 142 | ||
| 143 | nr_clks, | 143 | nr_clks, |
| 144 | }; | 144 | }; |
| @@ -725,6 +725,7 @@ static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = { | |||
| 725 | GATE(smmu_mscl0, "smmu_mscl0", "aclk400_mscl", GATE_IP_MSCL, 8, 0, 0), | 725 | GATE(smmu_mscl0, "smmu_mscl0", "aclk400_mscl", GATE_IP_MSCL, 8, 0, 0), |
| 726 | GATE(smmu_mscl1, "smmu_mscl1", "aclk400_mscl", GATE_IP_MSCL, 9, 0, 0), | 726 | GATE(smmu_mscl1, "smmu_mscl1", "aclk400_mscl", GATE_IP_MSCL, 9, 0, 0), |
| 727 | GATE(smmu_mscl2, "smmu_mscl2", "aclk400_mscl", GATE_IP_MSCL, 10, 0, 0), | 727 | GATE(smmu_mscl2, "smmu_mscl2", "aclk400_mscl", GATE_IP_MSCL, 10, 0, 0), |
| 728 | GATE(smmu_mixer, "smmu_mixer", "aclk200_disp1", GATE_IP_DISP1, 9, 0, 0), | ||
| 728 | }; | 729 | }; |
| 729 | 730 | ||
| 730 | static struct samsung_pll_clock exynos5420_plls[nr_plls] __initdata = { | 731 | static struct samsung_pll_clock exynos5420_plls[nr_plls] __initdata = { |