diff options
author | Soren Brinkmann <soren.brinkmann@xilinx.com> | 2014-04-17 14:40:52 -0400 |
---|---|---|
committer | Michal Simek <michal.simek@xilinx.com> | 2014-04-22 07:10:18 -0400 |
commit | 9268beb5c2301b6651f0cc78734a1c0d15b3fcb1 (patch) | |
tree | f0466b0b0a258996642c4a5d6b1967de8c2cc6ed /drivers/clk/zynq | |
parent | c9eaa447e77efe77b7fa4c953bd62de8297fd6c5 (diff) |
clk: zynq: Leave debug clocks in bootup state
Make sure debug clocks stay enabled if the bootloader enabled them.
Otherwise debug HW may crash due to bus-hangs caused by stopped clocks.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/clk/zynq')
-rw-r--r-- | drivers/clk/zynq/clkc.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c index 52c09afdcfb7..246cf1226eaa 100644 --- a/drivers/clk/zynq/clkc.c +++ b/drivers/clk/zynq/clkc.c | |||
@@ -53,6 +53,9 @@ static void __iomem *zynq_clkc_base; | |||
53 | 53 | ||
54 | #define NUM_MIO_PINS 54 | 54 | #define NUM_MIO_PINS 54 |
55 | 55 | ||
56 | #define DBG_CLK_CTRL_CLKACT_TRC BIT(0) | ||
57 | #define DBG_CLK_CTRL_CPU_1XCLKACT BIT(1) | ||
58 | |||
56 | enum zynq_clk { | 59 | enum zynq_clk { |
57 | armpll, ddrpll, iopll, | 60 | armpll, ddrpll, iopll, |
58 | cpu_6or4x, cpu_3or2x, cpu_2x, cpu_1x, | 61 | cpu_6or4x, cpu_3or2x, cpu_2x, cpu_1x, |
@@ -499,6 +502,15 @@ static void __init zynq_clk_setup(struct device_node *np) | |||
499 | clk_output_name[cpu_1x], 0, SLCR_DBG_CLK_CTRL, 1, 0, | 502 | clk_output_name[cpu_1x], 0, SLCR_DBG_CLK_CTRL, 1, 0, |
500 | &dbgclk_lock); | 503 | &dbgclk_lock); |
501 | 504 | ||
505 | /* leave debug clocks in the state the bootloader set them up to */ | ||
506 | tmp = clk_readl(SLCR_DBG_CLK_CTRL); | ||
507 | if (tmp & DBG_CLK_CTRL_CLKACT_TRC) | ||
508 | if (clk_prepare_enable(clks[dbg_trc])) | ||
509 | pr_warn("%s: trace clk enable failed\n", __func__); | ||
510 | if (tmp & DBG_CLK_CTRL_CPU_1XCLKACT) | ||
511 | if (clk_prepare_enable(clks[dbg_apb])) | ||
512 | pr_warn("%s: debug APB clk enable failed\n", __func__); | ||
513 | |||
502 | /* One gated clock for all APER clocks. */ | 514 | /* One gated clock for all APER clocks. */ |
503 | clks[dma] = clk_register_gate(NULL, clk_output_name[dma], | 515 | clks[dma] = clk_register_gate(NULL, clk_output_name[dma], |
504 | clk_output_name[cpu_2x], 0, SLCR_APER_CLK_CTRL, 0, 0, | 516 | clk_output_name[cpu_2x], 0, SLCR_APER_CLK_CTRL, 0, 0, |