clk: sunxi: Fixup clk_sunxi_mmc_phase_control to take a clk rather then a hw_clk

__clk_get_hw is supposed to be used by clk providers, not clk consumers.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

1 files changed, 2 insertions, 1 deletions

diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 59f90401b900..4cc2b2a5aa75 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -510,11 +510,12 @@ CLK_OF_DECLARE(sun7i_a20_gmac, "allwinner,sun7i-a20-gmac-clk",
  * clk_sunxi_mmc_phase_control() - configures MMC clock phase control
  */
 
-void clk_sunxi_mmc_phase_control(struct clk_hw *hw, u8 sample, u8 output)
+void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output)
 {
         #define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
         #define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)
 
+        struct clk_hw *hw = __clk_get_hw(clk);
         struct clk_composite *composite = to_clk_composite(hw);
         struct clk_hw *rate_hw = composite->rate_hw;
         struct clk_factors *factors = to_clk_factors(rate_hw);