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authorRajeev Kumar <rajeev-dlh.kumar@st.com>2012-11-10 01:43:40 -0500
committerMike Turquette <mturquette@linaro.org>2012-11-21 14:45:19 -0500
commitdf2449aba4749fb8d04c3c1bbfad5cf8863c323b (patch)
tree46b967f34849952fa3c784befddd82875b237fb6 /drivers/clk/spear/spear3xx_clock.c
parent70ee65771424829fd092a1df9afcc7e24c94004b (diff)
CLK: SPEAr: Fix dev_id & con_id for multiple clocks
dev_id & con_id names of multiple clocks are incorrect. This patch fixes these names with the names that come via DT. Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Bhavna Yadav <bhavna.yadav@st.com> Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/spear/spear3xx_clock.c')
-rw-r--r--drivers/clk/spear/spear3xx_clock.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c
index 59049cf81a74..417f93734612 100644
--- a/drivers/clk/spear/spear3xx_clock.c
+++ b/drivers/clk/spear/spear3xx_clock.c
@@ -255,7 +255,7 @@ static void __init spear320_clk_init(void)
255 255
256 clk = clk_register_fixed_factor(NULL, "pwm_clk", "ras_ahb_clk", 0, 1, 256 clk = clk_register_fixed_factor(NULL, "pwm_clk", "ras_ahb_clk", 0, 1,
257 1); 257 1);
258 clk_register_clkdev(clk, "pwm", NULL); 258 clk_register_clkdev(clk, NULL, "a8000000.pwm");
259 259
260 clk = clk_register_fixed_factor(NULL, "ssp1_clk", "ras_ahb_clk", 0, 1, 260 clk = clk_register_fixed_factor(NULL, "ssp1_clk", "ras_ahb_clk", 0, 1,
261 1); 261 1);
@@ -275,7 +275,7 @@ static void __init spear320_clk_init(void)
275 275
276 clk = clk_register_fixed_factor(NULL, "i2s_clk", "ras_apb_clk", 0, 1, 276 clk = clk_register_fixed_factor(NULL, "i2s_clk", "ras_apb_clk", 0, 1,
277 1); 277 1);
278 clk_register_clkdev(clk, NULL, "i2s"); 278 clk_register_clkdev(clk, NULL, "a9400000.i2s");
279 279
280 clk = clk_register_mux(NULL, "i2s_ref_clk", i2s_ref_parents, 280 clk = clk_register_mux(NULL, "i2s_ref_clk", i2s_ref_parents,
281 ARRAY_SIZE(i2s_ref_parents), 0, SPEAR320_CONTROL_REG, 281 ARRAY_SIZE(i2s_ref_parents), 0, SPEAR320_CONTROL_REG,
@@ -486,7 +486,9 @@ void __init spear3xx_clk_init(void)
486 /* clock derived from pll3 clk */ 486 /* clock derived from pll3 clk */
487 clk = clk_register_gate(NULL, "usbh_clk", "pll3_clk", 0, PERIP1_CLK_ENB, 487 clk = clk_register_gate(NULL, "usbh_clk", "pll3_clk", 0, PERIP1_CLK_ENB,
488 USBH_CLK_ENB, 0, &_lock); 488 USBH_CLK_ENB, 0, &_lock);
489 clk_register_clkdev(clk, "usbh_clk", NULL); 489 clk_register_clkdev(clk, NULL, "e1800000.ehci");
490 clk_register_clkdev(clk, NULL, "e1900000.ohci");
491 clk_register_clkdev(clk, NULL, "e2100000.ohci");
490 492
491 clk = clk_register_fixed_factor(NULL, "usbh.0_clk", "usbh_clk", 0, 1, 493 clk = clk_register_fixed_factor(NULL, "usbh.0_clk", "usbh_clk", 0, 1,
492 1); 494 1);
@@ -498,7 +500,7 @@ void __init spear3xx_clk_init(void)
498 500
499 clk = clk_register_gate(NULL, "usbd_clk", "pll3_clk", 0, PERIP1_CLK_ENB, 501 clk = clk_register_gate(NULL, "usbd_clk", "pll3_clk", 0, PERIP1_CLK_ENB,
500 USBD_CLK_ENB, 0, &_lock); 502 USBD_CLK_ENB, 0, &_lock);
501 clk_register_clkdev(clk, NULL, "designware_udc"); 503 clk_register_clkdev(clk, NULL, "e1100000.usbd");
502 504
503 /* clock derived from ahb clk */ 505 /* clock derived from ahb clk */
504 clk = clk_register_fixed_factor(NULL, "ahbmult2_clk", "ahb_clk", 0, 2, 506 clk = clk_register_fixed_factor(NULL, "ahbmult2_clk", "ahb_clk", 0, 2,
@@ -546,7 +548,7 @@ void __init spear3xx_clk_init(void)
546 /* clock derived from apb clk */ 548 /* clock derived from apb clk */
547 clk = clk_register_gate(NULL, "adc_clk", "apb_clk", 0, PERIP1_CLK_ENB, 549 clk = clk_register_gate(NULL, "adc_clk", "apb_clk", 0, PERIP1_CLK_ENB,
548 ADC_CLK_ENB, 0, &_lock); 550 ADC_CLK_ENB, 0, &_lock);
549 clk_register_clkdev(clk, NULL, "adc"); 551 clk_register_clkdev(clk, NULL, "d0080000.adc");
550 552
551 clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0, PERIP1_CLK_ENB, 553 clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0, PERIP1_CLK_ENB,
552 GPIO_CLK_ENB, 0, &_lock); 554 GPIO_CLK_ENB, 0, &_lock);