clk: samsung: exynos5420: Fix VPLL lock offset

Set it as per the user manual.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index a8704540a214..676a0bdabba0 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -34,7 +34,7 @@
 #define RPLL_LOCK               0x10050
 #define IPLL_LOCK               0x10060
 #define SPLL_LOCK               0x10070
-#define VPLL_LOCK               0x10070
+#define VPLL_LOCK               0x10080
 #define MPLL_LOCK               0x10090
 #define CPLL_CON0               0x10120
 #define DPLL_CON0               0x10128