Merge tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux

Pull clock driver fixes from Mike Turquette:
 "This batch of fixes is for a handful of clock drivers from Allwinner,
  Samsung, ST & TI.  Most of them are of the "this hardware won't work
  without this fix" variety, including patches that fix platforms that
  did not boot under certain configurations.  Other fixes are the result
  of changes to the clock core introduced in 3.15 that had subtle
  impacts on the clock drivers.

  There are no fixes to the clock framework core in this pull request"

* tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux:
  clk: spear3xx: Set proper clock parent of uart1/2
  clk: spear3xx: Use proper control register offset
  clk: qcom: HDMI source sel is 3 not 2
  clk: sunxi: fix devm_ioremap_resource error detection code
  clk: s2mps11: Fix double free corruption during driver unbind
  clk: ti: am43x: Fix boot with CONFIG_SOC_AM33XX disabled
  clk: exynos5420: Remove aclk66_peric from the clock tree description
  clk/exynos5250: fix bit number for tv sysmmu clock
  clk: s3c64xx: Hookup SPI clocks correctly
  clk: samsung: exynos4: Remove SRC_MASK_ISP gates
  clk: samsung: add more aliases for s3c24xx
  clk: samsung: fix several typos to fix boot on s3c2410
  clk: ti: set CLK_SET_RATE_NO_REPARENT for ti,mux-clock
  clk: ti: am43x: Fix boot with CONFIG_SOC_AM33XX disabled
  clk: ti: dra7: return error code in failure case
  clk: ti: apll: not allocating enough data

5 files changed, 71 insertions, 47 deletions

diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index 4f150c9dd38c..7f4a473a7ad7 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -925,21 +925,13 @@ static struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = {
         GATE(CLK_RTC, "rtc", "aclk100", E4X12_GATE_IP_PERIR, 15,
                         0, 0),
         GATE(CLK_KEYIF, "keyif", "aclk100", E4X12_GATE_IP_PERIR, 16, 0, 0),
-        GATE(CLK_SCLK_PWM_ISP, "sclk_pwm_isp", "div_pwm_isp",
-                        E4X12_SRC_MASK_ISP, 0, CLK_SET_RATE_PARENT, 0),
-        GATE(CLK_SCLK_SPI0_ISP, "sclk_spi0_isp", "div_spi0_isp_pre",
-                        E4X12_SRC_MASK_ISP, 4, CLK_SET_RATE_PARENT, 0),
-        GATE(CLK_SCLK_SPI1_ISP, "sclk_spi1_isp", "div_spi1_isp_pre",
-                        E4X12_SRC_MASK_ISP, 8, CLK_SET_RATE_PARENT, 0),
-        GATE(CLK_SCLK_UART_ISP, "sclk_uart_isp", "div_uart_isp",
-                        E4X12_SRC_MASK_ISP, 12, CLK_SET_RATE_PARENT, 0),
-        GATE(CLK_PWM_ISP_SCLK, "pwm_isp_sclk", "sclk_pwm_isp",
+        GATE(CLK_PWM_ISP_SCLK, "pwm_isp_sclk", "div_pwm_isp",
                         E4X12_GATE_IP_ISP, 0, 0, 0),
-        GATE(CLK_SPI0_ISP_SCLK, "spi0_isp_sclk", "sclk_spi0_isp",
+        GATE(CLK_SPI0_ISP_SCLK, "spi0_isp_sclk", "div_spi0_isp_pre",
                         E4X12_GATE_IP_ISP, 1, 0, 0),
-        GATE(CLK_SPI1_ISP_SCLK, "spi1_isp_sclk", "sclk_spi1_isp",
+        GATE(CLK_SPI1_ISP_SCLK, "spi1_isp_sclk", "div_spi1_isp_pre",
                         E4X12_GATE_IP_ISP, 2, 0, 0),
-        GATE(CLK_UART_ISP_SCLK, "uart_isp_sclk", "sclk_uart_isp",
+        GATE(CLK_UART_ISP_SCLK, "uart_isp_sclk", "div_uart_isp",
                         E4X12_GATE_IP_ISP, 3, 0, 0),
         GATE(CLK_WDT, "watchdog", "aclk100", E4X12_GATE_IP_PERIR, 14, 0, 0),
         GATE(CLK_PCM0, "pcm0", "aclk100", E4X12_GATE_IP_MAUDIO, 2,
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index 1fad4c5e3f5d..184f64293b26 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -661,7 +661,7 @@ static struct samsung_gate_clock exynos5250_gate_clks[] __initdata = {
         GATE(CLK_RTC, "rtc", "div_aclk66", GATE_IP_PERIS, 20, 0, 0),
         GATE(CLK_TMU, "tmu", "div_aclk66", GATE_IP_PERIS, 21, 0, 0),
         GATE(CLK_SMMU_TV, "smmu_tv", "mout_aclk200_disp1_sub",
-                        GATE_IP_DISP1, 2, 0, 0),
+                        GATE_IP_DISP1, 9, 0, 0),
         GATE(CLK_SMMU_FIMD1, "smmu_fimd1", "mout_aclk200_disp1_sub",
                         GATE_IP_DISP1, 8, 0, 0),
         GATE(CLK_SMMU_2D, "smmu_2d", "div_aclk200", GATE_IP_ACP, 7, 0, 0),
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index f74f882f7f29..a4e6cc782e5c 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -892,8 +892,6 @@ static struct samsung_gate_clock exynos5x_gate_clks[] __initdata = {
                         GATE_BUS_TOP, 9, CLK_IGNORE_UNUSED, 0),
         GATE(0, "aclk66_psgen", "mout_user_aclk66_psgen",
                         GATE_BUS_TOP, 10, CLK_IGNORE_UNUSED, 0),
-        GATE(CLK_ACLK66_PERIC, "aclk66_peric", "mout_user_aclk66_peric",
-                        GATE_BUS_TOP, 11, CLK_IGNORE_UNUSED, 0),
         GATE(0, "aclk266_isp", "mout_user_aclk266_isp",
                         GATE_BUS_TOP, 13, 0, 0),
         GATE(0, "aclk166", "mout_user_aclk166",
@@ -996,34 +994,61 @@ static struct samsung_gate_clock exynos5x_gate_clks[] __initdata = {
                         SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0),
 
         /* PERIC Block */
-        GATE(CLK_UART0, "uart0", "aclk66_peric", GATE_IP_PERIC, 0, 0, 0),
-        GATE(CLK_UART1, "uart1", "aclk66_peric", GATE_IP_PERIC, 1, 0, 0),
-        GATE(CLK_UART2, "uart2", "aclk66_peric", GATE_IP_PERIC, 2, 0, 0),
-        GATE(CLK_UART3, "uart3", "aclk66_peric", GATE_IP_PERIC, 3, 0, 0),
-        GATE(CLK_I2C0, "i2c0", "aclk66_peric", GATE_IP_PERIC, 6, 0, 0),
-        GATE(CLK_I2C1, "i2c1", "aclk66_peric", GATE_IP_PERIC, 7, 0, 0),
-        GATE(CLK_I2C2, "i2c2", "aclk66_peric", GATE_IP_PERIC, 8, 0, 0),
-        GATE(CLK_I2C3, "i2c3", "aclk66_peric", GATE_IP_PERIC, 9, 0, 0),
-        GATE(CLK_USI0, "usi0", "aclk66_peric", GATE_IP_PERIC, 10, 0, 0),
-        GATE(CLK_USI1, "usi1", "aclk66_peric", GATE_IP_PERIC, 11, 0, 0),
-        GATE(CLK_USI2, "usi2", "aclk66_peric", GATE_IP_PERIC, 12, 0, 0),
-        GATE(CLK_USI3, "usi3", "aclk66_peric", GATE_IP_PERIC, 13, 0, 0),
-        GATE(CLK_I2C_HDMI, "i2c_hdmi", "aclk66_peric", GATE_IP_PERIC, 14, 0, 0),
-        GATE(CLK_TSADC, "tsadc", "aclk66_peric", GATE_IP_PERIC, 15, 0, 0),
-        GATE(CLK_SPI0, "spi0", "aclk66_peric", GATE_IP_PERIC, 16, 0, 0),
-        GATE(CLK_SPI1, "spi1", "aclk66_peric", GATE_IP_PERIC, 17, 0, 0),
-        GATE(CLK_SPI2, "spi2", "aclk66_peric", GATE_IP_PERIC, 18, 0, 0),
-        GATE(CLK_I2S1, "i2s1", "aclk66_peric", GATE_IP_PERIC, 20, 0, 0),
-        GATE(CLK_I2S2, "i2s2", "aclk66_peric", GATE_IP_PERIC, 21, 0, 0),
-        GATE(CLK_PCM1, "pcm1", "aclk66_peric", GATE_IP_PERIC, 22, 0, 0),
-        GATE(CLK_PCM2, "pcm2", "aclk66_peric", GATE_IP_PERIC, 23, 0, 0),
-        GATE(CLK_PWM, "pwm", "aclk66_peric", GATE_IP_PERIC, 24, 0, 0),
-        GATE(CLK_SPDIF, "spdif", "aclk66_peric", GATE_IP_PERIC, 26, 0, 0),
-        GATE(CLK_USI4, "usi4", "aclk66_peric", GATE_IP_PERIC, 28, 0, 0),
-        GATE(CLK_USI5, "usi5", "aclk66_peric", GATE_IP_PERIC, 30, 0, 0),
-        GATE(CLK_USI6, "usi6", "aclk66_peric", GATE_IP_PERIC, 31, 0, 0),
-
-        GATE(CLK_KEYIF, "keyif", "aclk66_peric", GATE_BUS_PERIC, 22, 0, 0),
+        GATE(CLK_UART0, "uart0", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 0, 0, 0),
+        GATE(CLK_UART1, "uart1", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 1, 0, 0),
+        GATE(CLK_UART2, "uart2", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 2, 0, 0),
+        GATE(CLK_UART3, "uart3", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 3, 0, 0),
+        GATE(CLK_I2C0, "i2c0", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 6, 0, 0),
+        GATE(CLK_I2C1, "i2c1", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 7, 0, 0),
+        GATE(CLK_I2C2, "i2c2", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 8, 0, 0),
+        GATE(CLK_I2C3, "i2c3", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 9, 0, 0),
+        GATE(CLK_USI0, "usi0", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 10, 0, 0),
+        GATE(CLK_USI1, "usi1", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 11, 0, 0),
+        GATE(CLK_USI2, "usi2", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 12, 0, 0),
+        GATE(CLK_USI3, "usi3", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 13, 0, 0),
+        GATE(CLK_I2C_HDMI, "i2c_hdmi", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 14, 0, 0),
+        GATE(CLK_TSADC, "tsadc", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 15, 0, 0),
+        GATE(CLK_SPI0, "spi0", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 16, 0, 0),
+        GATE(CLK_SPI1, "spi1", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 17, 0, 0),
+        GATE(CLK_SPI2, "spi2", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 18, 0, 0),
+        GATE(CLK_I2S1, "i2s1", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 20, 0, 0),
+        GATE(CLK_I2S2, "i2s2", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 21, 0, 0),
+        GATE(CLK_PCM1, "pcm1", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 22, 0, 0),
+        GATE(CLK_PCM2, "pcm2", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 23, 0, 0),
+        GATE(CLK_PWM, "pwm", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 24, 0, 0),
+        GATE(CLK_SPDIF, "spdif", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 26, 0, 0),
+        GATE(CLK_USI4, "usi4", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 28, 0, 0),
+        GATE(CLK_USI5, "usi5", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 30, 0, 0),
+        GATE(CLK_USI6, "usi6", "mout_user_aclk66_peric",
+                        GATE_IP_PERIC, 31, 0, 0),
+
+        GATE(CLK_KEYIF, "keyif", "mout_user_aclk66_peric",
+                        GATE_BUS_PERIC, 22, 0, 0),
 
         /* PERIS Block */
         GATE(CLK_CHIPID, "chipid", "aclk66_psgen",
diff --git a/drivers/clk/samsung/clk-s3c2410.c b/drivers/clk/samsung/clk-s3c2410.c
index ba0716801db2..140f4733c02e 100644
--- a/drivers/clk/samsung/clk-s3c2410.c
+++ b/drivers/clk/samsung/clk-s3c2410.c
@@ -152,6 +152,11 @@ struct samsung_clock_alias s3c2410_common_aliases[] __initdata = {
         ALIAS(HCLK, NULL, "hclk"),
         ALIAS(MPLL, NULL, "mpll"),
         ALIAS(FCLK, NULL, "fclk"),
+        ALIAS(PCLK, NULL, "watchdog"),
+        ALIAS(PCLK_SDI, NULL, "sdi"),
+        ALIAS(HCLK_NAND, NULL, "nand"),
+        ALIAS(PCLK_I2S, NULL, "iis"),
+        ALIAS(PCLK_I2C, NULL, "i2c"),
 };
 
 /* S3C2410 specific clocks */
@@ -378,7 +383,7 @@ void __init s3c2410_common_clk_init(struct device_node *np, unsigned long xti_f,
         if (!np)
                 s3c2410_common_clk_register_fixed_ext(ctx, xti_f);
 
-        if (current_soc == 2410) {
+        if (current_soc == S3C2410) {
                 if (_get_rate("xti") == 12 * MHZ) {
                         s3c2410_plls[mpll].rate_table = pll_s3c2410_12mhz_tbl;
                         s3c2410_plls[upll].rate_table = pll_s3c2410_12mhz_tbl;
@@ -432,7 +437,7 @@ void __init s3c2410_common_clk_init(struct device_node *np, unsigned long xti_f,
                 samsung_clk_register_fixed_factor(ctx, s3c2410_ffactor,
                                 ARRAY_SIZE(s3c2410_ffactor));
                 samsung_clk_register_alias(ctx, s3c2410_aliases,
-                        ARRAY_SIZE(s3c2410_common_aliases));
+                        ARRAY_SIZE(s3c2410_aliases));
                 break;
         case S3C2440:
                 samsung_clk_register_mux(ctx, s3c2440_muxes,
diff --git a/drivers/clk/samsung/clk-s3c64xx.c b/drivers/clk/samsung/clk-s3c64xx.c
index efa16ee592c8..8889ff1c10fc 100644
--- a/drivers/clk/samsung/clk-s3c64xx.c
+++ b/drivers/clk/samsung/clk-s3c64xx.c
@@ -418,8 +418,10 @@ static struct samsung_clock_alias s3c64xx_clock_aliases[] = {
         ALIAS(SCLK_MMC2, "s3c-sdhci.2", "mmc_busclk.2"),
         ALIAS(SCLK_MMC1, "s3c-sdhci.1", "mmc_busclk.2"),
         ALIAS(SCLK_MMC0, "s3c-sdhci.0", "mmc_busclk.2"),
-        ALIAS(SCLK_SPI1, "s3c6410-spi.1", "spi-bus"),
-        ALIAS(SCLK_SPI0, "s3c6410-spi.0", "spi-bus"),
+        ALIAS(PCLK_SPI1, "s3c6410-spi.1", "spi_busclk0"),
+        ALIAS(SCLK_SPI1, "s3c6410-spi.1", "spi_busclk2"),
+        ALIAS(PCLK_SPI0, "s3c6410-spi.0", "spi_busclk0"),
+        ALIAS(SCLK_SPI0, "s3c6410-spi.0", "spi_busclk2"),
         ALIAS(SCLK_AUDIO1, "samsung-pcm.1", "audio-bus"),
         ALIAS(SCLK_AUDIO1, "samsung-i2s.1", "audio-bus"),
         ALIAS(SCLK_AUDIO0, "samsung-pcm.0", "audio-bus"),