diff options
| author | Rahul Sharma <rahul.sharma@samsung.com> | 2014-03-12 10:56:44 -0400 |
|---|---|---|
| committer | Tomasz Figa <t.figa@samsung.com> | 2014-05-14 13:15:38 -0400 |
| commit | 976face4b46ab36b04312b4e404d160296716d46 (patch) | |
| tree | 69952ba0f302faf76209e1e6da0aa8ceb32b97b3 /drivers/clk/samsung/clk-pll.c | |
| parent | 2916f9a2c6d9200b4c840a613cd1fa1dad04240f (diff) | |
clk/samsung: add support for multiple clock providers
Samsung CCF helper functions do not provide support to
register multiple Clock Providers for a given SoC. Due to
this limitation, SoC platforms are not able to use these
helpers for registering multiple clock providers and are
forced to bypass this layer.
This layer is modified accordingly to enable the support
for multiple clock providers.
Clock file for exynos4, exynos5250, exynos5420, exynos5440,
S3c64xx, S3c24xx are also modified as per changed helper functions.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
[t.figa: Modified s3c2410 clock driver as well]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'drivers/clk/samsung/clk-pll.c')
| -rw-r--r-- | drivers/clk/samsung/clk-pll.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c index 7fb0a28e65d5..1f310be17742 100644 --- a/drivers/clk/samsung/clk-pll.c +++ b/drivers/clk/samsung/clk-pll.c | |||
| @@ -947,8 +947,9 @@ struct clk * __init samsung_clk_register_pll2550x(const char *name, | |||
| 947 | return clk; | 947 | return clk; |
| 948 | } | 948 | } |
| 949 | 949 | ||
| 950 | static void __init _samsung_clk_register_pll(struct samsung_pll_clock *pll_clk, | 950 | static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx, |
| 951 | void __iomem *base) | 951 | struct samsung_pll_clock *pll_clk, |
| 952 | void __iomem *base) | ||
| 952 | { | 953 | { |
| 953 | struct samsung_clk_pll *pll; | 954 | struct samsung_clk_pll *pll; |
| 954 | struct clk *clk; | 955 | struct clk *clk; |
| @@ -1066,7 +1067,7 @@ static void __init _samsung_clk_register_pll(struct samsung_pll_clock *pll_clk, | |||
| 1066 | return; | 1067 | return; |
| 1067 | } | 1068 | } |
| 1068 | 1069 | ||
| 1069 | samsung_clk_add_lookup(clk, pll_clk->id); | 1070 | samsung_clk_add_lookup(ctx, clk, pll_clk->id); |
| 1070 | 1071 | ||
| 1071 | if (!pll_clk->alias) | 1072 | if (!pll_clk->alias) |
| 1072 | return; | 1073 | return; |
| @@ -1077,11 +1078,12 @@ static void __init _samsung_clk_register_pll(struct samsung_pll_clock *pll_clk, | |||
| 1077 | __func__, pll_clk->name, ret); | 1078 | __func__, pll_clk->name, ret); |
| 1078 | } | 1079 | } |
| 1079 | 1080 | ||
| 1080 | void __init samsung_clk_register_pll(struct samsung_pll_clock *pll_list, | 1081 | void __init samsung_clk_register_pll(struct samsung_clk_provider *ctx, |
| 1081 | unsigned int nr_pll, void __iomem *base) | 1082 | struct samsung_pll_clock *pll_list, |
| 1083 | unsigned int nr_pll, void __iomem *base) | ||
| 1082 | { | 1084 | { |
| 1083 | int cnt; | 1085 | int cnt; |
| 1084 | 1086 | ||
| 1085 | for (cnt = 0; cnt < nr_pll; cnt++) | 1087 | for (cnt = 0; cnt < nr_pll; cnt++) |
| 1086 | _samsung_clk_register_pll(&pll_list[cnt], base); | 1088 | _samsung_clk_register_pll(ctx, &pll_list[cnt], base); |
| 1087 | } | 1089 | } |