diff options
author | Jens Axboe <axboe@kernel.dk> | 2013-07-02 02:31:48 -0400 |
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committer | Jens Axboe <axboe@kernel.dk> | 2013-07-02 02:31:48 -0400 |
commit | 5f0e5afa0de4522abb3ea7d1369039b94e740ec5 (patch) | |
tree | 6a5be3db9ecfed8ef2150c6146f6d1e0d658ac8b /drivers/clk/samsung/clk-exynos5250.c | |
parent | d752b2696072ed52fd5afab08b601e2220a3b87e (diff) | |
parent | 9e895ace5d82df8929b16f58e9f515f6d54ab82d (diff) |
Merge tag 'v3.10-rc7' into for-3.11/drivers
Linux 3.10-rc7
Pull this in early to avoid doing it with the bcache merge,
since there are a number of changes to bcache between my old
base (3.10-rc1) and the new pull request.
Diffstat (limited to 'drivers/clk/samsung/clk-exynos5250.c')
-rw-r--r-- | drivers/clk/samsung/clk-exynos5250.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 5c97e75924a8..22d7699e7ced 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c | |||
@@ -155,7 +155,7 @@ static __initdata unsigned long exynos5250_clk_regs[] = { | |||
155 | 155 | ||
156 | /* list of all parent clock list */ | 156 | /* list of all parent clock list */ |
157 | PNAME(mout_apll_p) = { "fin_pll", "fout_apll", }; | 157 | PNAME(mout_apll_p) = { "fin_pll", "fout_apll", }; |
158 | PNAME(mout_cpu_p) = { "mout_apll", "mout_mpll", }; | 158 | PNAME(mout_cpu_p) = { "mout_apll", "sclk_mpll", }; |
159 | PNAME(mout_mpll_fout_p) = { "fout_mplldiv2", "fout_mpll" }; | 159 | PNAME(mout_mpll_fout_p) = { "fout_mplldiv2", "fout_mpll" }; |
160 | PNAME(mout_mpll_p) = { "fin_pll", "mout_mpll_fout" }; | 160 | PNAME(mout_mpll_p) = { "fin_pll", "mout_mpll_fout" }; |
161 | PNAME(mout_bpll_fout_p) = { "fout_bplldiv2", "fout_bpll" }; | 161 | PNAME(mout_bpll_fout_p) = { "fout_bplldiv2", "fout_bpll" }; |
@@ -208,10 +208,10 @@ struct samsung_fixed_factor_clock exynos5250_fixed_factor_clks[] __initdata = { | |||
208 | }; | 208 | }; |
209 | 209 | ||
210 | struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { | 210 | struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { |
211 | MUX(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1), | 211 | MUX_A(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, "mout_apll"), |
212 | MUX(none, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1), | 212 | MUX_A(none, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1, "mout_cpu"), |
213 | MUX(none, "mout_mpll_fout", mout_mpll_fout_p, PLL_DIV2_SEL, 4, 1), | 213 | MUX(none, "mout_mpll_fout", mout_mpll_fout_p, PLL_DIV2_SEL, 4, 1), |
214 | MUX(none, "sclk_mpll", mout_mpll_p, SRC_CORE1, 8, 1), | 214 | MUX_A(none, "sclk_mpll", mout_mpll_p, SRC_CORE1, 8, 1, "mout_mpll"), |
215 | MUX(none, "mout_bpll_fout", mout_bpll_fout_p, PLL_DIV2_SEL, 0, 1), | 215 | MUX(none, "mout_bpll_fout", mout_bpll_fout_p, PLL_DIV2_SEL, 0, 1), |
216 | MUX(none, "sclk_bpll", mout_bpll_p, SRC_CDREX, 0, 1), | 216 | MUX(none, "sclk_bpll", mout_bpll_p, SRC_CDREX, 0, 1), |
217 | MUX(none, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP2, 0, 1), | 217 | MUX(none, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP2, 0, 1), |
@@ -378,7 +378,7 @@ struct samsung_gate_clock exynos5250_gate_clks[] __initdata = { | |||
378 | GATE(hsi2c3, "hsi2c3", "aclk66", GATE_IP_PERIC, 31, 0, 0), | 378 | GATE(hsi2c3, "hsi2c3", "aclk66", GATE_IP_PERIC, 31, 0, 0), |
379 | GATE(chipid, "chipid", "aclk66", GATE_IP_PERIS, 0, 0, 0), | 379 | GATE(chipid, "chipid", "aclk66", GATE_IP_PERIS, 0, 0, 0), |
380 | GATE(sysreg, "sysreg", "aclk66", GATE_IP_PERIS, 1, 0, 0), | 380 | GATE(sysreg, "sysreg", "aclk66", GATE_IP_PERIS, 1, 0, 0), |
381 | GATE(pmu, "pmu", "aclk66", GATE_IP_PERIS, 2, 0, 0), | 381 | GATE(pmu, "pmu", "aclk66", GATE_IP_PERIS, 2, CLK_IGNORE_UNUSED, 0), |
382 | GATE(tzpc0, "tzpc0", "aclk66", GATE_IP_PERIS, 6, 0, 0), | 382 | GATE(tzpc0, "tzpc0", "aclk66", GATE_IP_PERIS, 6, 0, 0), |
383 | GATE(tzpc1, "tzpc1", "aclk66", GATE_IP_PERIS, 7, 0, 0), | 383 | GATE(tzpc1, "tzpc1", "aclk66", GATE_IP_PERIS, 7, 0, 0), |
384 | GATE(tzpc2, "tzpc2", "aclk66", GATE_IP_PERIS, 8, 0, 0), | 384 | GATE(tzpc2, "tzpc2", "aclk66", GATE_IP_PERIS, 8, 0, 0), |