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authorLinus Torvalds <torvalds@linux-foundation.org>2013-05-02 12:03:55 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-05-02 12:03:55 -0400
commita7726350e06401929eac0aa0677a5467106565fc (patch)
treee189513e5014bdfccd73a3af731a6b57733743fa /drivers/clk/mxs/clk-imx23.c
parent4d26aa305414dbb33b3c32fb205b68004cda8ffc (diff)
parentafcf7924ecab726dab0227188783c4a40d9f0eec (diff)
Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanup from Olof Johansson: "Here is a collection of cleanup patches. Among the pieces that stand out are: - The deletion of h720x platforms - Split of at91 non-dt platforms to their own Kconfig file to keep them separate - General cleanups and refactoring of i.MX and MXS platforms - Some restructuring of clock tables for OMAP - Convertion of PMC driver for Tegra to dt-only - Some renames of sunxi -> sun4i (Allwinner A10) - ... plus a bunch of other stuff that I haven't mentioned" * tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits) ARM: i.MX: remove unused ARCH_* configs ARM i.MX53: remove platform ahci support ARM: sunxi: Rework the restart code irqchip: sunxi: Rename sunxi to sun4i irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro clocksource: sunxi: Rename sunxi to sun4i clocksource: sunxi: make use of CLKSRC_OF clocksource: sunxi: Cleanup the timer code ARM: at91: remove trailing semicolon from macros ARM: at91/setup: fix trivial typos ARM: EXYNOS: remove "config EXYNOS_DEV_DRM" ARM: EXYNOS: change the name of USB ohci header ARM: SAMSUNG: Remove unnecessary code for dma ARM: S3C24XX: Remove unused GPIO drive strength register definitions ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2412 ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2410 ARM: S3C24XX: Removed unneeded dependency on ARCH_S3C24XX for boards ARM: SAMSUNG: Fix typo "CONFIG_SAMSUNG_DEV_RTC" ARM: S5P64X0: Fix typo "CONFIG_S5P64X0_SETUP_SDHCI" ...
Diffstat (limited to 'drivers/clk/mxs/clk-imx23.c')
-rw-r--r--drivers/clk/mxs/clk-imx23.c42
1 files changed, 23 insertions, 19 deletions
diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c
index b5c06f9766f6..f6a74872f14e 100644
--- a/drivers/clk/mxs/clk-imx23.c
+++ b/drivers/clk/mxs/clk-imx23.c
@@ -15,12 +15,15 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/of.h> 17#include <linux/of.h>
18#include <mach/common.h> 18#include <linux/of_address.h>
19#include <mach/mx23.h>
20#include "clk.h" 19#include "clk.h"
21 20
22#define DIGCTRL MX23_IO_ADDRESS(MX23_DIGCTL_BASE_ADDR) 21static void __iomem *clkctrl;
23#define CLKCTRL MX23_IO_ADDRESS(MX23_CLKCTRL_BASE_ADDR) 22static void __iomem *digctrl;
23
24#define CLKCTRL clkctrl
25#define DIGCTRL digctrl
26
24#define PLLCTRL0 (CLKCTRL + 0x0000) 27#define PLLCTRL0 (CLKCTRL + 0x0000)
25#define CPU (CLKCTRL + 0x0020) 28#define CPU (CLKCTRL + 0x0020)
26#define HBUS (CLKCTRL + 0x0030) 29#define HBUS (CLKCTRL + 0x0030)
@@ -48,10 +51,10 @@ static void __init clk_misc_init(void)
48 u32 val; 51 u32 val;
49 52
50 /* Gate off cpu clock in WFI for power saving */ 53 /* Gate off cpu clock in WFI for power saving */
51 __mxs_setl(1 << BP_CPU_INTERRUPT_WAIT, CPU); 54 writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET);
52 55
53 /* Clear BYPASS for SAIF */ 56 /* Clear BYPASS for SAIF */
54 __mxs_clrl(1 << BP_CLKSEQ_BYPASS_SAIF, CLKSEQ); 57 writel_relaxed(1 << BP_CLKSEQ_BYPASS_SAIF, CLKSEQ + CLR);
55 58
56 /* SAIF has to use frac div for functional operation */ 59 /* SAIF has to use frac div for functional operation */
57 val = readl_relaxed(SAIF); 60 val = readl_relaxed(SAIF);
@@ -62,14 +65,14 @@ static void __init clk_misc_init(void)
62 * Source ssp clock from ref_io than ref_xtal, 65 * Source ssp clock from ref_io than ref_xtal,
63 * as ref_xtal only provides 24 MHz as maximum. 66 * as ref_xtal only provides 24 MHz as maximum.
64 */ 67 */
65 __mxs_clrl(1 << BP_CLKSEQ_BYPASS_SSP, CLKSEQ); 68 writel_relaxed(1 << BP_CLKSEQ_BYPASS_SSP, CLKSEQ + CLR);
66 69
67 /* 70 /*
68 * 480 MHz seems too high to be ssp clock source directly, 71 * 480 MHz seems too high to be ssp clock source directly,
69 * so set frac to get a 288 MHz ref_io. 72 * so set frac to get a 288 MHz ref_io.
70 */ 73 */
71 __mxs_clrl(0x3f << BP_FRAC_IOFRAC, FRAC); 74 writel_relaxed(0x3f << BP_FRAC_IOFRAC, FRAC + CLR);
72 __mxs_setl(30 << BP_FRAC_IOFRAC, FRAC); 75 writel_relaxed(30 << BP_FRAC_IOFRAC, FRAC + SET);
73} 76}
74 77
75static const char *sel_pll[] __initconst = { "pll", "ref_xtal", }; 78static const char *sel_pll[] __initconst = { "pll", "ref_xtal", };
@@ -101,6 +104,14 @@ int __init mx23_clocks_init(void)
101 struct device_node *np; 104 struct device_node *np;
102 u32 i; 105 u32 i;
103 106
107 np = of_find_compatible_node(NULL, NULL, "fsl,imx23-digctl");
108 digctrl = of_iomap(np, 0);
109 WARN_ON(!digctrl);
110
111 np = of_find_compatible_node(NULL, NULL, "fsl,imx23-clkctrl");
112 clkctrl = of_iomap(np, 0);
113 WARN_ON(!clkctrl);
114
104 clk_misc_init(); 115 clk_misc_init();
105 116
106 clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000); 117 clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000);
@@ -153,19 +164,12 @@ int __init mx23_clocks_init(void)
153 return PTR_ERR(clks[i]); 164 return PTR_ERR(clks[i]);
154 } 165 }
155 166
156 np = of_find_compatible_node(NULL, NULL, "fsl,imx23-clkctrl"); 167 clk_data.clks = clks;
157 if (np) { 168 clk_data.clk_num = ARRAY_SIZE(clks);
158 clk_data.clks = clks; 169 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
159 clk_data.clk_num = ARRAY_SIZE(clks);
160 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
161 }
162
163 clk_register_clkdev(clks[clk32k], NULL, "timrot");
164 170
165 for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) 171 for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
166 clk_prepare_enable(clks[clks_init_on[i]]); 172 clk_prepare_enable(clks[clks_init_on[i]]);
167 173
168 mxs_timer_init();
169
170 return 0; 174 return 0;
171} 175}