drm/i915: add Haswell devices and their PCI IDs

This adds product definitions for desktop, mobile and server boards.

v2: split into a separate patch, add .has_pch_split feature.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

2 files changed, 25 insertions, 0 deletions

diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
index 41d9ee15d465..0b0710143699 100644
--- a/drivers/char/agp/intel-agp.h
+++ b/drivers/char/agp/intel-agp.h
@@ -237,6 +237,17 @@
 #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT1_IG          0x015A
 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_HB               0x0F00 /* VLV1 */
 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IG               0x0F30
+#define PCI_DEVICE_ID_INTEL_HASWELL_HB                          0x0400 /* Desktop */
+#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG            0x0402
+#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG            0x0412
+#define PCI_DEVICE_ID_INTEL_HASWELL_M_HB                        0x0404 /* Mobile */
+#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG            0x0406
+#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG            0x0416
+#define PCI_DEVICE_ID_INTEL_HASWELL_S_HB                        0x0408 /* Server */
+#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG            0x040a
+#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG            0x041a
+#define PCI_DEVICE_ID_INTEL_HASWELL_SDV         0x0c16 /* SDV */
+#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB                        0x0c04
 
 int intel_gmch_probe(struct pci_dev *pdev,
                                struct agp_bridge_data *bridge);
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 08336ba18cac..7e223a27e112 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -1488,6 +1488,20 @@ static const struct intel_gtt_driver_description {
             "Ivybridge", &sandybridge_gtt_driver },
         { PCI_DEVICE_ID_INTEL_VALLEYVIEW_IG,
             "ValleyView", &valleyview_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG,
+            "Haswell", &sandybridge_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG,
+            "Haswell", &sandybridge_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG,
+            "Haswell", &sandybridge_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG,
+            "Haswell", &sandybridge_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG,
+            "Haswell", &sandybridge_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG,
+            "Haswell", &sandybridge_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_SDV,
+            "Haswell", &sandybridge_gtt_driver },
         { 0, NULL, NULL }
 };