aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/char
diff options
context:
space:
mode:
authorIngo Molnar <mingo@elte.hu>2008-12-31 02:14:29 -0500
committerIngo Molnar <mingo@elte.hu>2008-12-31 02:14:29 -0500
commit5fdf7e5975a0b0f6a0370655612c5dca3fd6311b (patch)
tree639c536e818c6ace974aa285ba94576df0353b01 /drivers/char
parent7a51cffbd10886c0557677dd916c090097c691ef (diff)
parent6a94cb73064c952255336cc57731904174b2c58f (diff)
Merge branch 'linus' into tracing/kmemtrace
Conflicts: mm/slub.c
Diffstat (limited to 'drivers/char')
-rw-r--r--drivers/char/agp/intel-agp.c11
-rw-r--r--drivers/char/ds1620.c25
-rw-r--r--drivers/char/hpet.c2
-rw-r--r--drivers/char/hvc_console.c1
-rw-r--r--drivers/char/nwflash.c8
-rw-r--r--drivers/char/random.c22
-rw-r--r--drivers/char/virtio_console.c30
7 files changed, 60 insertions, 39 deletions
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 9cf6e9bb017e..c7714185f831 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -40,6 +40,8 @@
40#define PCI_DEVICE_ID_INTEL_Q45_IG 0x2E12 40#define PCI_DEVICE_ID_INTEL_Q45_IG 0x2E12
41#define PCI_DEVICE_ID_INTEL_G45_HB 0x2E20 41#define PCI_DEVICE_ID_INTEL_G45_HB 0x2E20
42#define PCI_DEVICE_ID_INTEL_G45_IG 0x2E22 42#define PCI_DEVICE_ID_INTEL_G45_IG 0x2E22
43#define PCI_DEVICE_ID_INTEL_G41_HB 0x2E30
44#define PCI_DEVICE_ID_INTEL_G41_IG 0x2E32
43 45
44/* cover 915 and 945 variants */ 46/* cover 915 and 945 variants */
45#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \ 47#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \
@@ -63,7 +65,8 @@
63#define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_E_HB || \ 65#define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_E_HB || \
64 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \ 66 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \
65 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB || \ 67 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB || \
66 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB) 68 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB || \
69 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G41_HB)
67 70
68extern int agp_memory_reserved; 71extern int agp_memory_reserved;
69 72
@@ -1196,6 +1199,7 @@ static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)
1196 case PCI_DEVICE_ID_INTEL_IGD_E_HB: 1199 case PCI_DEVICE_ID_INTEL_IGD_E_HB:
1197 case PCI_DEVICE_ID_INTEL_Q45_HB: 1200 case PCI_DEVICE_ID_INTEL_Q45_HB:
1198 case PCI_DEVICE_ID_INTEL_G45_HB: 1201 case PCI_DEVICE_ID_INTEL_G45_HB:
1202 case PCI_DEVICE_ID_INTEL_G41_HB:
1199 *gtt_offset = *gtt_size = MB(2); 1203 *gtt_offset = *gtt_size = MB(2);
1200 break; 1204 break;
1201 default: 1205 default:
@@ -2156,13 +2160,15 @@ static const struct intel_driver_description {
2156 { PCI_DEVICE_ID_INTEL_Q33_HB, PCI_DEVICE_ID_INTEL_Q33_IG, 0, "Q33", 2160 { PCI_DEVICE_ID_INTEL_Q33_HB, PCI_DEVICE_ID_INTEL_Q33_IG, 0, "Q33",
2157 NULL, &intel_g33_driver }, 2161 NULL, &intel_g33_driver },
2158 { PCI_DEVICE_ID_INTEL_GM45_HB, PCI_DEVICE_ID_INTEL_GM45_IG, 0, 2162 { PCI_DEVICE_ID_INTEL_GM45_HB, PCI_DEVICE_ID_INTEL_GM45_IG, 0,
2159 "Mobile Intel? GM45 Express", NULL, &intel_i965_driver }, 2163 "Mobile Intel® GM45 Express", NULL, &intel_i965_driver },
2160 { PCI_DEVICE_ID_INTEL_IGD_E_HB, PCI_DEVICE_ID_INTEL_IGD_E_IG, 0, 2164 { PCI_DEVICE_ID_INTEL_IGD_E_HB, PCI_DEVICE_ID_INTEL_IGD_E_IG, 0,
2161 "Intel Integrated Graphics Device", NULL, &intel_i965_driver }, 2165 "Intel Integrated Graphics Device", NULL, &intel_i965_driver },
2162 { PCI_DEVICE_ID_INTEL_Q45_HB, PCI_DEVICE_ID_INTEL_Q45_IG, 0, 2166 { PCI_DEVICE_ID_INTEL_Q45_HB, PCI_DEVICE_ID_INTEL_Q45_IG, 0,
2163 "Q45/Q43", NULL, &intel_i965_driver }, 2167 "Q45/Q43", NULL, &intel_i965_driver },
2164 { PCI_DEVICE_ID_INTEL_G45_HB, PCI_DEVICE_ID_INTEL_G45_IG, 0, 2168 { PCI_DEVICE_ID_INTEL_G45_HB, PCI_DEVICE_ID_INTEL_G45_IG, 0,
2165 "G45/G43", NULL, &intel_i965_driver }, 2169 "G45/G43", NULL, &intel_i965_driver },
2170 { PCI_DEVICE_ID_INTEL_G41_HB, PCI_DEVICE_ID_INTEL_G41_IG, 0,
2171 "G41", NULL, &intel_i965_driver },
2166 { 0, 0, 0, NULL, NULL, NULL } 2172 { 0, 0, 0, NULL, NULL, NULL }
2167}; 2173};
2168 2174
@@ -2360,6 +2366,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
2360 ID(PCI_DEVICE_ID_INTEL_IGD_E_HB), 2366 ID(PCI_DEVICE_ID_INTEL_IGD_E_HB),
2361 ID(PCI_DEVICE_ID_INTEL_Q45_HB), 2367 ID(PCI_DEVICE_ID_INTEL_Q45_HB),
2362 ID(PCI_DEVICE_ID_INTEL_G45_HB), 2368 ID(PCI_DEVICE_ID_INTEL_G45_HB),
2369 ID(PCI_DEVICE_ID_INTEL_G41_HB),
2363 { } 2370 { }
2364}; 2371};
2365 2372
diff --git a/drivers/char/ds1620.c b/drivers/char/ds1620.c
index 74e9cd81b5b2..61f0146e215d 100644
--- a/drivers/char/ds1620.c
+++ b/drivers/char/ds1620.c
@@ -43,52 +43,51 @@ static const char *fan_state[] = { "off", "on", "on (hardwired)" };
43 * chance that the WaveArtist driver could touch these bits to 43 * chance that the WaveArtist driver could touch these bits to
44 * enable or disable the speaker. 44 * enable or disable the speaker.
45 */ 45 */
46extern spinlock_t gpio_lock;
47extern unsigned int system_rev; 46extern unsigned int system_rev;
48 47
49static inline void netwinder_ds1620_set_clk(int clk) 48static inline void netwinder_ds1620_set_clk(int clk)
50{ 49{
51 gpio_modify_op(GPIO_DSCLK, clk ? GPIO_DSCLK : 0); 50 nw_gpio_modify_op(GPIO_DSCLK, clk ? GPIO_DSCLK : 0);
52} 51}
53 52
54static inline void netwinder_ds1620_set_data(int dat) 53static inline void netwinder_ds1620_set_data(int dat)
55{ 54{
56 gpio_modify_op(GPIO_DATA, dat ? GPIO_DATA : 0); 55 nw_gpio_modify_op(GPIO_DATA, dat ? GPIO_DATA : 0);
57} 56}
58 57
59static inline int netwinder_ds1620_get_data(void) 58static inline int netwinder_ds1620_get_data(void)
60{ 59{
61 return gpio_read() & GPIO_DATA; 60 return nw_gpio_read() & GPIO_DATA;
62} 61}
63 62
64static inline void netwinder_ds1620_set_data_dir(int dir) 63static inline void netwinder_ds1620_set_data_dir(int dir)
65{ 64{
66 gpio_modify_io(GPIO_DATA, dir ? GPIO_DATA : 0); 65 nw_gpio_modify_io(GPIO_DATA, dir ? GPIO_DATA : 0);
67} 66}
68 67
69static inline void netwinder_ds1620_reset(void) 68static inline void netwinder_ds1620_reset(void)
70{ 69{
71 cpld_modify(CPLD_DS_ENABLE, 0); 70 nw_cpld_modify(CPLD_DS_ENABLE, 0);
72 cpld_modify(CPLD_DS_ENABLE, CPLD_DS_ENABLE); 71 nw_cpld_modify(CPLD_DS_ENABLE, CPLD_DS_ENABLE);
73} 72}
74 73
75static inline void netwinder_lock(unsigned long *flags) 74static inline void netwinder_lock(unsigned long *flags)
76{ 75{
77 spin_lock_irqsave(&gpio_lock, *flags); 76 spin_lock_irqsave(&nw_gpio_lock, *flags);
78} 77}
79 78
80static inline void netwinder_unlock(unsigned long *flags) 79static inline void netwinder_unlock(unsigned long *flags)
81{ 80{
82 spin_unlock_irqrestore(&gpio_lock, *flags); 81 spin_unlock_irqrestore(&nw_gpio_lock, *flags);
83} 82}
84 83
85static inline void netwinder_set_fan(int i) 84static inline void netwinder_set_fan(int i)
86{ 85{
87 unsigned long flags; 86 unsigned long flags;
88 87
89 spin_lock_irqsave(&gpio_lock, flags); 88 spin_lock_irqsave(&nw_gpio_lock, flags);
90 gpio_modify_op(GPIO_FAN, i ? GPIO_FAN : 0); 89 nw_gpio_modify_op(GPIO_FAN, i ? GPIO_FAN : 0);
91 spin_unlock_irqrestore(&gpio_lock, flags); 90 spin_unlock_irqrestore(&nw_gpio_lock, flags);
92} 91}
93 92
94static inline int netwinder_get_fan(void) 93static inline int netwinder_get_fan(void)
@@ -96,7 +95,7 @@ static inline int netwinder_get_fan(void)
96 if ((system_rev & 0xf000) == 0x4000) 95 if ((system_rev & 0xf000) == 0x4000)
97 return FAN_ALWAYS_ON; 96 return FAN_ALWAYS_ON;
98 97
99 return (gpio_read() & GPIO_FAN) ? FAN_ON : FAN_OFF; 98 return (nw_gpio_read() & GPIO_FAN) ? FAN_ON : FAN_OFF;
100} 99}
101 100
102/* 101/*
diff --git a/drivers/char/hpet.c b/drivers/char/hpet.c
index 53fdc7ff3870..32b8bbf5003e 100644
--- a/drivers/char/hpet.c
+++ b/drivers/char/hpet.c
@@ -46,7 +46,7 @@
46/* 46/*
47 * The High Precision Event Timer driver. 47 * The High Precision Event Timer driver.
48 * This driver is closely modelled after the rtc.c driver. 48 * This driver is closely modelled after the rtc.c driver.
49 * http://www.intel.com/hardwaredesign/hpetspec.htm 49 * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
50 */ 50 */
51#define HPET_USER_FREQ (64) 51#define HPET_USER_FREQ (64)
52#define HPET_DRIFT (500) 52#define HPET_DRIFT (500)
diff --git a/drivers/char/hvc_console.c b/drivers/char/hvc_console.c
index fb57f67bb427..0587b66d6fc7 100644
--- a/drivers/char/hvc_console.c
+++ b/drivers/char/hvc_console.c
@@ -695,6 +695,7 @@ void hvc_resize(struct hvc_struct *hp, struct winsize ws)
695 hp->ws = ws; 695 hp->ws = ws;
696 schedule_work(&hp->tty_resize); 696 schedule_work(&hp->tty_resize);
697} 697}
698EXPORT_SYMBOL_GPL(hvc_resize);
698 699
699/* 700/*
700 * This kthread is either polling or interrupt driven. This is determined by 701 * This kthread is either polling or interrupt driven. This is determined by
diff --git a/drivers/char/nwflash.c b/drivers/char/nwflash.c
index 006be92ee3f3..8c7df5ba088f 100644
--- a/drivers/char/nwflash.c
+++ b/drivers/char/nwflash.c
@@ -58,8 +58,6 @@ static volatile unsigned char *FLASH_BASE;
58static int gbFlashSize = KFLASH_SIZE; 58static int gbFlashSize = KFLASH_SIZE;
59static DEFINE_MUTEX(nwflash_mutex); 59static DEFINE_MUTEX(nwflash_mutex);
60 60
61extern spinlock_t gpio_lock;
62
63static int get_flash_id(void) 61static int get_flash_id(void)
64{ 62{
65 volatile unsigned int c1, c2; 63 volatile unsigned int c1, c2;
@@ -616,9 +614,9 @@ static void kick_open(void)
616 * we want to write a bit pattern XXX1 to Xilinx to enable 614 * we want to write a bit pattern XXX1 to Xilinx to enable
617 * the write gate, which will be open for about the next 2ms. 615 * the write gate, which will be open for about the next 2ms.
618 */ 616 */
619 spin_lock_irqsave(&gpio_lock, flags); 617 spin_lock_irqsave(&nw_gpio_lock, flags);
620 cpld_modify(1, 1); 618 nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
621 spin_unlock_irqrestore(&gpio_lock, flags); 619 spin_unlock_irqrestore(&nw_gpio_lock, flags);
622 620
623 /* 621 /*
624 * let the ISA bus to catch on... 622 * let the ISA bus to catch on...
diff --git a/drivers/char/random.c b/drivers/char/random.c
index 675076f5fca8..d26891bfcd41 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -558,23 +558,9 @@ struct timer_rand_state {
558 unsigned dont_count_entropy:1; 558 unsigned dont_count_entropy:1;
559}; 559};
560 560
561static struct timer_rand_state *irq_timer_state[NR_IRQS]; 561#ifndef CONFIG_SPARSE_IRQ
562 562struct timer_rand_state *irq_timer_state[NR_IRQS];
563static struct timer_rand_state *get_timer_rand_state(unsigned int irq) 563#endif
564{
565 if (irq >= nr_irqs)
566 return NULL;
567
568 return irq_timer_state[irq];
569}
570
571static void set_timer_rand_state(unsigned int irq, struct timer_rand_state *state)
572{
573 if (irq >= nr_irqs)
574 return;
575
576 irq_timer_state[irq] = state;
577}
578 564
579static struct timer_rand_state input_timer_state; 565static struct timer_rand_state input_timer_state;
580 566
@@ -933,8 +919,10 @@ void rand_initialize_irq(int irq)
933{ 919{
934 struct timer_rand_state *state; 920 struct timer_rand_state *state;
935 921
922#ifndef CONFIG_SPARSE_IRQ
936 if (irq >= nr_irqs) 923 if (irq >= nr_irqs)
937 return; 924 return;
925#endif
938 926
939 state = get_timer_rand_state(irq); 927 state = get_timer_rand_state(irq);
940 928
diff --git a/drivers/char/virtio_console.c b/drivers/char/virtio_console.c
index 3fb0d2c88ba5..ff6f5a4b58fb 100644
--- a/drivers/char/virtio_console.c
+++ b/drivers/char/virtio_console.c
@@ -138,12 +138,33 @@ int __init virtio_cons_early_init(int (*put_chars)(u32, const char *, int))
138} 138}
139 139
140/* 140/*
141 * virtio console configuration. This supports:
142 * - console resize
143 */
144static void virtcons_apply_config(struct virtio_device *dev)
145{
146 struct winsize ws;
147
148 if (virtio_has_feature(dev, VIRTIO_CONSOLE_F_SIZE)) {
149 dev->config->get(dev,
150 offsetof(struct virtio_console_config, cols),
151 &ws.ws_col, sizeof(u16));
152 dev->config->get(dev,
153 offsetof(struct virtio_console_config, rows),
154 &ws.ws_row, sizeof(u16));
155 hvc_resize(hvc, ws);
156 }
157}
158
159/*
141 * we support only one console, the hvc struct is a global var 160 * we support only one console, the hvc struct is a global var
142 * There is no need to do anything 161 * We set the configuration at this point, since we now have a tty
143 */ 162 */
144static int notifier_add_vio(struct hvc_struct *hp, int data) 163static int notifier_add_vio(struct hvc_struct *hp, int data)
145{ 164{
146 hp->irq_requested = 1; 165 hp->irq_requested = 1;
166 virtcons_apply_config(vdev);
167
147 return 0; 168 return 0;
148} 169}
149 170
@@ -234,11 +255,18 @@ static struct virtio_device_id id_table[] = {
234 { 0 }, 255 { 0 },
235}; 256};
236 257
258static unsigned int features[] = {
259 VIRTIO_CONSOLE_F_SIZE,
260};
261
237static struct virtio_driver virtio_console = { 262static struct virtio_driver virtio_console = {
263 .feature_table = features,
264 .feature_table_size = ARRAY_SIZE(features),
238 .driver.name = KBUILD_MODNAME, 265 .driver.name = KBUILD_MODNAME,
239 .driver.owner = THIS_MODULE, 266 .driver.owner = THIS_MODULE,
240 .id_table = id_table, 267 .id_table = id_table,
241 .probe = virtcons_probe, 268 .probe = virtcons_probe,
269 .config_changed = virtcons_apply_config,
242}; 270};
243 271
244static int __init init(void) 272static int __init init(void)