drm/i915,agp/intel: Do not clear stolen entries

We can only utilize the stolen portion of the GTT if we are in sole
charge of the hardware. This is only true if using GEM and KMS,
otherwise VESA continues to access stolen memory.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Reported-by: Frederic Weisbecker <fweisbec@gmail.com>
Tested-by: Jiri Olsa <jolsa@redhat.com>
Tested-by: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

1 files changed, 9 insertions, 10 deletions

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 826ab0939a12..fab3d3265adb 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -68,6 +68,7 @@ static struct _intel_private {
         phys_addr_t gma_bus_addr;
         u32 PGETBL_save;
         u32 __iomem *gtt;               /* I915G */
+        bool clear_fake_agp; /* on first access via agp, fill with scratch */
         int num_dcache_entries;
         union {
                 void __iomem *i9xx_flush_page;
@@ -869,21 +870,12 @@ static int intel_fake_agp_free_gatt_table(struct agp_bridge_data *bridge)
 
 static int intel_fake_agp_configure(void)
 {
-        int i;
-
         if (!intel_enable_gtt())
             return -EIO;
 
+        intel_private.clear_fake_agp = true;
         agp_bridge->gart_bus_addr = intel_private.gma_bus_addr;
 
-        for (i = 0; i < intel_private.base.gtt_total_entries; i++) {
-                intel_private.driver->write_entry(intel_private.scratch_page_dma,
-                                                  i, 0);
-        }
-        readl(intel_private.gtt+i-1);   /* PCI Posting. */
-
-        global_cache_flush();
-
         return 0;
 }
 
@@ -945,6 +937,13 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
 {
         int ret = -EINVAL;
 
+        if (intel_private.clear_fake_agp) {
+                int start = intel_private.base.stolen_size / PAGE_SIZE;
+                int end = intel_private.base.gtt_mappable_entries;
+                intel_gtt_clear_range(start, end - start);
+                intel_private.clear_fake_agp = false;
+        }
+
         if (INTEL_GTT_GEN == 1 && type == AGP_DCACHE_MEMORY)
                 return i810_insert_dcache_entries(mem, pg_start, type);