diff options
author | Jesse Barnes <jbarnes@hobbes.virtuousgeek.org> | 2008-02-07 20:33:28 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2008-02-19 18:42:12 -0500 |
commit | c0c4261b6fd80f0fc5546ed67058592469a4f5b7 (patch) | |
tree | 7edcdb723401994367ff595c5aa3ebfc1b74181e /drivers/char | |
parent | 0da3ea12fc2607beb67c2d54d0347807ea615573 (diff) |
drm/i915: restore pipeconf regs unconditionally
On many chipsets, the checks for DPLL enable or VGA mode will prevent the pipeconf regs from being restored, which could result in a blank display or X failing to come back after resume. So restore them unconditionally along with actually restoring pipe B's palette correctly.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/char')
-rw-r--r-- | drivers/char/drm/i915_drv.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/drivers/char/drm/i915_drv.c b/drivers/char/drm/i915_drv.c index 0f525ad536a4..248e7b1c46a5 100644 --- a/drivers/char/drm/i915_drv.c +++ b/drivers/char/drm/i915_drv.c | |||
@@ -407,9 +407,7 @@ static int i915_resume(struct drm_device *dev) | |||
407 | I915_WRITE(DSPATILEOFF, dev_priv->saveDSPATILEOFF); | 407 | I915_WRITE(DSPATILEOFF, dev_priv->saveDSPATILEOFF); |
408 | } | 408 | } |
409 | 409 | ||
410 | if ((dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) && | 410 | I915_WRITE(PIPEACONF, dev_priv->savePIPEACONF); |
411 | (dev_priv->saveDPLL_A & DPLL_VGA_MODE_DIS)) | ||
412 | I915_WRITE(PIPEACONF, dev_priv->savePIPEACONF); | ||
413 | 411 | ||
414 | i915_restore_palette(dev, PIPE_A); | 412 | i915_restore_palette(dev, PIPE_A); |
415 | /* Enable the plane */ | 413 | /* Enable the plane */ |
@@ -451,10 +449,9 @@ static int i915_resume(struct drm_device *dev) | |||
451 | I915_WRITE(DSPBTILEOFF, dev_priv->saveDSPBTILEOFF); | 449 | I915_WRITE(DSPBTILEOFF, dev_priv->saveDSPBTILEOFF); |
452 | } | 450 | } |
453 | 451 | ||
454 | if ((dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) && | 452 | I915_WRITE(PIPEBCONF, dev_priv->savePIPEBCONF); |
455 | (dev_priv->saveDPLL_B & DPLL_VGA_MODE_DIS)) | 453 | |
456 | I915_WRITE(PIPEBCONF, dev_priv->savePIPEBCONF); | 454 | i915_restore_palette(dev, PIPE_B); |
457 | i915_restore_palette(dev, PIPE_A); | ||
458 | /* Enable the plane */ | 455 | /* Enable the plane */ |
459 | I915_WRITE(DSPBCNTR, dev_priv->saveDSPBCNTR); | 456 | I915_WRITE(DSPBCNTR, dev_priv->saveDSPBCNTR); |
460 | I915_WRITE(DSPBBASE, I915_READ(DSPBBASE)); | 457 | I915_WRITE(DSPBBASE, I915_READ(DSPBBASE)); |