[WATCHDOG] w83697hf/hg WDT driver - patch 15

This is patch 15 in the series of patches that converts
Marcus Junker's w83697hf watchdog driver to Samuel Tardieau's
w83697hf/hg watchdog driver.

This patch contains following changes:
 - Clean-up initialization code - part 2: 
   * the line reading "set second mode & disable keyboard ..."
     is plain wrong, the register being manipulated (CRF4) is
     the counter itself, not the control byte (CRF3) -- looks
     like it has been copied from another driver.
   * I think garbage is being written in CRF3 (the control word)
     as the timeout value is being stored in this register (such
     as 60 for 60 seconds).
   * We only want to set pin 119 to WDTO# mode and leave the rest
     of CR29 like it is.
   * Set count mode to seconds and not minutes.

Signed-off-by: Samuel Tardieu <sam@rfc1149.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>

1 files changed, 8 insertions, 10 deletions

diff --git a/drivers/char/watchdog/w83697hf_wdt.c b/drivers/char/watchdog/w83697hf_wdt.c
index 1ea43bf2c35d..78b6540e8747 100644
--- a/drivers/char/watchdog/w83697hf_wdt.c
+++ b/drivers/char/watchdog/w83697hf_wdt.c
@@ -123,20 +123,18 @@ w83697hf_deselect_wdt(void)
 static void
 w83697hf_init(void)
 {
-        unsigned char t;
+        unsigned char bbuf;
 
         w83697hf_select_wdt();
 
-        w83697hf_set_reg(0x29, 0x20);   /* Set pin 119 to WDTO# mode (= CR29, WDT0) */
+        bbuf = w83697hf_get_reg(0x29);
+        bbuf &= ~0x60;
+        bbuf |= 0x20;
+        w83697hf_set_reg(0x29, bbuf);   /* Set pin 119 to WDTO# mode (= CR29, WDT0) */
 
-        t = w83697hf_get_reg(0xF3);     /* Read CRF3 */
-        if (t != 0) {
-                printk (KERN_INFO PFX "Watchdog already running. Resetting timeout to %d sec\n", timeout);
-                w83697hf_set_reg(0xF3, timeout);        /* Write new timeout */
-        }
-        t = w83697hf_get_reg(0xF4);     /* Read CRF4 */
-        t&=~0x0C;                       /* set second mode & disable keyboard turning off watchdog */
-        w83697hf_set_reg(0xF4, t);      /* Write back to CRF4 */
+        bbuf = w83697hf_get_reg(0xF3);
+        bbuf &= ~0x04;
+        w83697hf_set_reg(0xF3, bbuf);   /* Count mode is seconds */
 
         w83697hf_deselect_wdt();
 }