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authorKylene Hall <kjhall@us.ibm.com>2005-06-24 01:01:48 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-24 03:05:24 -0400
commit3122a88a242454efe72930e56a3e4d56ee534f3c (patch)
tree123d3c91c303d77702b392b7ac136312eb0b7ec2 /drivers/char/tpm/tpm.c
parent700d8bdcd0fa815b08638b1e4d43b66d60cc6a8d (diff)
[PATCH] tpm: Fix concerns with TPM driver -- use enums
Convert #defines to named enums where that preference has been indicated by other kernel developers. Signed-off-by: Kylene Hall <kjhall@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/char/tpm/tpm.c')
-rw-r--r--drivers/char/tpm/tpm.c52
1 files changed, 35 insertions, 17 deletions
diff --git a/drivers/char/tpm/tpm.c b/drivers/char/tpm/tpm.c
index c937ea2bcdbc..7da4fe921277 100644
--- a/drivers/char/tpm/tpm.c
+++ b/drivers/char/tpm/tpm.c
@@ -28,19 +28,35 @@
28#include <linux/spinlock.h> 28#include <linux/spinlock.h>
29#include "tpm.h" 29#include "tpm.h"
30 30
31#define TPM_MINOR 224 /* officially assigned */ 31enum tpm_const {
32 TPM_MINOR = 224, /* officially assigned */
33 TPM_BUFSIZE = 2048,
34 TPM_NUM_DEVICES = 256,
35 TPM_NUM_MASK_ENTRIES = TPM_NUM_DEVICES / (8 * sizeof(int))
36};
32 37
33#define TPM_BUFSIZE 2048 38 /* PCI configuration addresses */
39enum tpm_pci_config_addr {
40 PCI_GEN_PMCON_1 = 0xA0,
41 PCI_GEN1_DEC = 0xE4,
42 PCI_LPC_EN = 0xE6,
43 PCI_GEN2_DEC = 0xEC
44};
45
46enum tpm_config {
47 TPM_LOCK_REG = 0x0D,
48 TPM_INTERUPT_REG = 0x0A,
49 TPM_BASE_ADDR_LO = 0x08,
50 TPM_BASE_ADDR_HI = 0x09,
51 TPM_UNLOCK_VALUE = 0x55,
52 TPM_LOCK_VALUE = 0xAA,
53 TPM_DISABLE_INTERUPT_VALUE = 0x00
54};
34 55
35/* PCI configuration addresses */
36#define PCI_GEN_PMCON_1 0xA0
37#define PCI_GEN1_DEC 0xE4
38#define PCI_LPC_EN 0xE6
39#define PCI_GEN2_DEC 0xEC
40 56
41static LIST_HEAD(tpm_chip_list); 57static LIST_HEAD(tpm_chip_list);
42static DEFINE_SPINLOCK(driver_lock); 58static DEFINE_SPINLOCK(driver_lock);
43static int dev_mask[32]; 59static int dev_mask[TPM_NUM_MASK_ENTRIES];
44 60
45static void user_reader_timeout(unsigned long ptr) 61static void user_reader_timeout(unsigned long ptr)
46{ 62{
@@ -102,17 +118,18 @@ int tpm_lpc_bus_init(struct pci_dev *pci_dev, u16 base)
102 pci_write_config_dword(pci_dev, PCI_GEN_PMCON_1, 118 pci_write_config_dword(pci_dev, PCI_GEN_PMCON_1,
103 tmp); 119 tmp);
104 } 120 }
105 tpm_write_index(0x0D, 0x55); /* unlock 4F */
106 tpm_write_index(0x0A, 0x00); /* int disable */
107 tpm_write_index(0x08, base); /* base addr lo */
108 tpm_write_index(0x09, (base & 0xFF00) >> 8); /* base addr hi */
109 tpm_write_index(0x0D, 0xAA); /* lock 4F */
110 break; 121 break;
111 case PCI_VENDOR_ID_AMD: 122 case PCI_VENDOR_ID_AMD:
112 /* nothing yet */ 123 /* nothing yet */
113 break; 124 break;
114 } 125 }
115 126
127 tpm_write_index(TPM_LOCK_REG, TPM_UNLOCK_VALUE);
128 tpm_write_index(TPM_INTERUPT_REG, TPM_DISABLE_INTERUPT_VALUE);
129 tpm_write_index(TPM_BASE_ADDR_LO, base);
130 tpm_write_index(TPM_BASE_ADDR_HI, (base & 0xFF00) >> 8);
131 tpm_write_index(TPM_LOCK_REG, TPM_LOCK_VALUE);
132
116 return 0; 133 return 0;
117} 134}
118 135
@@ -527,7 +544,7 @@ void __devexit tpm_remove(struct pci_dev *pci_dev)
527 544
528 pci_disable_device(pci_dev); 545 pci_disable_device(pci_dev);
529 546
530 dev_mask[chip->dev_num / 32] &= !(1 << (chip->dev_num % 32)); 547 dev_mask[chip->dev_num / TPM_NUM_MASK_ENTRIES ] &= !(1 << (chip->dev_num % TPM_NUM_MASK_ENTRIES));
531 548
532 kfree(chip); 549 kfree(chip);
533 550
@@ -608,10 +625,11 @@ int tpm_register_hardware(struct pci_dev *pci_dev,
608 625
609 chip->dev_num = -1; 626 chip->dev_num = -1;
610 627
611 for (i = 0; i < 32; i++) 628 for (i = 0; i < TPM_NUM_MASK_ENTRIES; i++)
612 for (j = 0; j < 8; j++) 629 for (j = 0; j < 8 * sizeof(int); j++)
613 if ((dev_mask[i] & (1 << j)) == 0) { 630 if ((dev_mask[i] & (1 << j)) == 0) {
614 chip->dev_num = i * 32 + j; 631 chip->dev_num =
632 i * TPM_NUM_MASK_ENTRIES + j;
615 dev_mask[i] |= 1 << j; 633 dev_mask[i] |= 1 << j;
616 goto dev_num_search_complete; 634 goto dev_num_search_complete;
617 } 635 }