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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/char/stallion.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/char/stallion.c')
-rw-r--r--drivers/char/stallion.c5197
1 files changed, 5197 insertions, 0 deletions
diff --git a/drivers/char/stallion.c b/drivers/char/stallion.c
new file mode 100644
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@@ -0,0 +1,5197 @@
1/*****************************************************************************/
2
3/*
4 * stallion.c -- stallion multiport serial driver.
5 *
6 * Copyright (C) 1996-1999 Stallion Technologies
7 * Copyright (C) 1994-1996 Greg Ungerer.
8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27/*****************************************************************************/
28
29#include <linux/config.h>
30#include <linux/module.h>
31#include <linux/slab.h>
32#include <linux/interrupt.h>
33#include <linux/tty.h>
34#include <linux/tty_flip.h>
35#include <linux/serial.h>
36#include <linux/cd1400.h>
37#include <linux/sc26198.h>
38#include <linux/comstats.h>
39#include <linux/stallion.h>
40#include <linux/ioport.h>
41#include <linux/init.h>
42#include <linux/smp_lock.h>
43#include <linux/devfs_fs_kernel.h>
44#include <linux/device.h>
45#include <linux/delay.h>
46
47#include <asm/io.h>
48#include <asm/uaccess.h>
49
50#ifdef CONFIG_PCI
51#include <linux/pci.h>
52#endif
53
54/*****************************************************************************/
55
56/*
57 * Define different board types. Use the standard Stallion "assigned"
58 * board numbers. Boards supported in this driver are abbreviated as
59 * EIO = EasyIO and ECH = EasyConnection 8/32.
60 */
61#define BRD_EASYIO 20
62#define BRD_ECH 21
63#define BRD_ECHMC 22
64#define BRD_ECHPCI 26
65#define BRD_ECH64PCI 27
66#define BRD_EASYIOPCI 28
67
68/*
69 * Define a configuration structure to hold the board configuration.
70 * Need to set this up in the code (for now) with the boards that are
71 * to be configured into the system. This is what needs to be modified
72 * when adding/removing/modifying boards. Each line entry in the
73 * stl_brdconf[] array is a board. Each line contains io/irq/memory
74 * ranges for that board (as well as what type of board it is).
75 * Some examples:
76 * { BRD_EASYIO, 0x2a0, 0, 0, 10, 0 },
77 * This line would configure an EasyIO board (4 or 8, no difference),
78 * at io address 2a0 and irq 10.
79 * Another example:
80 * { BRD_ECH, 0x2a8, 0x280, 0, 12, 0 },
81 * This line will configure an EasyConnection 8/32 board at primary io
82 * address 2a8, secondary io address 280 and irq 12.
83 * Enter as many lines into this array as you want (only the first 4
84 * will actually be used!). Any combination of EasyIO and EasyConnection
85 * boards can be specified. EasyConnection 8/32 boards can share their
86 * secondary io addresses between each other.
87 *
88 * NOTE: there is no need to put any entries in this table for PCI
89 * boards. They will be found automatically by the driver - provided
90 * PCI BIOS32 support is compiled into the kernel.
91 */
92
93typedef struct {
94 int brdtype;
95 int ioaddr1;
96 int ioaddr2;
97 unsigned long memaddr;
98 int irq;
99 int irqtype;
100} stlconf_t;
101
102static stlconf_t stl_brdconf[] = {
103 /*{ BRD_EASYIO, 0x2a0, 0, 0, 10, 0 },*/
104};
105
106static int stl_nrbrds = sizeof(stl_brdconf) / sizeof(stlconf_t);
107
108/*****************************************************************************/
109
110/*
111 * Define some important driver characteristics. Device major numbers
112 * allocated as per Linux Device Registry.
113 */
114#ifndef STL_SIOMEMMAJOR
115#define STL_SIOMEMMAJOR 28
116#endif
117#ifndef STL_SERIALMAJOR
118#define STL_SERIALMAJOR 24
119#endif
120#ifndef STL_CALLOUTMAJOR
121#define STL_CALLOUTMAJOR 25
122#endif
123
124/*
125 * Set the TX buffer size. Bigger is better, but we don't want
126 * to chew too much memory with buffers!
127 */
128#define STL_TXBUFLOW 512
129#define STL_TXBUFSIZE 4096
130
131/*****************************************************************************/
132
133/*
134 * Define our local driver identity first. Set up stuff to deal with
135 * all the local structures required by a serial tty driver.
136 */
137static char *stl_drvtitle = "Stallion Multiport Serial Driver";
138static char *stl_drvname = "stallion";
139static char *stl_drvversion = "5.6.0";
140
141static struct tty_driver *stl_serial;
142
143/*
144 * We will need to allocate a temporary write buffer for chars that
145 * come direct from user space. The problem is that a copy from user
146 * space might cause a page fault (typically on a system that is
147 * swapping!). All ports will share one buffer - since if the system
148 * is already swapping a shared buffer won't make things any worse.
149 */
150static char *stl_tmpwritebuf;
151static DECLARE_MUTEX(stl_tmpwritesem);
152
153/*
154 * Define a local default termios struct. All ports will be created
155 * with this termios initially. Basically all it defines is a raw port
156 * at 9600, 8 data bits, 1 stop bit.
157 */
158static struct termios stl_deftermios = {
159 .c_cflag = (B9600 | CS8 | CREAD | HUPCL | CLOCAL),
160 .c_cc = INIT_C_CC,
161};
162
163/*
164 * Define global stats structures. Not used often, and can be
165 * re-used for each stats call.
166 */
167static comstats_t stl_comstats;
168static combrd_t stl_brdstats;
169static stlbrd_t stl_dummybrd;
170static stlport_t stl_dummyport;
171
172/*
173 * Define global place to put buffer overflow characters.
174 */
175static char stl_unwanted[SC26198_RXFIFOSIZE];
176
177/*****************************************************************************/
178
179static stlbrd_t *stl_brds[STL_MAXBRDS];
180
181/*
182 * Per board state flags. Used with the state field of the board struct.
183 * Not really much here!
184 */
185#define BRD_FOUND 0x1
186
187/*
188 * Define the port structure istate flags. These set of flags are
189 * modified at interrupt time - so setting and reseting them needs
190 * to be atomic. Use the bit clear/setting routines for this.
191 */
192#define ASYI_TXBUSY 1
193#define ASYI_TXLOW 2
194#define ASYI_DCDCHANGE 3
195#define ASYI_TXFLOWED 4
196
197/*
198 * Define an array of board names as printable strings. Handy for
199 * referencing boards when printing trace and stuff.
200 */
201static char *stl_brdnames[] = {
202 (char *) NULL,
203 (char *) NULL,
204 (char *) NULL,
205 (char *) NULL,
206 (char *) NULL,
207 (char *) NULL,
208 (char *) NULL,
209 (char *) NULL,
210 (char *) NULL,
211 (char *) NULL,
212 (char *) NULL,
213 (char *) NULL,
214 (char *) NULL,
215 (char *) NULL,
216 (char *) NULL,
217 (char *) NULL,
218 (char *) NULL,
219 (char *) NULL,
220 (char *) NULL,
221 (char *) NULL,
222 "EasyIO",
223 "EC8/32-AT",
224 "EC8/32-MC",
225 (char *) NULL,
226 (char *) NULL,
227 (char *) NULL,
228 "EC8/32-PCI",
229 "EC8/64-PCI",
230 "EasyIO-PCI",
231};
232
233/*****************************************************************************/
234
235/*
236 * Define some string labels for arguments passed from the module
237 * load line. These allow for easy board definitions, and easy
238 * modification of the io, memory and irq resoucres.
239 */
240static int stl_nargs = 0;
241static char *board0[4];
242static char *board1[4];
243static char *board2[4];
244static char *board3[4];
245
246static char **stl_brdsp[] = {
247 (char **) &board0,
248 (char **) &board1,
249 (char **) &board2,
250 (char **) &board3
251};
252
253/*
254 * Define a set of common board names, and types. This is used to
255 * parse any module arguments.
256 */
257
258typedef struct stlbrdtype {
259 char *name;
260 int type;
261} stlbrdtype_t;
262
263static stlbrdtype_t stl_brdstr[] = {
264 { "easyio", BRD_EASYIO },
265 { "eio", BRD_EASYIO },
266 { "20", BRD_EASYIO },
267 { "ec8/32", BRD_ECH },
268 { "ec8/32-at", BRD_ECH },
269 { "ec8/32-isa", BRD_ECH },
270 { "ech", BRD_ECH },
271 { "echat", BRD_ECH },
272 { "21", BRD_ECH },
273 { "ec8/32-mc", BRD_ECHMC },
274 { "ec8/32-mca", BRD_ECHMC },
275 { "echmc", BRD_ECHMC },
276 { "echmca", BRD_ECHMC },
277 { "22", BRD_ECHMC },
278 { "ec8/32-pc", BRD_ECHPCI },
279 { "ec8/32-pci", BRD_ECHPCI },
280 { "26", BRD_ECHPCI },
281 { "ec8/64-pc", BRD_ECH64PCI },
282 { "ec8/64-pci", BRD_ECH64PCI },
283 { "ech-pci", BRD_ECH64PCI },
284 { "echpci", BRD_ECH64PCI },
285 { "echpc", BRD_ECH64PCI },
286 { "27", BRD_ECH64PCI },
287 { "easyio-pc", BRD_EASYIOPCI },
288 { "easyio-pci", BRD_EASYIOPCI },
289 { "eio-pci", BRD_EASYIOPCI },
290 { "eiopci", BRD_EASYIOPCI },
291 { "28", BRD_EASYIOPCI },
292};
293
294/*
295 * Define the module agruments.
296 */
297MODULE_AUTHOR("Greg Ungerer");
298MODULE_DESCRIPTION("Stallion Multiport Serial Driver");
299MODULE_LICENSE("GPL");
300
301module_param_array(board0, charp, &stl_nargs, 0);
302MODULE_PARM_DESC(board0, "Board 0 config -> name[,ioaddr[,ioaddr2][,irq]]");
303module_param_array(board1, charp, &stl_nargs, 0);
304MODULE_PARM_DESC(board1, "Board 1 config -> name[,ioaddr[,ioaddr2][,irq]]");
305module_param_array(board2, charp, &stl_nargs, 0);
306MODULE_PARM_DESC(board2, "Board 2 config -> name[,ioaddr[,ioaddr2][,irq]]");
307module_param_array(board3, charp, &stl_nargs, 0);
308MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,ioaddr2][,irq]]");
309
310/*****************************************************************************/
311
312/*
313 * Hardware ID bits for the EasyIO and ECH boards. These defines apply
314 * to the directly accessible io ports of these boards (not the uarts -
315 * they are in cd1400.h and sc26198.h).
316 */
317#define EIO_8PORTRS 0x04
318#define EIO_4PORTRS 0x05
319#define EIO_8PORTDI 0x00
320#define EIO_8PORTM 0x06
321#define EIO_MK3 0x03
322#define EIO_IDBITMASK 0x07
323
324#define EIO_BRDMASK 0xf0
325#define ID_BRD4 0x10
326#define ID_BRD8 0x20
327#define ID_BRD16 0x30
328
329#define EIO_INTRPEND 0x08
330#define EIO_INTEDGE 0x00
331#define EIO_INTLEVEL 0x08
332#define EIO_0WS 0x10
333
334#define ECH_ID 0xa0
335#define ECH_IDBITMASK 0xe0
336#define ECH_BRDENABLE 0x08
337#define ECH_BRDDISABLE 0x00
338#define ECH_INTENABLE 0x01
339#define ECH_INTDISABLE 0x00
340#define ECH_INTLEVEL 0x02
341#define ECH_INTEDGE 0x00
342#define ECH_INTRPEND 0x01
343#define ECH_BRDRESET 0x01
344
345#define ECHMC_INTENABLE 0x01
346#define ECHMC_BRDRESET 0x02
347
348#define ECH_PNLSTATUS 2
349#define ECH_PNL16PORT 0x20
350#define ECH_PNLIDMASK 0x07
351#define ECH_PNLXPID 0x40
352#define ECH_PNLINTRPEND 0x80
353
354#define ECH_ADDR2MASK 0x1e0
355
356/*
357 * Define the vector mapping bits for the programmable interrupt board
358 * hardware. These bits encode the interrupt for the board to use - it
359 * is software selectable (except the EIO-8M).
360 */
361static unsigned char stl_vecmap[] = {
362 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07,
363 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03
364};
365
366/*
367 * Set up enable and disable macros for the ECH boards. They require
368 * the secondary io address space to be activated and deactivated.
369 * This way all ECH boards can share their secondary io region.
370 * If this is an ECH-PCI board then also need to set the page pointer
371 * to point to the correct page.
372 */
373#define BRDENABLE(brdnr,pagenr) \
374 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
375 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE), \
376 stl_brds[(brdnr)]->ioctrl); \
377 else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \
378 outb((pagenr), stl_brds[(brdnr)]->ioctrl);
379
380#define BRDDISABLE(brdnr) \
381 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
382 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE), \
383 stl_brds[(brdnr)]->ioctrl);
384
385#define STL_CD1400MAXBAUD 230400
386#define STL_SC26198MAXBAUD 460800
387
388#define STL_BAUDBASE 115200
389#define STL_CLOSEDELAY (5 * HZ / 10)
390
391/*****************************************************************************/
392
393#ifdef CONFIG_PCI
394
395/*
396 * Define the Stallion PCI vendor and device IDs.
397 */
398#ifndef PCI_VENDOR_ID_STALLION
399#define PCI_VENDOR_ID_STALLION 0x124d
400#endif
401#ifndef PCI_DEVICE_ID_ECHPCI832
402#define PCI_DEVICE_ID_ECHPCI832 0x0000
403#endif
404#ifndef PCI_DEVICE_ID_ECHPCI864
405#define PCI_DEVICE_ID_ECHPCI864 0x0002
406#endif
407#ifndef PCI_DEVICE_ID_EIOPCI
408#define PCI_DEVICE_ID_EIOPCI 0x0003
409#endif
410
411/*
412 * Define structure to hold all Stallion PCI boards.
413 */
414typedef struct stlpcibrd {
415 unsigned short vendid;
416 unsigned short devid;
417 int brdtype;
418} stlpcibrd_t;
419
420static stlpcibrd_t stl_pcibrds[] = {
421 { PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI864, BRD_ECH64PCI },
422 { PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_EIOPCI, BRD_EASYIOPCI },
423 { PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI832, BRD_ECHPCI },
424 { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410, BRD_ECHPCI },
425};
426
427static int stl_nrpcibrds = sizeof(stl_pcibrds) / sizeof(stlpcibrd_t);
428
429#endif
430
431/*****************************************************************************/
432
433/*
434 * Define macros to extract a brd/port number from a minor number.
435 */
436#define MINOR2BRD(min) (((min) & 0xc0) >> 6)
437#define MINOR2PORT(min) ((min) & 0x3f)
438
439/*
440 * Define a baud rate table that converts termios baud rate selector
441 * into the actual baud rate value. All baud rate calculations are
442 * based on the actual baud rate required.
443 */
444static unsigned int stl_baudrates[] = {
445 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
446 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600
447};
448
449/*
450 * Define some handy local macros...
451 */
452#undef MIN
453#define MIN(a,b) (((a) <= (b)) ? (a) : (b))
454
455#undef TOLOWER
456#define TOLOWER(x) ((((x) >= 'A') && ((x) <= 'Z')) ? ((x) + 0x20) : (x))
457
458/*****************************************************************************/
459
460/*
461 * Declare all those functions in this driver!
462 */
463
464static void stl_argbrds(void);
465static int stl_parsebrd(stlconf_t *confp, char **argp);
466
467static unsigned long stl_atol(char *str);
468
469int stl_init(void);
470static int stl_open(struct tty_struct *tty, struct file *filp);
471static void stl_close(struct tty_struct *tty, struct file *filp);
472static int stl_write(struct tty_struct *tty, const unsigned char *buf, int count);
473static void stl_putchar(struct tty_struct *tty, unsigned char ch);
474static void stl_flushchars(struct tty_struct *tty);
475static int stl_writeroom(struct tty_struct *tty);
476static int stl_charsinbuffer(struct tty_struct *tty);
477static int stl_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg);
478static void stl_settermios(struct tty_struct *tty, struct termios *old);
479static void stl_throttle(struct tty_struct *tty);
480static void stl_unthrottle(struct tty_struct *tty);
481static void stl_stop(struct tty_struct *tty);
482static void stl_start(struct tty_struct *tty);
483static void stl_flushbuffer(struct tty_struct *tty);
484static void stl_breakctl(struct tty_struct *tty, int state);
485static void stl_waituntilsent(struct tty_struct *tty, int timeout);
486static void stl_sendxchar(struct tty_struct *tty, char ch);
487static void stl_hangup(struct tty_struct *tty);
488static int stl_memioctl(struct inode *ip, struct file *fp, unsigned int cmd, unsigned long arg);
489static int stl_portinfo(stlport_t *portp, int portnr, char *pos);
490static int stl_readproc(char *page, char **start, off_t off, int count, int *eof, void *data);
491
492static int stl_brdinit(stlbrd_t *brdp);
493static int stl_initports(stlbrd_t *brdp, stlpanel_t *panelp);
494static int stl_getserial(stlport_t *portp, struct serial_struct __user *sp);
495static int stl_setserial(stlport_t *portp, struct serial_struct __user *sp);
496static int stl_getbrdstats(combrd_t __user *bp);
497static int stl_getportstats(stlport_t *portp, comstats_t __user *cp);
498static int stl_clrportstats(stlport_t *portp, comstats_t __user *cp);
499static int stl_getportstruct(stlport_t __user *arg);
500static int stl_getbrdstruct(stlbrd_t __user *arg);
501static int stl_waitcarrier(stlport_t *portp, struct file *filp);
502static int stl_eiointr(stlbrd_t *brdp);
503static int stl_echatintr(stlbrd_t *brdp);
504static int stl_echmcaintr(stlbrd_t *brdp);
505static int stl_echpciintr(stlbrd_t *brdp);
506static int stl_echpci64intr(stlbrd_t *brdp);
507static void stl_offintr(void *private);
508static void *stl_memalloc(int len);
509static stlbrd_t *stl_allocbrd(void);
510static stlport_t *stl_getport(int brdnr, int panelnr, int portnr);
511
512static inline int stl_initbrds(void);
513static inline int stl_initeio(stlbrd_t *brdp);
514static inline int stl_initech(stlbrd_t *brdp);
515static inline int stl_getbrdnr(void);
516
517#ifdef CONFIG_PCI
518static inline int stl_findpcibrds(void);
519static inline int stl_initpcibrd(int brdtype, struct pci_dev *devp);
520#endif
521
522/*
523 * CD1400 uart specific handling functions.
524 */
525static void stl_cd1400setreg(stlport_t *portp, int regnr, int value);
526static int stl_cd1400getreg(stlport_t *portp, int regnr);
527static int stl_cd1400updatereg(stlport_t *portp, int regnr, int value);
528static int stl_cd1400panelinit(stlbrd_t *brdp, stlpanel_t *panelp);
529static void stl_cd1400portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp);
530static void stl_cd1400setport(stlport_t *portp, struct termios *tiosp);
531static int stl_cd1400getsignals(stlport_t *portp);
532static void stl_cd1400setsignals(stlport_t *portp, int dtr, int rts);
533static void stl_cd1400ccrwait(stlport_t *portp);
534static void stl_cd1400enablerxtx(stlport_t *portp, int rx, int tx);
535static void stl_cd1400startrxtx(stlport_t *portp, int rx, int tx);
536static void stl_cd1400disableintrs(stlport_t *portp);
537static void stl_cd1400sendbreak(stlport_t *portp, int len);
538static void stl_cd1400flowctrl(stlport_t *portp, int state);
539static void stl_cd1400sendflow(stlport_t *portp, int state);
540static void stl_cd1400flush(stlport_t *portp);
541static int stl_cd1400datastate(stlport_t *portp);
542static void stl_cd1400eiointr(stlpanel_t *panelp, unsigned int iobase);
543static void stl_cd1400echintr(stlpanel_t *panelp, unsigned int iobase);
544static void stl_cd1400txisr(stlpanel_t *panelp, int ioaddr);
545static void stl_cd1400rxisr(stlpanel_t *panelp, int ioaddr);
546static void stl_cd1400mdmisr(stlpanel_t *panelp, int ioaddr);
547
548static inline int stl_cd1400breakisr(stlport_t *portp, int ioaddr);
549
550/*
551 * SC26198 uart specific handling functions.
552 */
553static void stl_sc26198setreg(stlport_t *portp, int regnr, int value);
554static int stl_sc26198getreg(stlport_t *portp, int regnr);
555static int stl_sc26198updatereg(stlport_t *portp, int regnr, int value);
556static int stl_sc26198getglobreg(stlport_t *portp, int regnr);
557static int stl_sc26198panelinit(stlbrd_t *brdp, stlpanel_t *panelp);
558static void stl_sc26198portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp);
559static void stl_sc26198setport(stlport_t *portp, struct termios *tiosp);
560static int stl_sc26198getsignals(stlport_t *portp);
561static void stl_sc26198setsignals(stlport_t *portp, int dtr, int rts);
562static void stl_sc26198enablerxtx(stlport_t *portp, int rx, int tx);
563static void stl_sc26198startrxtx(stlport_t *portp, int rx, int tx);
564static void stl_sc26198disableintrs(stlport_t *portp);
565static void stl_sc26198sendbreak(stlport_t *portp, int len);
566static void stl_sc26198flowctrl(stlport_t *portp, int state);
567static void stl_sc26198sendflow(stlport_t *portp, int state);
568static void stl_sc26198flush(stlport_t *portp);
569static int stl_sc26198datastate(stlport_t *portp);
570static void stl_sc26198wait(stlport_t *portp);
571static void stl_sc26198txunflow(stlport_t *portp, struct tty_struct *tty);
572static void stl_sc26198intr(stlpanel_t *panelp, unsigned int iobase);
573static void stl_sc26198txisr(stlport_t *port);
574static void stl_sc26198rxisr(stlport_t *port, unsigned int iack);
575static void stl_sc26198rxbadch(stlport_t *portp, unsigned char status, char ch);
576static void stl_sc26198rxbadchars(stlport_t *portp);
577static void stl_sc26198otherisr(stlport_t *port, unsigned int iack);
578
579/*****************************************************************************/
580
581/*
582 * Generic UART support structure.
583 */
584typedef struct uart {
585 int (*panelinit)(stlbrd_t *brdp, stlpanel_t *panelp);
586 void (*portinit)(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp);
587 void (*setport)(stlport_t *portp, struct termios *tiosp);
588 int (*getsignals)(stlport_t *portp);
589 void (*setsignals)(stlport_t *portp, int dtr, int rts);
590 void (*enablerxtx)(stlport_t *portp, int rx, int tx);
591 void (*startrxtx)(stlport_t *portp, int rx, int tx);
592 void (*disableintrs)(stlport_t *portp);
593 void (*sendbreak)(stlport_t *portp, int len);
594 void (*flowctrl)(stlport_t *portp, int state);
595 void (*sendflow)(stlport_t *portp, int state);
596 void (*flush)(stlport_t *portp);
597 int (*datastate)(stlport_t *portp);
598 void (*intr)(stlpanel_t *panelp, unsigned int iobase);
599} uart_t;
600
601/*
602 * Define some macros to make calling these functions nice and clean.
603 */
604#define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit)
605#define stl_portinit (* ((uart_t *) portp->uartp)->portinit)
606#define stl_setport (* ((uart_t *) portp->uartp)->setport)
607#define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals)
608#define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals)
609#define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx)
610#define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx)
611#define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs)
612#define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak)
613#define stl_flowctrl (* ((uart_t *) portp->uartp)->flowctrl)
614#define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow)
615#define stl_flush (* ((uart_t *) portp->uartp)->flush)
616#define stl_datastate (* ((uart_t *) portp->uartp)->datastate)
617
618/*****************************************************************************/
619
620/*
621 * CD1400 UART specific data initialization.
622 */
623static uart_t stl_cd1400uart = {
624 stl_cd1400panelinit,
625 stl_cd1400portinit,
626 stl_cd1400setport,
627 stl_cd1400getsignals,
628 stl_cd1400setsignals,
629 stl_cd1400enablerxtx,
630 stl_cd1400startrxtx,
631 stl_cd1400disableintrs,
632 stl_cd1400sendbreak,
633 stl_cd1400flowctrl,
634 stl_cd1400sendflow,
635 stl_cd1400flush,
636 stl_cd1400datastate,
637 stl_cd1400eiointr
638};
639
640/*
641 * Define the offsets within the register bank of a cd1400 based panel.
642 * These io address offsets are common to the EasyIO board as well.
643 */
644#define EREG_ADDR 0
645#define EREG_DATA 4
646#define EREG_RXACK 5
647#define EREG_TXACK 6
648#define EREG_MDACK 7
649
650#define EREG_BANKSIZE 8
651
652#define CD1400_CLK 25000000
653#define CD1400_CLK8M 20000000
654
655/*
656 * Define the cd1400 baud rate clocks. These are used when calculating
657 * what clock and divisor to use for the required baud rate. Also
658 * define the maximum baud rate allowed, and the default base baud.
659 */
660static int stl_cd1400clkdivs[] = {
661 CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4
662};
663
664/*****************************************************************************/
665
666/*
667 * SC26198 UART specific data initization.
668 */
669static uart_t stl_sc26198uart = {
670 stl_sc26198panelinit,
671 stl_sc26198portinit,
672 stl_sc26198setport,
673 stl_sc26198getsignals,
674 stl_sc26198setsignals,
675 stl_sc26198enablerxtx,
676 stl_sc26198startrxtx,
677 stl_sc26198disableintrs,
678 stl_sc26198sendbreak,
679 stl_sc26198flowctrl,
680 stl_sc26198sendflow,
681 stl_sc26198flush,
682 stl_sc26198datastate,
683 stl_sc26198intr
684};
685
686/*
687 * Define the offsets within the register bank of a sc26198 based panel.
688 */
689#define XP_DATA 0
690#define XP_ADDR 1
691#define XP_MODID 2
692#define XP_STATUS 2
693#define XP_IACK 3
694
695#define XP_BANKSIZE 4
696
697/*
698 * Define the sc26198 baud rate table. Offsets within the table
699 * represent the actual baud rate selector of sc26198 registers.
700 */
701static unsigned int sc26198_baudtable[] = {
702 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600,
703 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200,
704 230400, 460800, 921600
705};
706
707#define SC26198_NRBAUDS (sizeof(sc26198_baudtable) / sizeof(unsigned int))
708
709/*****************************************************************************/
710
711/*
712 * Define the driver info for a user level control device. Used mainly
713 * to get at port stats - only not using the port device itself.
714 */
715static struct file_operations stl_fsiomem = {
716 .owner = THIS_MODULE,
717 .ioctl = stl_memioctl,
718};
719
720/*****************************************************************************/
721
722static struct class_simple *stallion_class;
723
724/*
725 * Loadable module initialization stuff.
726 */
727
728static int __init stallion_module_init(void)
729{
730 unsigned long flags;
731
732#ifdef DEBUG
733 printk("init_module()\n");
734#endif
735
736 save_flags(flags);
737 cli();
738 stl_init();
739 restore_flags(flags);
740
741 return(0);
742}
743
744/*****************************************************************************/
745
746static void __exit stallion_module_exit(void)
747{
748 stlbrd_t *brdp;
749 stlpanel_t *panelp;
750 stlport_t *portp;
751 unsigned long flags;
752 int i, j, k;
753
754#ifdef DEBUG
755 printk("cleanup_module()\n");
756#endif
757
758 printk(KERN_INFO "Unloading %s: version %s\n", stl_drvtitle,
759 stl_drvversion);
760
761 save_flags(flags);
762 cli();
763
764/*
765 * Free up all allocated resources used by the ports. This includes
766 * memory and interrupts. As part of this process we will also do
767 * a hangup on every open port - to try to flush out any processes
768 * hanging onto ports.
769 */
770 i = tty_unregister_driver(stl_serial);
771 put_tty_driver(stl_serial);
772 if (i) {
773 printk("STALLION: failed to un-register tty driver, "
774 "errno=%d\n", -i);
775 restore_flags(flags);
776 return;
777 }
778 for (i = 0; i < 4; i++) {
779 devfs_remove("staliomem/%d", i);
780 class_simple_device_remove(MKDEV(STL_SIOMEMMAJOR, i));
781 }
782 devfs_remove("staliomem");
783 if ((i = unregister_chrdev(STL_SIOMEMMAJOR, "staliomem")))
784 printk("STALLION: failed to un-register serial memory device, "
785 "errno=%d\n", -i);
786 class_simple_destroy(stallion_class);
787
788 if (stl_tmpwritebuf != (char *) NULL)
789 kfree(stl_tmpwritebuf);
790
791 for (i = 0; (i < stl_nrbrds); i++) {
792 if ((brdp = stl_brds[i]) == (stlbrd_t *) NULL)
793 continue;
794
795 free_irq(brdp->irq, brdp);
796
797 for (j = 0; (j < STL_MAXPANELS); j++) {
798 panelp = brdp->panels[j];
799 if (panelp == (stlpanel_t *) NULL)
800 continue;
801 for (k = 0; (k < STL_PORTSPERPANEL); k++) {
802 portp = panelp->ports[k];
803 if (portp == (stlport_t *) NULL)
804 continue;
805 if (portp->tty != (struct tty_struct *) NULL)
806 stl_hangup(portp->tty);
807 if (portp->tx.buf != (char *) NULL)
808 kfree(portp->tx.buf);
809 kfree(portp);
810 }
811 kfree(panelp);
812 }
813
814 release_region(brdp->ioaddr1, brdp->iosize1);
815 if (brdp->iosize2 > 0)
816 release_region(brdp->ioaddr2, brdp->iosize2);
817
818 kfree(brdp);
819 stl_brds[i] = (stlbrd_t *) NULL;
820 }
821
822 restore_flags(flags);
823}
824
825module_init(stallion_module_init);
826module_exit(stallion_module_exit);
827
828/*****************************************************************************/
829
830/*
831 * Check for any arguments passed in on the module load command line.
832 */
833
834static void stl_argbrds(void)
835{
836 stlconf_t conf;
837 stlbrd_t *brdp;
838 int i;
839
840#ifdef DEBUG
841 printk("stl_argbrds()\n");
842#endif
843
844 for (i = stl_nrbrds; (i < stl_nargs); i++) {
845 memset(&conf, 0, sizeof(conf));
846 if (stl_parsebrd(&conf, stl_brdsp[i]) == 0)
847 continue;
848 if ((brdp = stl_allocbrd()) == (stlbrd_t *) NULL)
849 continue;
850 stl_nrbrds = i + 1;
851 brdp->brdnr = i;
852 brdp->brdtype = conf.brdtype;
853 brdp->ioaddr1 = conf.ioaddr1;
854 brdp->ioaddr2 = conf.ioaddr2;
855 brdp->irq = conf.irq;
856 brdp->irqtype = conf.irqtype;
857 stl_brdinit(brdp);
858 }
859}
860
861/*****************************************************************************/
862
863/*
864 * Convert an ascii string number into an unsigned long.
865 */
866
867static unsigned long stl_atol(char *str)
868{
869 unsigned long val;
870 int base, c;
871 char *sp;
872
873 val = 0;
874 sp = str;
875 if ((*sp == '0') && (*(sp+1) == 'x')) {
876 base = 16;
877 sp += 2;
878 } else if (*sp == '0') {
879 base = 8;
880 sp++;
881 } else {
882 base = 10;
883 }
884
885 for (; (*sp != 0); sp++) {
886 c = (*sp > '9') ? (TOLOWER(*sp) - 'a' + 10) : (*sp - '0');
887 if ((c < 0) || (c >= base)) {
888 printk("STALLION: invalid argument %s\n", str);
889 val = 0;
890 break;
891 }
892 val = (val * base) + c;
893 }
894 return(val);
895}
896
897/*****************************************************************************/
898
899/*
900 * Parse the supplied argument string, into the board conf struct.
901 */
902
903static int stl_parsebrd(stlconf_t *confp, char **argp)
904{
905 char *sp;
906 int nrbrdnames, i;
907
908#ifdef DEBUG
909 printk("stl_parsebrd(confp=%x,argp=%x)\n", (int) confp, (int) argp);
910#endif
911
912 if ((argp[0] == (char *) NULL) || (*argp[0] == 0))
913 return(0);
914
915 for (sp = argp[0], i = 0; ((*sp != 0) && (i < 25)); sp++, i++)
916 *sp = TOLOWER(*sp);
917
918 nrbrdnames = sizeof(stl_brdstr) / sizeof(stlbrdtype_t);
919 for (i = 0; (i < nrbrdnames); i++) {
920 if (strcmp(stl_brdstr[i].name, argp[0]) == 0)
921 break;
922 }
923 if (i >= nrbrdnames) {
924 printk("STALLION: unknown board name, %s?\n", argp[0]);
925 return(0);
926 }
927
928 confp->brdtype = stl_brdstr[i].type;
929
930 i = 1;
931 if ((argp[i] != (char *) NULL) && (*argp[i] != 0))
932 confp->ioaddr1 = stl_atol(argp[i]);
933 i++;
934 if (confp->brdtype == BRD_ECH) {
935 if ((argp[i] != (char *) NULL) && (*argp[i] != 0))
936 confp->ioaddr2 = stl_atol(argp[i]);
937 i++;
938 }
939 if ((argp[i] != (char *) NULL) && (*argp[i] != 0))
940 confp->irq = stl_atol(argp[i]);
941 return(1);
942}
943
944/*****************************************************************************/
945
946/*
947 * Local driver kernel memory allocation routine.
948 */
949
950static void *stl_memalloc(int len)
951{
952 return((void *) kmalloc(len, GFP_KERNEL));
953}
954
955/*****************************************************************************/
956
957/*
958 * Allocate a new board structure. Fill out the basic info in it.
959 */
960
961static stlbrd_t *stl_allocbrd(void)
962{
963 stlbrd_t *brdp;
964
965 brdp = (stlbrd_t *) stl_memalloc(sizeof(stlbrd_t));
966 if (brdp == (stlbrd_t *) NULL) {
967 printk("STALLION: failed to allocate memory (size=%d)\n",
968 sizeof(stlbrd_t));
969 return((stlbrd_t *) NULL);
970 }
971
972 memset(brdp, 0, sizeof(stlbrd_t));
973 brdp->magic = STL_BOARDMAGIC;
974 return(brdp);
975}
976
977/*****************************************************************************/
978
979static int stl_open(struct tty_struct *tty, struct file *filp)
980{
981 stlport_t *portp;
982 stlbrd_t *brdp;
983 unsigned int minordev;
984 int brdnr, panelnr, portnr, rc;
985
986#ifdef DEBUG
987 printk("stl_open(tty=%x,filp=%x): device=%s\n", (int) tty,
988 (int) filp, tty->name);
989#endif
990
991 minordev = tty->index;
992 brdnr = MINOR2BRD(minordev);
993 if (brdnr >= stl_nrbrds)
994 return(-ENODEV);
995 brdp = stl_brds[brdnr];
996 if (brdp == (stlbrd_t *) NULL)
997 return(-ENODEV);
998 minordev = MINOR2PORT(minordev);
999 for (portnr = -1, panelnr = 0; (panelnr < STL_MAXPANELS); panelnr++) {
1000 if (brdp->panels[panelnr] == (stlpanel_t *) NULL)
1001 break;
1002 if (minordev < brdp->panels[panelnr]->nrports) {
1003 portnr = minordev;
1004 break;
1005 }
1006 minordev -= brdp->panels[panelnr]->nrports;
1007 }
1008 if (portnr < 0)
1009 return(-ENODEV);
1010
1011 portp = brdp->panels[panelnr]->ports[portnr];
1012 if (portp == (stlport_t *) NULL)
1013 return(-ENODEV);
1014
1015/*
1016 * On the first open of the device setup the port hardware, and
1017 * initialize the per port data structure.
1018 */
1019 portp->tty = tty;
1020 tty->driver_data = portp;
1021 portp->refcount++;
1022
1023 if ((portp->flags & ASYNC_INITIALIZED) == 0) {
1024 if (portp->tx.buf == (char *) NULL) {
1025 portp->tx.buf = (char *) stl_memalloc(STL_TXBUFSIZE);
1026 if (portp->tx.buf == (char *) NULL)
1027 return(-ENOMEM);
1028 portp->tx.head = portp->tx.buf;
1029 portp->tx.tail = portp->tx.buf;
1030 }
1031 stl_setport(portp, tty->termios);
1032 portp->sigs = stl_getsignals(portp);
1033 stl_setsignals(portp, 1, 1);
1034 stl_enablerxtx(portp, 1, 1);
1035 stl_startrxtx(portp, 1, 0);
1036 clear_bit(TTY_IO_ERROR, &tty->flags);
1037 portp->flags |= ASYNC_INITIALIZED;
1038 }
1039
1040/*
1041 * Check if this port is in the middle of closing. If so then wait
1042 * until it is closed then return error status, based on flag settings.
1043 * The sleep here does not need interrupt protection since the wakeup
1044 * for it is done with the same context.
1045 */
1046 if (portp->flags & ASYNC_CLOSING) {
1047 interruptible_sleep_on(&portp->close_wait);
1048 if (portp->flags & ASYNC_HUP_NOTIFY)
1049 return(-EAGAIN);
1050 return(-ERESTARTSYS);
1051 }
1052
1053/*
1054 * Based on type of open being done check if it can overlap with any
1055 * previous opens still in effect. If we are a normal serial device
1056 * then also we might have to wait for carrier.
1057 */
1058 if (!(filp->f_flags & O_NONBLOCK)) {
1059 if ((rc = stl_waitcarrier(portp, filp)) != 0)
1060 return(rc);
1061 }
1062 portp->flags |= ASYNC_NORMAL_ACTIVE;
1063
1064 return(0);
1065}
1066
1067/*****************************************************************************/
1068
1069/*
1070 * Possibly need to wait for carrier (DCD signal) to come high. Say
1071 * maybe because if we are clocal then we don't need to wait...
1072 */
1073
1074static int stl_waitcarrier(stlport_t *portp, struct file *filp)
1075{
1076 unsigned long flags;
1077 int rc, doclocal;
1078
1079#ifdef DEBUG
1080 printk("stl_waitcarrier(portp=%x,filp=%x)\n", (int) portp, (int) filp);
1081#endif
1082
1083 rc = 0;
1084 doclocal = 0;
1085
1086 if (portp->tty->termios->c_cflag & CLOCAL)
1087 doclocal++;
1088
1089 save_flags(flags);
1090 cli();
1091 portp->openwaitcnt++;
1092 if (! tty_hung_up_p(filp))
1093 portp->refcount--;
1094
1095 for (;;) {
1096 stl_setsignals(portp, 1, 1);
1097 if (tty_hung_up_p(filp) ||
1098 ((portp->flags & ASYNC_INITIALIZED) == 0)) {
1099 if (portp->flags & ASYNC_HUP_NOTIFY)
1100 rc = -EBUSY;
1101 else
1102 rc = -ERESTARTSYS;
1103 break;
1104 }
1105 if (((portp->flags & ASYNC_CLOSING) == 0) &&
1106 (doclocal || (portp->sigs & TIOCM_CD))) {
1107 break;
1108 }
1109 if (signal_pending(current)) {
1110 rc = -ERESTARTSYS;
1111 break;
1112 }
1113 interruptible_sleep_on(&portp->open_wait);
1114 }
1115
1116 if (! tty_hung_up_p(filp))
1117 portp->refcount++;
1118 portp->openwaitcnt--;
1119 restore_flags(flags);
1120
1121 return(rc);
1122}
1123
1124/*****************************************************************************/
1125
1126static void stl_close(struct tty_struct *tty, struct file *filp)
1127{
1128 stlport_t *portp;
1129 unsigned long flags;
1130
1131#ifdef DEBUG
1132 printk("stl_close(tty=%x,filp=%x)\n", (int) tty, (int) filp);
1133#endif
1134
1135 portp = tty->driver_data;
1136 if (portp == (stlport_t *) NULL)
1137 return;
1138
1139 save_flags(flags);
1140 cli();
1141 if (tty_hung_up_p(filp)) {
1142 restore_flags(flags);
1143 return;
1144 }
1145 if ((tty->count == 1) && (portp->refcount != 1))
1146 portp->refcount = 1;
1147 if (portp->refcount-- > 1) {
1148 restore_flags(flags);
1149 return;
1150 }
1151
1152 portp->refcount = 0;
1153 portp->flags |= ASYNC_CLOSING;
1154
1155/*
1156 * May want to wait for any data to drain before closing. The BUSY
1157 * flag keeps track of whether we are still sending or not - it is
1158 * very accurate for the cd1400, not quite so for the sc26198.
1159 * (The sc26198 has no "end-of-data" interrupt only empty FIFO)
1160 */
1161 tty->closing = 1;
1162 if (portp->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1163 tty_wait_until_sent(tty, portp->closing_wait);
1164 stl_waituntilsent(tty, (HZ / 2));
1165
1166 portp->flags &= ~ASYNC_INITIALIZED;
1167 stl_disableintrs(portp);
1168 if (tty->termios->c_cflag & HUPCL)
1169 stl_setsignals(portp, 0, 0);
1170 stl_enablerxtx(portp, 0, 0);
1171 stl_flushbuffer(tty);
1172 portp->istate = 0;
1173 if (portp->tx.buf != (char *) NULL) {
1174 kfree(portp->tx.buf);
1175 portp->tx.buf = (char *) NULL;
1176 portp->tx.head = (char *) NULL;
1177 portp->tx.tail = (char *) NULL;
1178 }
1179 set_bit(TTY_IO_ERROR, &tty->flags);
1180 tty_ldisc_flush(tty);
1181
1182 tty->closing = 0;
1183 portp->tty = (struct tty_struct *) NULL;
1184
1185 if (portp->openwaitcnt) {
1186 if (portp->close_delay)
1187 msleep_interruptible(jiffies_to_msecs(portp->close_delay));
1188 wake_up_interruptible(&portp->open_wait);
1189 }
1190
1191 portp->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1192 wake_up_interruptible(&portp->close_wait);
1193 restore_flags(flags);
1194}
1195
1196/*****************************************************************************/
1197
1198/*
1199 * Write routine. Take data and stuff it in to the TX ring queue.
1200 * If transmit interrupts are not running then start them.
1201 */
1202
1203static int stl_write(struct tty_struct *tty, const unsigned char *buf, int count)
1204{
1205 stlport_t *portp;
1206 unsigned int len, stlen;
1207 unsigned char *chbuf;
1208 char *head, *tail;
1209
1210#ifdef DEBUG
1211 printk("stl_write(tty=%x,buf=%x,count=%d)\n",
1212 (int) tty, (int) buf, count);
1213#endif
1214
1215 if ((tty == (struct tty_struct *) NULL) ||
1216 (stl_tmpwritebuf == (char *) NULL))
1217 return(0);
1218 portp = tty->driver_data;
1219 if (portp == (stlport_t *) NULL)
1220 return(0);
1221 if (portp->tx.buf == (char *) NULL)
1222 return(0);
1223
1224/*
1225 * If copying direct from user space we must cater for page faults,
1226 * causing us to "sleep" here for a while. To handle this copy in all
1227 * the data we need now, into a local buffer. Then when we got it all
1228 * copy it into the TX buffer.
1229 */
1230 chbuf = (unsigned char *) buf;
1231
1232 head = portp->tx.head;
1233 tail = portp->tx.tail;
1234 if (head >= tail) {
1235 len = STL_TXBUFSIZE - (head - tail) - 1;
1236 stlen = STL_TXBUFSIZE - (head - portp->tx.buf);
1237 } else {
1238 len = tail - head - 1;
1239 stlen = len;
1240 }
1241
1242 len = MIN(len, count);
1243 count = 0;
1244 while (len > 0) {
1245 stlen = MIN(len, stlen);
1246 memcpy(head, chbuf, stlen);
1247 len -= stlen;
1248 chbuf += stlen;
1249 count += stlen;
1250 head += stlen;
1251 if (head >= (portp->tx.buf + STL_TXBUFSIZE)) {
1252 head = portp->tx.buf;
1253 stlen = tail - head;
1254 }
1255 }
1256 portp->tx.head = head;
1257
1258 clear_bit(ASYI_TXLOW, &portp->istate);
1259 stl_startrxtx(portp, -1, 1);
1260
1261 return(count);
1262}
1263
1264/*****************************************************************************/
1265
1266static void stl_putchar(struct tty_struct *tty, unsigned char ch)
1267{
1268 stlport_t *portp;
1269 unsigned int len;
1270 char *head, *tail;
1271
1272#ifdef DEBUG
1273 printk("stl_putchar(tty=%x,ch=%x)\n", (int) tty, (int) ch);
1274#endif
1275
1276 if (tty == (struct tty_struct *) NULL)
1277 return;
1278 portp = tty->driver_data;
1279 if (portp == (stlport_t *) NULL)
1280 return;
1281 if (portp->tx.buf == (char *) NULL)
1282 return;
1283
1284 head = portp->tx.head;
1285 tail = portp->tx.tail;
1286
1287 len = (head >= tail) ? (STL_TXBUFSIZE - (head - tail)) : (tail - head);
1288 len--;
1289
1290 if (len > 0) {
1291 *head++ = ch;
1292 if (head >= (portp->tx.buf + STL_TXBUFSIZE))
1293 head = portp->tx.buf;
1294 }
1295 portp->tx.head = head;
1296}
1297
1298/*****************************************************************************/
1299
1300/*
1301 * If there are any characters in the buffer then make sure that TX
1302 * interrupts are on and get'em out. Normally used after the putchar
1303 * routine has been called.
1304 */
1305
1306static void stl_flushchars(struct tty_struct *tty)
1307{
1308 stlport_t *portp;
1309
1310#ifdef DEBUG
1311 printk("stl_flushchars(tty=%x)\n", (int) tty);
1312#endif
1313
1314 if (tty == (struct tty_struct *) NULL)
1315 return;
1316 portp = tty->driver_data;
1317 if (portp == (stlport_t *) NULL)
1318 return;
1319 if (portp->tx.buf == (char *) NULL)
1320 return;
1321
1322#if 0
1323 if (tty->stopped || tty->hw_stopped ||
1324 (portp->tx.head == portp->tx.tail))
1325 return;
1326#endif
1327 stl_startrxtx(portp, -1, 1);
1328}
1329
1330/*****************************************************************************/
1331
1332static int stl_writeroom(struct tty_struct *tty)
1333{
1334 stlport_t *portp;
1335 char *head, *tail;
1336
1337#ifdef DEBUG
1338 printk("stl_writeroom(tty=%x)\n", (int) tty);
1339#endif
1340
1341 if (tty == (struct tty_struct *) NULL)
1342 return(0);
1343 portp = tty->driver_data;
1344 if (portp == (stlport_t *) NULL)
1345 return(0);
1346 if (portp->tx.buf == (char *) NULL)
1347 return(0);
1348
1349 head = portp->tx.head;
1350 tail = portp->tx.tail;
1351 return((head >= tail) ? (STL_TXBUFSIZE - (head - tail) - 1) : (tail - head - 1));
1352}
1353
1354/*****************************************************************************/
1355
1356/*
1357 * Return number of chars in the TX buffer. Normally we would just
1358 * calculate the number of chars in the buffer and return that, but if
1359 * the buffer is empty and TX interrupts are still on then we return
1360 * that the buffer still has 1 char in it. This way whoever called us
1361 * will not think that ALL chars have drained - since the UART still
1362 * must have some chars in it (we are busy after all).
1363 */
1364
1365static int stl_charsinbuffer(struct tty_struct *tty)
1366{
1367 stlport_t *portp;
1368 unsigned int size;
1369 char *head, *tail;
1370
1371#ifdef DEBUG
1372 printk("stl_charsinbuffer(tty=%x)\n", (int) tty);
1373#endif
1374
1375 if (tty == (struct tty_struct *) NULL)
1376 return(0);
1377 portp = tty->driver_data;
1378 if (portp == (stlport_t *) NULL)
1379 return(0);
1380 if (portp->tx.buf == (char *) NULL)
1381 return(0);
1382
1383 head = portp->tx.head;
1384 tail = portp->tx.tail;
1385 size = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
1386 if ((size == 0) && test_bit(ASYI_TXBUSY, &portp->istate))
1387 size = 1;
1388 return(size);
1389}
1390
1391/*****************************************************************************/
1392
1393/*
1394 * Generate the serial struct info.
1395 */
1396
1397static int stl_getserial(stlport_t *portp, struct serial_struct __user *sp)
1398{
1399 struct serial_struct sio;
1400 stlbrd_t *brdp;
1401
1402#ifdef DEBUG
1403 printk("stl_getserial(portp=%x,sp=%x)\n", (int) portp, (int) sp);
1404#endif
1405
1406 memset(&sio, 0, sizeof(struct serial_struct));
1407 sio.line = portp->portnr;
1408 sio.port = portp->ioaddr;
1409 sio.flags = portp->flags;
1410 sio.baud_base = portp->baud_base;
1411 sio.close_delay = portp->close_delay;
1412 sio.closing_wait = portp->closing_wait;
1413 sio.custom_divisor = portp->custom_divisor;
1414 sio.hub6 = 0;
1415 if (portp->uartp == &stl_cd1400uart) {
1416 sio.type = PORT_CIRRUS;
1417 sio.xmit_fifo_size = CD1400_TXFIFOSIZE;
1418 } else {
1419 sio.type = PORT_UNKNOWN;
1420 sio.xmit_fifo_size = SC26198_TXFIFOSIZE;
1421 }
1422
1423 brdp = stl_brds[portp->brdnr];
1424 if (brdp != (stlbrd_t *) NULL)
1425 sio.irq = brdp->irq;
1426
1427 return copy_to_user(sp, &sio, sizeof(struct serial_struct)) ? -EFAULT : 0;
1428}
1429
1430/*****************************************************************************/
1431
1432/*
1433 * Set port according to the serial struct info.
1434 * At this point we do not do any auto-configure stuff, so we will
1435 * just quietly ignore any requests to change irq, etc.
1436 */
1437
1438static int stl_setserial(stlport_t *portp, struct serial_struct __user *sp)
1439{
1440 struct serial_struct sio;
1441
1442#ifdef DEBUG
1443 printk("stl_setserial(portp=%x,sp=%x)\n", (int) portp, (int) sp);
1444#endif
1445
1446 if (copy_from_user(&sio, sp, sizeof(struct serial_struct)))
1447 return -EFAULT;
1448 if (!capable(CAP_SYS_ADMIN)) {
1449 if ((sio.baud_base != portp->baud_base) ||
1450 (sio.close_delay != portp->close_delay) ||
1451 ((sio.flags & ~ASYNC_USR_MASK) !=
1452 (portp->flags & ~ASYNC_USR_MASK)))
1453 return(-EPERM);
1454 }
1455
1456 portp->flags = (portp->flags & ~ASYNC_USR_MASK) |
1457 (sio.flags & ASYNC_USR_MASK);
1458 portp->baud_base = sio.baud_base;
1459 portp->close_delay = sio.close_delay;
1460 portp->closing_wait = sio.closing_wait;
1461 portp->custom_divisor = sio.custom_divisor;
1462 stl_setport(portp, portp->tty->termios);
1463 return(0);
1464}
1465
1466/*****************************************************************************/
1467
1468static int stl_tiocmget(struct tty_struct *tty, struct file *file)
1469{
1470 stlport_t *portp;
1471
1472 if (tty == (struct tty_struct *) NULL)
1473 return(-ENODEV);
1474 portp = tty->driver_data;
1475 if (portp == (stlport_t *) NULL)
1476 return(-ENODEV);
1477 if (tty->flags & (1 << TTY_IO_ERROR))
1478 return(-EIO);
1479
1480 return stl_getsignals(portp);
1481}
1482
1483static int stl_tiocmset(struct tty_struct *tty, struct file *file,
1484 unsigned int set, unsigned int clear)
1485{
1486 stlport_t *portp;
1487 int rts = -1, dtr = -1;
1488
1489 if (tty == (struct tty_struct *) NULL)
1490 return(-ENODEV);
1491 portp = tty->driver_data;
1492 if (portp == (stlport_t *) NULL)
1493 return(-ENODEV);
1494 if (tty->flags & (1 << TTY_IO_ERROR))
1495 return(-EIO);
1496
1497 if (set & TIOCM_RTS)
1498 rts = 1;
1499 if (set & TIOCM_DTR)
1500 dtr = 1;
1501 if (clear & TIOCM_RTS)
1502 rts = 0;
1503 if (clear & TIOCM_DTR)
1504 dtr = 0;
1505
1506 stl_setsignals(portp, dtr, rts);
1507 return 0;
1508}
1509
1510static int stl_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1511{
1512 stlport_t *portp;
1513 unsigned int ival;
1514 int rc;
1515 void __user *argp = (void __user *)arg;
1516
1517#ifdef DEBUG
1518 printk("stl_ioctl(tty=%x,file=%x,cmd=%x,arg=%x)\n",
1519 (int) tty, (int) file, cmd, (int) arg);
1520#endif
1521
1522 if (tty == (struct tty_struct *) NULL)
1523 return(-ENODEV);
1524 portp = tty->driver_data;
1525 if (portp == (stlport_t *) NULL)
1526 return(-ENODEV);
1527
1528 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
1529 (cmd != COM_GETPORTSTATS) && (cmd != COM_CLRPORTSTATS)) {
1530 if (tty->flags & (1 << TTY_IO_ERROR))
1531 return(-EIO);
1532 }
1533
1534 rc = 0;
1535
1536 switch (cmd) {
1537 case TIOCGSOFTCAR:
1538 rc = put_user(((tty->termios->c_cflag & CLOCAL) ? 1 : 0),
1539 (unsigned __user *) argp);
1540 break;
1541 case TIOCSSOFTCAR:
1542 if (get_user(ival, (unsigned int __user *) arg))
1543 return -EFAULT;
1544 tty->termios->c_cflag =
1545 (tty->termios->c_cflag & ~CLOCAL) |
1546 (ival ? CLOCAL : 0);
1547 break;
1548 case TIOCGSERIAL:
1549 rc = stl_getserial(portp, argp);
1550 break;
1551 case TIOCSSERIAL:
1552 rc = stl_setserial(portp, argp);
1553 break;
1554 case COM_GETPORTSTATS:
1555 rc = stl_getportstats(portp, argp);
1556 break;
1557 case COM_CLRPORTSTATS:
1558 rc = stl_clrportstats(portp, argp);
1559 break;
1560 case TIOCSERCONFIG:
1561 case TIOCSERGWILD:
1562 case TIOCSERSWILD:
1563 case TIOCSERGETLSR:
1564 case TIOCSERGSTRUCT:
1565 case TIOCSERGETMULTI:
1566 case TIOCSERSETMULTI:
1567 default:
1568 rc = -ENOIOCTLCMD;
1569 break;
1570 }
1571
1572 return(rc);
1573}
1574
1575/*****************************************************************************/
1576
1577static void stl_settermios(struct tty_struct *tty, struct termios *old)
1578{
1579 stlport_t *portp;
1580 struct termios *tiosp;
1581
1582#ifdef DEBUG
1583 printk("stl_settermios(tty=%x,old=%x)\n", (int) tty, (int) old);
1584#endif
1585
1586 if (tty == (struct tty_struct *) NULL)
1587 return;
1588 portp = tty->driver_data;
1589 if (portp == (stlport_t *) NULL)
1590 return;
1591
1592 tiosp = tty->termios;
1593 if ((tiosp->c_cflag == old->c_cflag) &&
1594 (tiosp->c_iflag == old->c_iflag))
1595 return;
1596
1597 stl_setport(portp, tiosp);
1598 stl_setsignals(portp, ((tiosp->c_cflag & (CBAUD & ~CBAUDEX)) ? 1 : 0),
1599 -1);
1600 if ((old->c_cflag & CRTSCTS) && ((tiosp->c_cflag & CRTSCTS) == 0)) {
1601 tty->hw_stopped = 0;
1602 stl_start(tty);
1603 }
1604 if (((old->c_cflag & CLOCAL) == 0) && (tiosp->c_cflag & CLOCAL))
1605 wake_up_interruptible(&portp->open_wait);
1606}
1607
1608/*****************************************************************************/
1609
1610/*
1611 * Attempt to flow control who ever is sending us data. Based on termios
1612 * settings use software or/and hardware flow control.
1613 */
1614
1615static void stl_throttle(struct tty_struct *tty)
1616{
1617 stlport_t *portp;
1618
1619#ifdef DEBUG
1620 printk("stl_throttle(tty=%x)\n", (int) tty);
1621#endif
1622
1623 if (tty == (struct tty_struct *) NULL)
1624 return;
1625 portp = tty->driver_data;
1626 if (portp == (stlport_t *) NULL)
1627 return;
1628 stl_flowctrl(portp, 0);
1629}
1630
1631/*****************************************************************************/
1632
1633/*
1634 * Unflow control the device sending us data...
1635 */
1636
1637static void stl_unthrottle(struct tty_struct *tty)
1638{
1639 stlport_t *portp;
1640
1641#ifdef DEBUG
1642 printk("stl_unthrottle(tty=%x)\n", (int) tty);
1643#endif
1644
1645 if (tty == (struct tty_struct *) NULL)
1646 return;
1647 portp = tty->driver_data;
1648 if (portp == (stlport_t *) NULL)
1649 return;
1650 stl_flowctrl(portp, 1);
1651}
1652
1653/*****************************************************************************/
1654
1655/*
1656 * Stop the transmitter. Basically to do this we will just turn TX
1657 * interrupts off.
1658 */
1659
1660static void stl_stop(struct tty_struct *tty)
1661{
1662 stlport_t *portp;
1663
1664#ifdef DEBUG
1665 printk("stl_stop(tty=%x)\n", (int) tty);
1666#endif
1667
1668 if (tty == (struct tty_struct *) NULL)
1669 return;
1670 portp = tty->driver_data;
1671 if (portp == (stlport_t *) NULL)
1672 return;
1673 stl_startrxtx(portp, -1, 0);
1674}
1675
1676/*****************************************************************************/
1677
1678/*
1679 * Start the transmitter again. Just turn TX interrupts back on.
1680 */
1681
1682static void stl_start(struct tty_struct *tty)
1683{
1684 stlport_t *portp;
1685
1686#ifdef DEBUG
1687 printk("stl_start(tty=%x)\n", (int) tty);
1688#endif
1689
1690 if (tty == (struct tty_struct *) NULL)
1691 return;
1692 portp = tty->driver_data;
1693 if (portp == (stlport_t *) NULL)
1694 return;
1695 stl_startrxtx(portp, -1, 1);
1696}
1697
1698/*****************************************************************************/
1699
1700/*
1701 * Hangup this port. This is pretty much like closing the port, only
1702 * a little more brutal. No waiting for data to drain. Shutdown the
1703 * port and maybe drop signals.
1704 */
1705
1706static void stl_hangup(struct tty_struct *tty)
1707{
1708 stlport_t *portp;
1709
1710#ifdef DEBUG
1711 printk("stl_hangup(tty=%x)\n", (int) tty);
1712#endif
1713
1714 if (tty == (struct tty_struct *) NULL)
1715 return;
1716 portp = tty->driver_data;
1717 if (portp == (stlport_t *) NULL)
1718 return;
1719
1720 portp->flags &= ~ASYNC_INITIALIZED;
1721 stl_disableintrs(portp);
1722 if (tty->termios->c_cflag & HUPCL)
1723 stl_setsignals(portp, 0, 0);
1724 stl_enablerxtx(portp, 0, 0);
1725 stl_flushbuffer(tty);
1726 portp->istate = 0;
1727 set_bit(TTY_IO_ERROR, &tty->flags);
1728 if (portp->tx.buf != (char *) NULL) {
1729 kfree(portp->tx.buf);
1730 portp->tx.buf = (char *) NULL;
1731 portp->tx.head = (char *) NULL;
1732 portp->tx.tail = (char *) NULL;
1733 }
1734 portp->tty = (struct tty_struct *) NULL;
1735 portp->flags &= ~ASYNC_NORMAL_ACTIVE;
1736 portp->refcount = 0;
1737 wake_up_interruptible(&portp->open_wait);
1738}
1739
1740/*****************************************************************************/
1741
1742static void stl_flushbuffer(struct tty_struct *tty)
1743{
1744 stlport_t *portp;
1745
1746#ifdef DEBUG
1747 printk("stl_flushbuffer(tty=%x)\n", (int) tty);
1748#endif
1749
1750 if (tty == (struct tty_struct *) NULL)
1751 return;
1752 portp = tty->driver_data;
1753 if (portp == (stlport_t *) NULL)
1754 return;
1755
1756 stl_flush(portp);
1757 tty_wakeup(tty);
1758}
1759
1760/*****************************************************************************/
1761
1762static void stl_breakctl(struct tty_struct *tty, int state)
1763{
1764 stlport_t *portp;
1765
1766#ifdef DEBUG
1767 printk("stl_breakctl(tty=%x,state=%d)\n", (int) tty, state);
1768#endif
1769
1770 if (tty == (struct tty_struct *) NULL)
1771 return;
1772 portp = tty->driver_data;
1773 if (portp == (stlport_t *) NULL)
1774 return;
1775
1776 stl_sendbreak(portp, ((state == -1) ? 1 : 2));
1777}
1778
1779/*****************************************************************************/
1780
1781static void stl_waituntilsent(struct tty_struct *tty, int timeout)
1782{
1783 stlport_t *portp;
1784 unsigned long tend;
1785
1786#ifdef DEBUG
1787 printk("stl_waituntilsent(tty=%x,timeout=%d)\n", (int) tty, timeout);
1788#endif
1789
1790 if (tty == (struct tty_struct *) NULL)
1791 return;
1792 portp = tty->driver_data;
1793 if (portp == (stlport_t *) NULL)
1794 return;
1795
1796 if (timeout == 0)
1797 timeout = HZ;
1798 tend = jiffies + timeout;
1799
1800 while (stl_datastate(portp)) {
1801 if (signal_pending(current))
1802 break;
1803 msleep_interruptible(20);
1804 if (time_after_eq(jiffies, tend))
1805 break;
1806 }
1807}
1808
1809/*****************************************************************************/
1810
1811static void stl_sendxchar(struct tty_struct *tty, char ch)
1812{
1813 stlport_t *portp;
1814
1815#ifdef DEBUG
1816 printk("stl_sendxchar(tty=%x,ch=%x)\n", (int) tty, ch);
1817#endif
1818
1819 if (tty == (struct tty_struct *) NULL)
1820 return;
1821 portp = tty->driver_data;
1822 if (portp == (stlport_t *) NULL)
1823 return;
1824
1825 if (ch == STOP_CHAR(tty))
1826 stl_sendflow(portp, 0);
1827 else if (ch == START_CHAR(tty))
1828 stl_sendflow(portp, 1);
1829 else
1830 stl_putchar(tty, ch);
1831}
1832
1833/*****************************************************************************/
1834
1835#define MAXLINE 80
1836
1837/*
1838 * Format info for a specified port. The line is deliberately limited
1839 * to 80 characters. (If it is too long it will be truncated, if too
1840 * short then padded with spaces).
1841 */
1842
1843static int stl_portinfo(stlport_t *portp, int portnr, char *pos)
1844{
1845 char *sp;
1846 int sigs, cnt;
1847
1848 sp = pos;
1849 sp += sprintf(sp, "%d: uart:%s tx:%d rx:%d",
1850 portnr, (portp->hwid == 1) ? "SC26198" : "CD1400",
1851 (int) portp->stats.txtotal, (int) portp->stats.rxtotal);
1852
1853 if (portp->stats.rxframing)
1854 sp += sprintf(sp, " fe:%d", (int) portp->stats.rxframing);
1855 if (portp->stats.rxparity)
1856 sp += sprintf(sp, " pe:%d", (int) portp->stats.rxparity);
1857 if (portp->stats.rxbreaks)
1858 sp += sprintf(sp, " brk:%d", (int) portp->stats.rxbreaks);
1859 if (portp->stats.rxoverrun)
1860 sp += sprintf(sp, " oe:%d", (int) portp->stats.rxoverrun);
1861
1862 sigs = stl_getsignals(portp);
1863 cnt = sprintf(sp, "%s%s%s%s%s ",
1864 (sigs & TIOCM_RTS) ? "|RTS" : "",
1865 (sigs & TIOCM_CTS) ? "|CTS" : "",
1866 (sigs & TIOCM_DTR) ? "|DTR" : "",
1867 (sigs & TIOCM_CD) ? "|DCD" : "",
1868 (sigs & TIOCM_DSR) ? "|DSR" : "");
1869 *sp = ' ';
1870 sp += cnt;
1871
1872 for (cnt = (sp - pos); (cnt < (MAXLINE - 1)); cnt++)
1873 *sp++ = ' ';
1874 if (cnt >= MAXLINE)
1875 pos[(MAXLINE - 2)] = '+';
1876 pos[(MAXLINE - 1)] = '\n';
1877
1878 return(MAXLINE);
1879}
1880
1881/*****************************************************************************/
1882
1883/*
1884 * Port info, read from the /proc file system.
1885 */
1886
1887static int stl_readproc(char *page, char **start, off_t off, int count, int *eof, void *data)
1888{
1889 stlbrd_t *brdp;
1890 stlpanel_t *panelp;
1891 stlport_t *portp;
1892 int brdnr, panelnr, portnr, totalport;
1893 int curoff, maxoff;
1894 char *pos;
1895
1896#ifdef DEBUG
1897 printk("stl_readproc(page=%x,start=%x,off=%x,count=%d,eof=%x,"
1898 "data=%x\n", (int) page, (int) start, (int) off, count,
1899 (int) eof, (int) data);
1900#endif
1901
1902 pos = page;
1903 totalport = 0;
1904 curoff = 0;
1905
1906 if (off == 0) {
1907 pos += sprintf(pos, "%s: version %s", stl_drvtitle,
1908 stl_drvversion);
1909 while (pos < (page + MAXLINE - 1))
1910 *pos++ = ' ';
1911 *pos++ = '\n';
1912 }
1913 curoff = MAXLINE;
1914
1915/*
1916 * We scan through for each board, panel and port. The offset is
1917 * calculated on the fly, and irrelevant ports are skipped.
1918 */
1919 for (brdnr = 0; (brdnr < stl_nrbrds); brdnr++) {
1920 brdp = stl_brds[brdnr];
1921 if (brdp == (stlbrd_t *) NULL)
1922 continue;
1923 if (brdp->state == 0)
1924 continue;
1925
1926 maxoff = curoff + (brdp->nrports * MAXLINE);
1927 if (off >= maxoff) {
1928 curoff = maxoff;
1929 continue;
1930 }
1931
1932 totalport = brdnr * STL_MAXPORTS;
1933 for (panelnr = 0; (panelnr < brdp->nrpanels); panelnr++) {
1934 panelp = brdp->panels[panelnr];
1935 if (panelp == (stlpanel_t *) NULL)
1936 continue;
1937
1938 maxoff = curoff + (panelp->nrports * MAXLINE);
1939 if (off >= maxoff) {
1940 curoff = maxoff;
1941 totalport += panelp->nrports;
1942 continue;
1943 }
1944
1945 for (portnr = 0; (portnr < panelp->nrports); portnr++,
1946 totalport++) {
1947 portp = panelp->ports[portnr];
1948 if (portp == (stlport_t *) NULL)
1949 continue;
1950 if (off >= (curoff += MAXLINE))
1951 continue;
1952 if ((pos - page + MAXLINE) > count)
1953 goto stl_readdone;
1954 pos += stl_portinfo(portp, totalport, pos);
1955 }
1956 }
1957 }
1958
1959 *eof = 1;
1960
1961stl_readdone:
1962 *start = page;
1963 return(pos - page);
1964}
1965
1966/*****************************************************************************/
1967
1968/*
1969 * All board interrupts are vectored through here first. This code then
1970 * calls off to the approrpriate board interrupt handlers.
1971 */
1972
1973static irqreturn_t stl_intr(int irq, void *dev_id, struct pt_regs *regs)
1974{
1975 stlbrd_t *brdp = (stlbrd_t *) dev_id;
1976
1977#ifdef DEBUG
1978 printk("stl_intr(brdp=%x,irq=%d,regs=%x)\n", (int) brdp, irq,
1979 (int) regs);
1980#endif
1981
1982 return IRQ_RETVAL((* brdp->isr)(brdp));
1983}
1984
1985/*****************************************************************************/
1986
1987/*
1988 * Interrupt service routine for EasyIO board types.
1989 */
1990
1991static int stl_eiointr(stlbrd_t *brdp)
1992{
1993 stlpanel_t *panelp;
1994 unsigned int iobase;
1995 int handled = 0;
1996
1997 panelp = brdp->panels[0];
1998 iobase = panelp->iobase;
1999 while (inb(brdp->iostatus) & EIO_INTRPEND) {
2000 handled = 1;
2001 (* panelp->isr)(panelp, iobase);
2002 }
2003 return handled;
2004}
2005
2006/*****************************************************************************/
2007
2008/*
2009 * Interrupt service routine for ECH-AT board types.
2010 */
2011
2012static int stl_echatintr(stlbrd_t *brdp)
2013{
2014 stlpanel_t *panelp;
2015 unsigned int ioaddr;
2016 int bnknr;
2017 int handled = 0;
2018
2019 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
2020
2021 while (inb(brdp->iostatus) & ECH_INTRPEND) {
2022 handled = 1;
2023 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
2024 ioaddr = brdp->bnkstataddr[bnknr];
2025 if (inb(ioaddr) & ECH_PNLINTRPEND) {
2026 panelp = brdp->bnk2panel[bnknr];
2027 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
2028 }
2029 }
2030 }
2031
2032 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
2033
2034 return handled;
2035}
2036
2037/*****************************************************************************/
2038
2039/*
2040 * Interrupt service routine for ECH-MCA board types.
2041 */
2042
2043static int stl_echmcaintr(stlbrd_t *brdp)
2044{
2045 stlpanel_t *panelp;
2046 unsigned int ioaddr;
2047 int bnknr;
2048 int handled = 0;
2049
2050 while (inb(brdp->iostatus) & ECH_INTRPEND) {
2051 handled = 1;
2052 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
2053 ioaddr = brdp->bnkstataddr[bnknr];
2054 if (inb(ioaddr) & ECH_PNLINTRPEND) {
2055 panelp = brdp->bnk2panel[bnknr];
2056 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
2057 }
2058 }
2059 }
2060 return handled;
2061}
2062
2063/*****************************************************************************/
2064
2065/*
2066 * Interrupt service routine for ECH-PCI board types.
2067 */
2068
2069static int stl_echpciintr(stlbrd_t *brdp)
2070{
2071 stlpanel_t *panelp;
2072 unsigned int ioaddr;
2073 int bnknr, recheck;
2074 int handled = 0;
2075
2076 while (1) {
2077 recheck = 0;
2078 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
2079 outb(brdp->bnkpageaddr[bnknr], brdp->ioctrl);
2080 ioaddr = brdp->bnkstataddr[bnknr];
2081 if (inb(ioaddr) & ECH_PNLINTRPEND) {
2082 panelp = brdp->bnk2panel[bnknr];
2083 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
2084 recheck++;
2085 handled = 1;
2086 }
2087 }
2088 if (! recheck)
2089 break;
2090 }
2091 return handled;
2092}
2093
2094/*****************************************************************************/
2095
2096/*
2097 * Interrupt service routine for ECH-8/64-PCI board types.
2098 */
2099
2100static int stl_echpci64intr(stlbrd_t *brdp)
2101{
2102 stlpanel_t *panelp;
2103 unsigned int ioaddr;
2104 int bnknr;
2105 int handled = 0;
2106
2107 while (inb(brdp->ioctrl) & 0x1) {
2108 handled = 1;
2109 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
2110 ioaddr = brdp->bnkstataddr[bnknr];
2111 if (inb(ioaddr) & ECH_PNLINTRPEND) {
2112 panelp = brdp->bnk2panel[bnknr];
2113 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
2114 }
2115 }
2116 }
2117
2118 return handled;
2119}
2120
2121/*****************************************************************************/
2122
2123/*
2124 * Service an off-level request for some channel.
2125 */
2126static void stl_offintr(void *private)
2127{
2128 stlport_t *portp;
2129 struct tty_struct *tty;
2130 unsigned int oldsigs;
2131
2132 portp = private;
2133
2134#ifdef DEBUG
2135 printk("stl_offintr(portp=%x)\n", (int) portp);
2136#endif
2137
2138 if (portp == (stlport_t *) NULL)
2139 return;
2140
2141 tty = portp->tty;
2142 if (tty == (struct tty_struct *) NULL)
2143 return;
2144
2145 lock_kernel();
2146 if (test_bit(ASYI_TXLOW, &portp->istate)) {
2147 tty_wakeup(tty);
2148 }
2149 if (test_bit(ASYI_DCDCHANGE, &portp->istate)) {
2150 clear_bit(ASYI_DCDCHANGE, &portp->istate);
2151 oldsigs = portp->sigs;
2152 portp->sigs = stl_getsignals(portp);
2153 if ((portp->sigs & TIOCM_CD) && ((oldsigs & TIOCM_CD) == 0))
2154 wake_up_interruptible(&portp->open_wait);
2155 if ((oldsigs & TIOCM_CD) && ((portp->sigs & TIOCM_CD) == 0)) {
2156 if (portp->flags & ASYNC_CHECK_CD)
2157 tty_hangup(tty); /* FIXME: module removal race here - AKPM */
2158 }
2159 }
2160 unlock_kernel();
2161}
2162
2163/*****************************************************************************/
2164
2165/*
2166 * Initialize all the ports on a panel.
2167 */
2168
2169static int __init stl_initports(stlbrd_t *brdp, stlpanel_t *panelp)
2170{
2171 stlport_t *portp;
2172 int chipmask, i;
2173
2174#ifdef DEBUG
2175 printk("stl_initports(brdp=%x,panelp=%x)\n", (int) brdp, (int) panelp);
2176#endif
2177
2178 chipmask = stl_panelinit(brdp, panelp);
2179
2180/*
2181 * All UART's are initialized (if found!). Now go through and setup
2182 * each ports data structures.
2183 */
2184 for (i = 0; (i < panelp->nrports); i++) {
2185 portp = (stlport_t *) stl_memalloc(sizeof(stlport_t));
2186 if (portp == (stlport_t *) NULL) {
2187 printk("STALLION: failed to allocate memory "
2188 "(size=%d)\n", sizeof(stlport_t));
2189 break;
2190 }
2191 memset(portp, 0, sizeof(stlport_t));
2192
2193 portp->magic = STL_PORTMAGIC;
2194 portp->portnr = i;
2195 portp->brdnr = panelp->brdnr;
2196 portp->panelnr = panelp->panelnr;
2197 portp->uartp = panelp->uartp;
2198 portp->clk = brdp->clk;
2199 portp->baud_base = STL_BAUDBASE;
2200 portp->close_delay = STL_CLOSEDELAY;
2201 portp->closing_wait = 30 * HZ;
2202 INIT_WORK(&portp->tqueue, stl_offintr, portp);
2203 init_waitqueue_head(&portp->open_wait);
2204 init_waitqueue_head(&portp->close_wait);
2205 portp->stats.brd = portp->brdnr;
2206 portp->stats.panel = portp->panelnr;
2207 portp->stats.port = portp->portnr;
2208 panelp->ports[i] = portp;
2209 stl_portinit(brdp, panelp, portp);
2210 }
2211
2212 return(0);
2213}
2214
2215/*****************************************************************************/
2216
2217/*
2218 * Try to find and initialize an EasyIO board.
2219 */
2220
2221static inline int stl_initeio(stlbrd_t *brdp)
2222{
2223 stlpanel_t *panelp;
2224 unsigned int status;
2225 char *name;
2226 int rc;
2227
2228#ifdef DEBUG
2229 printk("stl_initeio(brdp=%x)\n", (int) brdp);
2230#endif
2231
2232 brdp->ioctrl = brdp->ioaddr1 + 1;
2233 brdp->iostatus = brdp->ioaddr1 + 2;
2234
2235 status = inb(brdp->iostatus);
2236 if ((status & EIO_IDBITMASK) == EIO_MK3)
2237 brdp->ioctrl++;
2238
2239/*
2240 * Handle board specific stuff now. The real difference is PCI
2241 * or not PCI.
2242 */
2243 if (brdp->brdtype == BRD_EASYIOPCI) {
2244 brdp->iosize1 = 0x80;
2245 brdp->iosize2 = 0x80;
2246 name = "serial(EIO-PCI)";
2247 outb(0x41, (brdp->ioaddr2 + 0x4c));
2248 } else {
2249 brdp->iosize1 = 8;
2250 name = "serial(EIO)";
2251 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2252 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
2253 printk("STALLION: invalid irq=%d for brd=%d\n",
2254 brdp->irq, brdp->brdnr);
2255 return(-EINVAL);
2256 }
2257 outb((stl_vecmap[brdp->irq] | EIO_0WS |
2258 ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)),
2259 brdp->ioctrl);
2260 }
2261
2262 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
2263 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
2264 "%x conflicts with another device\n", brdp->brdnr,
2265 brdp->ioaddr1);
2266 return(-EBUSY);
2267 }
2268
2269 if (brdp->iosize2 > 0)
2270 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
2271 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
2272 "address %x conflicts with another device\n",
2273 brdp->brdnr, brdp->ioaddr2);
2274 printk(KERN_WARNING "STALLION: Warning, also "
2275 "releasing board %d I/O address %x \n",
2276 brdp->brdnr, brdp->ioaddr1);
2277 release_region(brdp->ioaddr1, brdp->iosize1);
2278 return(-EBUSY);
2279 }
2280
2281/*
2282 * Everything looks OK, so let's go ahead and probe for the hardware.
2283 */
2284 brdp->clk = CD1400_CLK;
2285 brdp->isr = stl_eiointr;
2286
2287 switch (status & EIO_IDBITMASK) {
2288 case EIO_8PORTM:
2289 brdp->clk = CD1400_CLK8M;
2290 /* fall thru */
2291 case EIO_8PORTRS:
2292 case EIO_8PORTDI:
2293 brdp->nrports = 8;
2294 break;
2295 case EIO_4PORTRS:
2296 brdp->nrports = 4;
2297 break;
2298 case EIO_MK3:
2299 switch (status & EIO_BRDMASK) {
2300 case ID_BRD4:
2301 brdp->nrports = 4;
2302 break;
2303 case ID_BRD8:
2304 brdp->nrports = 8;
2305 break;
2306 case ID_BRD16:
2307 brdp->nrports = 16;
2308 break;
2309 default:
2310 return(-ENODEV);
2311 }
2312 break;
2313 default:
2314 return(-ENODEV);
2315 }
2316
2317/*
2318 * We have verified that the board is actually present, so now we
2319 * can complete the setup.
2320 */
2321
2322 panelp = (stlpanel_t *) stl_memalloc(sizeof(stlpanel_t));
2323 if (panelp == (stlpanel_t *) NULL) {
2324 printk(KERN_WARNING "STALLION: failed to allocate memory "
2325 "(size=%d)\n", sizeof(stlpanel_t));
2326 return(-ENOMEM);
2327 }
2328 memset(panelp, 0, sizeof(stlpanel_t));
2329
2330 panelp->magic = STL_PANELMAGIC;
2331 panelp->brdnr = brdp->brdnr;
2332 panelp->panelnr = 0;
2333 panelp->nrports = brdp->nrports;
2334 panelp->iobase = brdp->ioaddr1;
2335 panelp->hwid = status;
2336 if ((status & EIO_IDBITMASK) == EIO_MK3) {
2337 panelp->uartp = (void *) &stl_sc26198uart;
2338 panelp->isr = stl_sc26198intr;
2339 } else {
2340 panelp->uartp = (void *) &stl_cd1400uart;
2341 panelp->isr = stl_cd1400eiointr;
2342 }
2343
2344 brdp->panels[0] = panelp;
2345 brdp->nrpanels = 1;
2346 brdp->state |= BRD_FOUND;
2347 brdp->hwid = status;
2348 if (request_irq(brdp->irq, stl_intr, SA_SHIRQ, name, brdp) != 0) {
2349 printk("STALLION: failed to register interrupt "
2350 "routine for %s irq=%d\n", name, brdp->irq);
2351 rc = -ENODEV;
2352 } else {
2353 rc = 0;
2354 }
2355 return(rc);
2356}
2357
2358/*****************************************************************************/
2359
2360/*
2361 * Try to find an ECH board and initialize it. This code is capable of
2362 * dealing with all types of ECH board.
2363 */
2364
2365static inline int stl_initech(stlbrd_t *brdp)
2366{
2367 stlpanel_t *panelp;
2368 unsigned int status, nxtid, ioaddr, conflict;
2369 int panelnr, banknr, i;
2370 char *name;
2371
2372#ifdef DEBUG
2373 printk("stl_initech(brdp=%x)\n", (int) brdp);
2374#endif
2375
2376 status = 0;
2377 conflict = 0;
2378
2379/*
2380 * Set up the initial board register contents for boards. This varies a
2381 * bit between the different board types. So we need to handle each
2382 * separately. Also do a check that the supplied IRQ is good.
2383 */
2384 switch (brdp->brdtype) {
2385
2386 case BRD_ECH:
2387 brdp->isr = stl_echatintr;
2388 brdp->ioctrl = brdp->ioaddr1 + 1;
2389 brdp->iostatus = brdp->ioaddr1 + 1;
2390 status = inb(brdp->iostatus);
2391 if ((status & ECH_IDBITMASK) != ECH_ID)
2392 return(-ENODEV);
2393 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2394 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
2395 printk("STALLION: invalid irq=%d for brd=%d\n",
2396 brdp->irq, brdp->brdnr);
2397 return(-EINVAL);
2398 }
2399 status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1);
2400 status |= (stl_vecmap[brdp->irq] << 1);
2401 outb((status | ECH_BRDRESET), brdp->ioaddr1);
2402 brdp->ioctrlval = ECH_INTENABLE |
2403 ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE);
2404 for (i = 0; (i < 10); i++)
2405 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
2406 brdp->iosize1 = 2;
2407 brdp->iosize2 = 32;
2408 name = "serial(EC8/32)";
2409 outb(status, brdp->ioaddr1);
2410 break;
2411
2412 case BRD_ECHMC:
2413 brdp->isr = stl_echmcaintr;
2414 brdp->ioctrl = brdp->ioaddr1 + 0x20;
2415 brdp->iostatus = brdp->ioctrl;
2416 status = inb(brdp->iostatus);
2417 if ((status & ECH_IDBITMASK) != ECH_ID)
2418 return(-ENODEV);
2419 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2420 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
2421 printk("STALLION: invalid irq=%d for brd=%d\n",
2422 brdp->irq, brdp->brdnr);
2423 return(-EINVAL);
2424 }
2425 outb(ECHMC_BRDRESET, brdp->ioctrl);
2426 outb(ECHMC_INTENABLE, brdp->ioctrl);
2427 brdp->iosize1 = 64;
2428 name = "serial(EC8/32-MC)";
2429 break;
2430
2431 case BRD_ECHPCI:
2432 brdp->isr = stl_echpciintr;
2433 brdp->ioctrl = brdp->ioaddr1 + 2;
2434 brdp->iosize1 = 4;
2435 brdp->iosize2 = 8;
2436 name = "serial(EC8/32-PCI)";
2437 break;
2438
2439 case BRD_ECH64PCI:
2440 brdp->isr = stl_echpci64intr;
2441 brdp->ioctrl = brdp->ioaddr2 + 0x40;
2442 outb(0x43, (brdp->ioaddr1 + 0x4c));
2443 brdp->iosize1 = 0x80;
2444 brdp->iosize2 = 0x80;
2445 name = "serial(EC8/64-PCI)";
2446 break;
2447
2448 default:
2449 printk("STALLION: unknown board type=%d\n", brdp->brdtype);
2450 return(-EINVAL);
2451 break;
2452 }
2453
2454/*
2455 * Check boards for possible IO address conflicts and return fail status
2456 * if an IO conflict found.
2457 */
2458 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
2459 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
2460 "%x conflicts with another device\n", brdp->brdnr,
2461 brdp->ioaddr1);
2462 return(-EBUSY);
2463 }
2464
2465 if (brdp->iosize2 > 0)
2466 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
2467 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
2468 "address %x conflicts with another device\n",
2469 brdp->brdnr, brdp->ioaddr2);
2470 printk(KERN_WARNING "STALLION: Warning, also "
2471 "releasing board %d I/O address %x \n",
2472 brdp->brdnr, brdp->ioaddr1);
2473 release_region(brdp->ioaddr1, brdp->iosize1);
2474 return(-EBUSY);
2475 }
2476
2477/*
2478 * Scan through the secondary io address space looking for panels.
2479 * As we find'em allocate and initialize panel structures for each.
2480 */
2481 brdp->clk = CD1400_CLK;
2482 brdp->hwid = status;
2483
2484 ioaddr = brdp->ioaddr2;
2485 banknr = 0;
2486 panelnr = 0;
2487 nxtid = 0;
2488
2489 for (i = 0; (i < STL_MAXPANELS); i++) {
2490 if (brdp->brdtype == BRD_ECHPCI) {
2491 outb(nxtid, brdp->ioctrl);
2492 ioaddr = brdp->ioaddr2;
2493 }
2494 status = inb(ioaddr + ECH_PNLSTATUS);
2495 if ((status & ECH_PNLIDMASK) != nxtid)
2496 break;
2497 panelp = (stlpanel_t *) stl_memalloc(sizeof(stlpanel_t));
2498 if (panelp == (stlpanel_t *) NULL) {
2499 printk("STALLION: failed to allocate memory "
2500 "(size=%d)\n", sizeof(stlpanel_t));
2501 break;
2502 }
2503 memset(panelp, 0, sizeof(stlpanel_t));
2504 panelp->magic = STL_PANELMAGIC;
2505 panelp->brdnr = brdp->brdnr;
2506 panelp->panelnr = panelnr;
2507 panelp->iobase = ioaddr;
2508 panelp->pagenr = nxtid;
2509 panelp->hwid = status;
2510 brdp->bnk2panel[banknr] = panelp;
2511 brdp->bnkpageaddr[banknr] = nxtid;
2512 brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS;
2513
2514 if (status & ECH_PNLXPID) {
2515 panelp->uartp = (void *) &stl_sc26198uart;
2516 panelp->isr = stl_sc26198intr;
2517 if (status & ECH_PNL16PORT) {
2518 panelp->nrports = 16;
2519 brdp->bnk2panel[banknr] = panelp;
2520 brdp->bnkpageaddr[banknr] = nxtid;
2521 brdp->bnkstataddr[banknr++] = ioaddr + 4 +
2522 ECH_PNLSTATUS;
2523 } else {
2524 panelp->nrports = 8;
2525 }
2526 } else {
2527 panelp->uartp = (void *) &stl_cd1400uart;
2528 panelp->isr = stl_cd1400echintr;
2529 if (status & ECH_PNL16PORT) {
2530 panelp->nrports = 16;
2531 panelp->ackmask = 0x80;
2532 if (brdp->brdtype != BRD_ECHPCI)
2533 ioaddr += EREG_BANKSIZE;
2534 brdp->bnk2panel[banknr] = panelp;
2535 brdp->bnkpageaddr[banknr] = ++nxtid;
2536 brdp->bnkstataddr[banknr++] = ioaddr +
2537 ECH_PNLSTATUS;
2538 } else {
2539 panelp->nrports = 8;
2540 panelp->ackmask = 0xc0;
2541 }
2542 }
2543
2544 nxtid++;
2545 ioaddr += EREG_BANKSIZE;
2546 brdp->nrports += panelp->nrports;
2547 brdp->panels[panelnr++] = panelp;
2548 if ((brdp->brdtype != BRD_ECHPCI) &&
2549 (ioaddr >= (brdp->ioaddr2 + brdp->iosize2)))
2550 break;
2551 }
2552
2553 brdp->nrpanels = panelnr;
2554 brdp->nrbnks = banknr;
2555 if (brdp->brdtype == BRD_ECH)
2556 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
2557
2558 brdp->state |= BRD_FOUND;
2559 if (request_irq(brdp->irq, stl_intr, SA_SHIRQ, name, brdp) != 0) {
2560 printk("STALLION: failed to register interrupt "
2561 "routine for %s irq=%d\n", name, brdp->irq);
2562 i = -ENODEV;
2563 } else {
2564 i = 0;
2565 }
2566
2567 return(i);
2568}
2569
2570/*****************************************************************************/
2571
2572/*
2573 * Initialize and configure the specified board.
2574 * Scan through all the boards in the configuration and see what we
2575 * can find. Handle EIO and the ECH boards a little differently here
2576 * since the initial search and setup is very different.
2577 */
2578
2579static int __init stl_brdinit(stlbrd_t *brdp)
2580{
2581 int i;
2582
2583#ifdef DEBUG
2584 printk("stl_brdinit(brdp=%x)\n", (int) brdp);
2585#endif
2586
2587 switch (brdp->brdtype) {
2588 case BRD_EASYIO:
2589 case BRD_EASYIOPCI:
2590 stl_initeio(brdp);
2591 break;
2592 case BRD_ECH:
2593 case BRD_ECHMC:
2594 case BRD_ECHPCI:
2595 case BRD_ECH64PCI:
2596 stl_initech(brdp);
2597 break;
2598 default:
2599 printk("STALLION: board=%d is unknown board type=%d\n",
2600 brdp->brdnr, brdp->brdtype);
2601 return(ENODEV);
2602 }
2603
2604 stl_brds[brdp->brdnr] = brdp;
2605 if ((brdp->state & BRD_FOUND) == 0) {
2606 printk("STALLION: %s board not found, board=%d io=%x irq=%d\n",
2607 stl_brdnames[brdp->brdtype], brdp->brdnr,
2608 brdp->ioaddr1, brdp->irq);
2609 return(ENODEV);
2610 }
2611
2612 for (i = 0; (i < STL_MAXPANELS); i++)
2613 if (brdp->panels[i] != (stlpanel_t *) NULL)
2614 stl_initports(brdp, brdp->panels[i]);
2615
2616 printk("STALLION: %s found, board=%d io=%x irq=%d "
2617 "nrpanels=%d nrports=%d\n", stl_brdnames[brdp->brdtype],
2618 brdp->brdnr, brdp->ioaddr1, brdp->irq, brdp->nrpanels,
2619 brdp->nrports);
2620 return(0);
2621}
2622
2623/*****************************************************************************/
2624
2625/*
2626 * Find the next available board number that is free.
2627 */
2628
2629static inline int stl_getbrdnr(void)
2630{
2631 int i;
2632
2633 for (i = 0; (i < STL_MAXBRDS); i++) {
2634 if (stl_brds[i] == (stlbrd_t *) NULL) {
2635 if (i >= stl_nrbrds)
2636 stl_nrbrds = i + 1;
2637 return(i);
2638 }
2639 }
2640 return(-1);
2641}
2642
2643/*****************************************************************************/
2644
2645#ifdef CONFIG_PCI
2646
2647/*
2648 * We have a Stallion board. Allocate a board structure and
2649 * initialize it. Read its IO and IRQ resources from PCI
2650 * configuration space.
2651 */
2652
2653static inline int stl_initpcibrd(int brdtype, struct pci_dev *devp)
2654{
2655 stlbrd_t *brdp;
2656
2657#ifdef DEBUG
2658 printk("stl_initpcibrd(brdtype=%d,busnr=%x,devnr=%x)\n", brdtype,
2659 devp->bus->number, devp->devfn);
2660#endif
2661
2662 if (pci_enable_device(devp))
2663 return(-EIO);
2664 if ((brdp = stl_allocbrd()) == (stlbrd_t *) NULL)
2665 return(-ENOMEM);
2666 if ((brdp->brdnr = stl_getbrdnr()) < 0) {
2667 printk("STALLION: too many boards found, "
2668 "maximum supported %d\n", STL_MAXBRDS);
2669 return(0);
2670 }
2671 brdp->brdtype = brdtype;
2672
2673/*
2674 * Different Stallion boards use the BAR registers in different ways,
2675 * so set up io addresses based on board type.
2676 */
2677#ifdef DEBUG
2678 printk("%s(%d): BAR[]=%x,%x,%x,%x IRQ=%x\n", __FILE__, __LINE__,
2679 pci_resource_start(devp, 0), pci_resource_start(devp, 1),
2680 pci_resource_start(devp, 2), pci_resource_start(devp, 3), devp->irq);
2681#endif
2682
2683/*
2684 * We have all resources from the board, so let's setup the actual
2685 * board structure now.
2686 */
2687 switch (brdtype) {
2688 case BRD_ECHPCI:
2689 brdp->ioaddr2 = pci_resource_start(devp, 0);
2690 brdp->ioaddr1 = pci_resource_start(devp, 1);
2691 break;
2692 case BRD_ECH64PCI:
2693 brdp->ioaddr2 = pci_resource_start(devp, 2);
2694 brdp->ioaddr1 = pci_resource_start(devp, 1);
2695 break;
2696 case BRD_EASYIOPCI:
2697 brdp->ioaddr1 = pci_resource_start(devp, 2);
2698 brdp->ioaddr2 = pci_resource_start(devp, 1);
2699 break;
2700 default:
2701 printk("STALLION: unknown PCI board type=%d\n", brdtype);
2702 break;
2703 }
2704
2705 brdp->irq = devp->irq;
2706 stl_brdinit(brdp);
2707
2708 return(0);
2709}
2710
2711/*****************************************************************************/
2712
2713/*
2714 * Find all Stallion PCI boards that might be installed. Initialize each
2715 * one as it is found.
2716 */
2717
2718
2719static inline int stl_findpcibrds(void)
2720{
2721 struct pci_dev *dev = NULL;
2722 int i, rc;
2723
2724#ifdef DEBUG
2725 printk("stl_findpcibrds()\n");
2726#endif
2727
2728 for (i = 0; (i < stl_nrpcibrds); i++)
2729 while ((dev = pci_find_device(stl_pcibrds[i].vendid,
2730 stl_pcibrds[i].devid, dev))) {
2731
2732/*
2733 * Found a device on the PCI bus that has our vendor and
2734 * device ID. Need to check now that it is really us.
2735 */
2736 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE)
2737 continue;
2738
2739 rc = stl_initpcibrd(stl_pcibrds[i].brdtype, dev);
2740 if (rc)
2741 return(rc);
2742 }
2743
2744 return(0);
2745}
2746
2747#endif
2748
2749/*****************************************************************************/
2750
2751/*
2752 * Scan through all the boards in the configuration and see what we
2753 * can find. Handle EIO and the ECH boards a little differently here
2754 * since the initial search and setup is too different.
2755 */
2756
2757static inline int stl_initbrds(void)
2758{
2759 stlbrd_t *brdp;
2760 stlconf_t *confp;
2761 int i;
2762
2763#ifdef DEBUG
2764 printk("stl_initbrds()\n");
2765#endif
2766
2767 if (stl_nrbrds > STL_MAXBRDS) {
2768 printk("STALLION: too many boards in configuration table, "
2769 "truncating to %d\n", STL_MAXBRDS);
2770 stl_nrbrds = STL_MAXBRDS;
2771 }
2772
2773/*
2774 * Firstly scan the list of static boards configured. Allocate
2775 * resources and initialize the boards as found.
2776 */
2777 for (i = 0; (i < stl_nrbrds); i++) {
2778 confp = &stl_brdconf[i];
2779 stl_parsebrd(confp, stl_brdsp[i]);
2780 if ((brdp = stl_allocbrd()) == (stlbrd_t *) NULL)
2781 return(-ENOMEM);
2782 brdp->brdnr = i;
2783 brdp->brdtype = confp->brdtype;
2784 brdp->ioaddr1 = confp->ioaddr1;
2785 brdp->ioaddr2 = confp->ioaddr2;
2786 brdp->irq = confp->irq;
2787 brdp->irqtype = confp->irqtype;
2788 stl_brdinit(brdp);
2789 }
2790
2791/*
2792 * Find any dynamically supported boards. That is via module load
2793 * line options or auto-detected on the PCI bus.
2794 */
2795 stl_argbrds();
2796#ifdef CONFIG_PCI
2797 stl_findpcibrds();
2798#endif
2799
2800 return(0);
2801}
2802
2803/*****************************************************************************/
2804
2805/*
2806 * Return the board stats structure to user app.
2807 */
2808
2809static int stl_getbrdstats(combrd_t __user *bp)
2810{
2811 stlbrd_t *brdp;
2812 stlpanel_t *panelp;
2813 int i;
2814
2815 if (copy_from_user(&stl_brdstats, bp, sizeof(combrd_t)))
2816 return -EFAULT;
2817 if (stl_brdstats.brd >= STL_MAXBRDS)
2818 return(-ENODEV);
2819 brdp = stl_brds[stl_brdstats.brd];
2820 if (brdp == (stlbrd_t *) NULL)
2821 return(-ENODEV);
2822
2823 memset(&stl_brdstats, 0, sizeof(combrd_t));
2824 stl_brdstats.brd = brdp->brdnr;
2825 stl_brdstats.type = brdp->brdtype;
2826 stl_brdstats.hwid = brdp->hwid;
2827 stl_brdstats.state = brdp->state;
2828 stl_brdstats.ioaddr = brdp->ioaddr1;
2829 stl_brdstats.ioaddr2 = brdp->ioaddr2;
2830 stl_brdstats.irq = brdp->irq;
2831 stl_brdstats.nrpanels = brdp->nrpanels;
2832 stl_brdstats.nrports = brdp->nrports;
2833 for (i = 0; (i < brdp->nrpanels); i++) {
2834 panelp = brdp->panels[i];
2835 stl_brdstats.panels[i].panel = i;
2836 stl_brdstats.panels[i].hwid = panelp->hwid;
2837 stl_brdstats.panels[i].nrports = panelp->nrports;
2838 }
2839
2840 return copy_to_user(bp, &stl_brdstats, sizeof(combrd_t)) ? -EFAULT : 0;
2841}
2842
2843/*****************************************************************************/
2844
2845/*
2846 * Resolve the referenced port number into a port struct pointer.
2847 */
2848
2849static stlport_t *stl_getport(int brdnr, int panelnr, int portnr)
2850{
2851 stlbrd_t *brdp;
2852 stlpanel_t *panelp;
2853
2854 if ((brdnr < 0) || (brdnr >= STL_MAXBRDS))
2855 return((stlport_t *) NULL);
2856 brdp = stl_brds[brdnr];
2857 if (brdp == (stlbrd_t *) NULL)
2858 return((stlport_t *) NULL);
2859 if ((panelnr < 0) || (panelnr >= brdp->nrpanels))
2860 return((stlport_t *) NULL);
2861 panelp = brdp->panels[panelnr];
2862 if (panelp == (stlpanel_t *) NULL)
2863 return((stlport_t *) NULL);
2864 if ((portnr < 0) || (portnr >= panelp->nrports))
2865 return((stlport_t *) NULL);
2866 return(panelp->ports[portnr]);
2867}
2868
2869/*****************************************************************************/
2870
2871/*
2872 * Return the port stats structure to user app. A NULL port struct
2873 * pointer passed in means that we need to find out from the app
2874 * what port to get stats for (used through board control device).
2875 */
2876
2877static int stl_getportstats(stlport_t *portp, comstats_t __user *cp)
2878{
2879 unsigned char *head, *tail;
2880 unsigned long flags;
2881
2882 if (!portp) {
2883 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2884 return -EFAULT;
2885 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2886 stl_comstats.port);
2887 if (portp == (stlport_t *) NULL)
2888 return(-ENODEV);
2889 }
2890
2891 portp->stats.state = portp->istate;
2892 portp->stats.flags = portp->flags;
2893 portp->stats.hwid = portp->hwid;
2894
2895 portp->stats.ttystate = 0;
2896 portp->stats.cflags = 0;
2897 portp->stats.iflags = 0;
2898 portp->stats.oflags = 0;
2899 portp->stats.lflags = 0;
2900 portp->stats.rxbuffered = 0;
2901
2902 save_flags(flags);
2903 cli();
2904 if (portp->tty != (struct tty_struct *) NULL) {
2905 if (portp->tty->driver_data == portp) {
2906 portp->stats.ttystate = portp->tty->flags;
2907 portp->stats.rxbuffered = portp->tty->flip.count;
2908 if (portp->tty->termios != (struct termios *) NULL) {
2909 portp->stats.cflags = portp->tty->termios->c_cflag;
2910 portp->stats.iflags = portp->tty->termios->c_iflag;
2911 portp->stats.oflags = portp->tty->termios->c_oflag;
2912 portp->stats.lflags = portp->tty->termios->c_lflag;
2913 }
2914 }
2915 }
2916 restore_flags(flags);
2917
2918 head = portp->tx.head;
2919 tail = portp->tx.tail;
2920 portp->stats.txbuffered = ((head >= tail) ? (head - tail) :
2921 (STL_TXBUFSIZE - (tail - head)));
2922
2923 portp->stats.signals = (unsigned long) stl_getsignals(portp);
2924
2925 return copy_to_user(cp, &portp->stats,
2926 sizeof(comstats_t)) ? -EFAULT : 0;
2927}
2928
2929/*****************************************************************************/
2930
2931/*
2932 * Clear the port stats structure. We also return it zeroed out...
2933 */
2934
2935static int stl_clrportstats(stlport_t *portp, comstats_t __user *cp)
2936{
2937 if (!portp) {
2938 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2939 return -EFAULT;
2940 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2941 stl_comstats.port);
2942 if (portp == (stlport_t *) NULL)
2943 return(-ENODEV);
2944 }
2945
2946 memset(&portp->stats, 0, sizeof(comstats_t));
2947 portp->stats.brd = portp->brdnr;
2948 portp->stats.panel = portp->panelnr;
2949 portp->stats.port = portp->portnr;
2950 return copy_to_user(cp, &portp->stats,
2951 sizeof(comstats_t)) ? -EFAULT : 0;
2952}
2953
2954/*****************************************************************************/
2955
2956/*
2957 * Return the entire driver ports structure to a user app.
2958 */
2959
2960static int stl_getportstruct(stlport_t __user *arg)
2961{
2962 stlport_t *portp;
2963
2964 if (copy_from_user(&stl_dummyport, arg, sizeof(stlport_t)))
2965 return -EFAULT;
2966 portp = stl_getport(stl_dummyport.brdnr, stl_dummyport.panelnr,
2967 stl_dummyport.portnr);
2968 if (!portp)
2969 return -ENODEV;
2970 return copy_to_user(arg, portp, sizeof(stlport_t)) ? -EFAULT : 0;
2971}
2972
2973/*****************************************************************************/
2974
2975/*
2976 * Return the entire driver board structure to a user app.
2977 */
2978
2979static int stl_getbrdstruct(stlbrd_t __user *arg)
2980{
2981 stlbrd_t *brdp;
2982
2983 if (copy_from_user(&stl_dummybrd, arg, sizeof(stlbrd_t)))
2984 return -EFAULT;
2985 if ((stl_dummybrd.brdnr < 0) || (stl_dummybrd.brdnr >= STL_MAXBRDS))
2986 return -ENODEV;
2987 brdp = stl_brds[stl_dummybrd.brdnr];
2988 if (!brdp)
2989 return(-ENODEV);
2990 return copy_to_user(arg, brdp, sizeof(stlbrd_t)) ? -EFAULT : 0;
2991}
2992
2993/*****************************************************************************/
2994
2995/*
2996 * The "staliomem" device is also required to do some special operations
2997 * on the board and/or ports. In this driver it is mostly used for stats
2998 * collection.
2999 */
3000
3001static int stl_memioctl(struct inode *ip, struct file *fp, unsigned int cmd, unsigned long arg)
3002{
3003 int brdnr, rc;
3004 void __user *argp = (void __user *)arg;
3005
3006#ifdef DEBUG
3007 printk("stl_memioctl(ip=%x,fp=%x,cmd=%x,arg=%x)\n", (int) ip,
3008 (int) fp, cmd, (int) arg);
3009#endif
3010
3011 brdnr = iminor(ip);
3012 if (brdnr >= STL_MAXBRDS)
3013 return(-ENODEV);
3014 rc = 0;
3015
3016 switch (cmd) {
3017 case COM_GETPORTSTATS:
3018 rc = stl_getportstats(NULL, argp);
3019 break;
3020 case COM_CLRPORTSTATS:
3021 rc = stl_clrportstats(NULL, argp);
3022 break;
3023 case COM_GETBRDSTATS:
3024 rc = stl_getbrdstats(argp);
3025 break;
3026 case COM_READPORT:
3027 rc = stl_getportstruct(argp);
3028 break;
3029 case COM_READBOARD:
3030 rc = stl_getbrdstruct(argp);
3031 break;
3032 default:
3033 rc = -ENOIOCTLCMD;
3034 break;
3035 }
3036
3037 return(rc);
3038}
3039
3040static struct tty_operations stl_ops = {
3041 .open = stl_open,
3042 .close = stl_close,
3043 .write = stl_write,
3044 .put_char = stl_putchar,
3045 .flush_chars = stl_flushchars,
3046 .write_room = stl_writeroom,
3047 .chars_in_buffer = stl_charsinbuffer,
3048 .ioctl = stl_ioctl,
3049 .set_termios = stl_settermios,
3050 .throttle = stl_throttle,
3051 .unthrottle = stl_unthrottle,
3052 .stop = stl_stop,
3053 .start = stl_start,
3054 .hangup = stl_hangup,
3055 .flush_buffer = stl_flushbuffer,
3056 .break_ctl = stl_breakctl,
3057 .wait_until_sent = stl_waituntilsent,
3058 .send_xchar = stl_sendxchar,
3059 .read_proc = stl_readproc,
3060 .tiocmget = stl_tiocmget,
3061 .tiocmset = stl_tiocmset,
3062};
3063
3064/*****************************************************************************/
3065
3066int __init stl_init(void)
3067{
3068 int i;
3069 printk(KERN_INFO "%s: version %s\n", stl_drvtitle, stl_drvversion);
3070
3071 stl_initbrds();
3072
3073 stl_serial = alloc_tty_driver(STL_MAXBRDS * STL_MAXPORTS);
3074 if (!stl_serial)
3075 return -1;
3076
3077/*
3078 * Allocate a temporary write buffer.
3079 */
3080 stl_tmpwritebuf = (char *) stl_memalloc(STL_TXBUFSIZE);
3081 if (stl_tmpwritebuf == (char *) NULL)
3082 printk("STALLION: failed to allocate memory (size=%d)\n",
3083 STL_TXBUFSIZE);
3084
3085/*
3086 * Set up a character driver for per board stuff. This is mainly used
3087 * to do stats ioctls on the ports.
3088 */
3089 if (register_chrdev(STL_SIOMEMMAJOR, "staliomem", &stl_fsiomem))
3090 printk("STALLION: failed to register serial board device\n");
3091 devfs_mk_dir("staliomem");
3092
3093 stallion_class = class_simple_create(THIS_MODULE, "staliomem");
3094 for (i = 0; i < 4; i++) {
3095 devfs_mk_cdev(MKDEV(STL_SIOMEMMAJOR, i),
3096 S_IFCHR|S_IRUSR|S_IWUSR,
3097 "staliomem/%d", i);
3098 class_simple_device_add(stallion_class, MKDEV(STL_SIOMEMMAJOR, i), NULL, "staliomem%d", i);
3099 }
3100
3101 stl_serial->owner = THIS_MODULE;
3102 stl_serial->driver_name = stl_drvname;
3103 stl_serial->name = "ttyE";
3104 stl_serial->devfs_name = "tts/E";
3105 stl_serial->major = STL_SERIALMAJOR;
3106 stl_serial->minor_start = 0;
3107 stl_serial->type = TTY_DRIVER_TYPE_SERIAL;
3108 stl_serial->subtype = SERIAL_TYPE_NORMAL;
3109 stl_serial->init_termios = stl_deftermios;
3110 stl_serial->flags = TTY_DRIVER_REAL_RAW;
3111 tty_set_operations(stl_serial, &stl_ops);
3112
3113 if (tty_register_driver(stl_serial)) {
3114 put_tty_driver(stl_serial);
3115 printk("STALLION: failed to register serial driver\n");
3116 return -1;
3117 }
3118
3119 return(0);
3120}
3121
3122/*****************************************************************************/
3123/* CD1400 HARDWARE FUNCTIONS */
3124/*****************************************************************************/
3125
3126/*
3127 * These functions get/set/update the registers of the cd1400 UARTs.
3128 * Access to the cd1400 registers is via an address/data io port pair.
3129 * (Maybe should make this inline...)
3130 */
3131
3132static int stl_cd1400getreg(stlport_t *portp, int regnr)
3133{
3134 outb((regnr + portp->uartaddr), portp->ioaddr);
3135 return(inb(portp->ioaddr + EREG_DATA));
3136}
3137
3138static void stl_cd1400setreg(stlport_t *portp, int regnr, int value)
3139{
3140 outb((regnr + portp->uartaddr), portp->ioaddr);
3141 outb(value, portp->ioaddr + EREG_DATA);
3142}
3143
3144static int stl_cd1400updatereg(stlport_t *portp, int regnr, int value)
3145{
3146 outb((regnr + portp->uartaddr), portp->ioaddr);
3147 if (inb(portp->ioaddr + EREG_DATA) != value) {
3148 outb(value, portp->ioaddr + EREG_DATA);
3149 return(1);
3150 }
3151 return(0);
3152}
3153
3154/*****************************************************************************/
3155
3156/*
3157 * Inbitialize the UARTs in a panel. We don't care what sort of board
3158 * these ports are on - since the port io registers are almost
3159 * identical when dealing with ports.
3160 */
3161
3162static int stl_cd1400panelinit(stlbrd_t *brdp, stlpanel_t *panelp)
3163{
3164 unsigned int gfrcr;
3165 int chipmask, i, j;
3166 int nrchips, uartaddr, ioaddr;
3167
3168#ifdef DEBUG
3169 printk("stl_panelinit(brdp=%x,panelp=%x)\n", (int) brdp, (int) panelp);
3170#endif
3171
3172 BRDENABLE(panelp->brdnr, panelp->pagenr);
3173
3174/*
3175 * Check that each chip is present and started up OK.
3176 */
3177 chipmask = 0;
3178 nrchips = panelp->nrports / CD1400_PORTS;
3179 for (i = 0; (i < nrchips); i++) {
3180 if (brdp->brdtype == BRD_ECHPCI) {
3181 outb((panelp->pagenr + (i >> 1)), brdp->ioctrl);
3182 ioaddr = panelp->iobase;
3183 } else {
3184 ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1));
3185 }
3186 uartaddr = (i & 0x01) ? 0x080 : 0;
3187 outb((GFRCR + uartaddr), ioaddr);
3188 outb(0, (ioaddr + EREG_DATA));
3189 outb((CCR + uartaddr), ioaddr);
3190 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
3191 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
3192 outb((GFRCR + uartaddr), ioaddr);
3193 for (j = 0; (j < CCR_MAXWAIT); j++) {
3194 if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0)
3195 break;
3196 }
3197 if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) {
3198 printk("STALLION: cd1400 not responding, "
3199 "brd=%d panel=%d chip=%d\n",
3200 panelp->brdnr, panelp->panelnr, i);
3201 continue;
3202 }
3203 chipmask |= (0x1 << i);
3204 outb((PPR + uartaddr), ioaddr);
3205 outb(PPR_SCALAR, (ioaddr + EREG_DATA));
3206 }
3207
3208 BRDDISABLE(panelp->brdnr);
3209 return(chipmask);
3210}
3211
3212/*****************************************************************************/
3213
3214/*
3215 * Initialize hardware specific port registers.
3216 */
3217
3218static void stl_cd1400portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp)
3219{
3220#ifdef DEBUG
3221 printk("stl_cd1400portinit(brdp=%x,panelp=%x,portp=%x)\n",
3222 (int) brdp, (int) panelp, (int) portp);
3223#endif
3224
3225 if ((brdp == (stlbrd_t *) NULL) || (panelp == (stlpanel_t *) NULL) ||
3226 (portp == (stlport_t *) NULL))
3227 return;
3228
3229 portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) ||
3230 (portp->portnr < 8)) ? 0 : EREG_BANKSIZE);
3231 portp->uartaddr = (portp->portnr & 0x04) << 5;
3232 portp->pagenr = panelp->pagenr + (portp->portnr >> 3);
3233
3234 BRDENABLE(portp->brdnr, portp->pagenr);
3235 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3236 stl_cd1400setreg(portp, LIVR, (portp->portnr << 3));
3237 portp->hwid = stl_cd1400getreg(portp, GFRCR);
3238 BRDDISABLE(portp->brdnr);
3239}
3240
3241/*****************************************************************************/
3242
3243/*
3244 * Wait for the command register to be ready. We will poll this,
3245 * since it won't usually take too long to be ready.
3246 */
3247
3248static void stl_cd1400ccrwait(stlport_t *portp)
3249{
3250 int i;
3251
3252 for (i = 0; (i < CCR_MAXWAIT); i++) {
3253 if (stl_cd1400getreg(portp, CCR) == 0) {
3254 return;
3255 }
3256 }
3257
3258 printk("STALLION: cd1400 not responding, port=%d panel=%d brd=%d\n",
3259 portp->portnr, portp->panelnr, portp->brdnr);
3260}
3261
3262/*****************************************************************************/
3263
3264/*
3265 * Set up the cd1400 registers for a port based on the termios port
3266 * settings.
3267 */
3268
3269static void stl_cd1400setport(stlport_t *portp, struct termios *tiosp)
3270{
3271 stlbrd_t *brdp;
3272 unsigned long flags;
3273 unsigned int clkdiv, baudrate;
3274 unsigned char cor1, cor2, cor3;
3275 unsigned char cor4, cor5, ccr;
3276 unsigned char srer, sreron, sreroff;
3277 unsigned char mcor1, mcor2, rtpr;
3278 unsigned char clk, div;
3279
3280 cor1 = 0;
3281 cor2 = 0;
3282 cor3 = 0;
3283 cor4 = 0;
3284 cor5 = 0;
3285 ccr = 0;
3286 rtpr = 0;
3287 clk = 0;
3288 div = 0;
3289 mcor1 = 0;
3290 mcor2 = 0;
3291 sreron = 0;
3292 sreroff = 0;
3293
3294 brdp = stl_brds[portp->brdnr];
3295 if (brdp == (stlbrd_t *) NULL)
3296 return;
3297
3298/*
3299 * Set up the RX char ignore mask with those RX error types we
3300 * can ignore. We can get the cd1400 to help us out a little here,
3301 * it will ignore parity errors and breaks for us.
3302 */
3303 portp->rxignoremsk = 0;
3304 if (tiosp->c_iflag & IGNPAR) {
3305 portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN);
3306 cor1 |= COR1_PARIGNORE;
3307 }
3308 if (tiosp->c_iflag & IGNBRK) {
3309 portp->rxignoremsk |= ST_BREAK;
3310 cor4 |= COR4_IGNBRK;
3311 }
3312
3313 portp->rxmarkmsk = ST_OVERRUN;
3314 if (tiosp->c_iflag & (INPCK | PARMRK))
3315 portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING);
3316 if (tiosp->c_iflag & BRKINT)
3317 portp->rxmarkmsk |= ST_BREAK;
3318
3319/*
3320 * Go through the char size, parity and stop bits and set all the
3321 * option register appropriately.
3322 */
3323 switch (tiosp->c_cflag & CSIZE) {
3324 case CS5:
3325 cor1 |= COR1_CHL5;
3326 break;
3327 case CS6:
3328 cor1 |= COR1_CHL6;
3329 break;
3330 case CS7:
3331 cor1 |= COR1_CHL7;
3332 break;
3333 default:
3334 cor1 |= COR1_CHL8;
3335 break;
3336 }
3337
3338 if (tiosp->c_cflag & CSTOPB)
3339 cor1 |= COR1_STOP2;
3340 else
3341 cor1 |= COR1_STOP1;
3342
3343 if (tiosp->c_cflag & PARENB) {
3344 if (tiosp->c_cflag & PARODD)
3345 cor1 |= (COR1_PARENB | COR1_PARODD);
3346 else
3347 cor1 |= (COR1_PARENB | COR1_PAREVEN);
3348 } else {
3349 cor1 |= COR1_PARNONE;
3350 }
3351
3352/*
3353 * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing
3354 * space for hardware flow control and the like. This should be set to
3355 * VMIN. Also here we will set the RX data timeout to 10ms - this should
3356 * really be based on VTIME.
3357 */
3358 cor3 |= FIFO_RXTHRESHOLD;
3359 rtpr = 2;
3360
3361/*
3362 * Calculate the baud rate timers. For now we will just assume that
3363 * the input and output baud are the same. Could have used a baud
3364 * table here, but this way we can generate virtually any baud rate
3365 * we like!
3366 */
3367 baudrate = tiosp->c_cflag & CBAUD;
3368 if (baudrate & CBAUDEX) {
3369 baudrate &= ~CBAUDEX;
3370 if ((baudrate < 1) || (baudrate > 4))
3371 tiosp->c_cflag &= ~CBAUDEX;
3372 else
3373 baudrate += 15;
3374 }
3375 baudrate = stl_baudrates[baudrate];
3376 if ((tiosp->c_cflag & CBAUD) == B38400) {
3377 if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
3378 baudrate = 57600;
3379 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
3380 baudrate = 115200;
3381 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
3382 baudrate = 230400;
3383 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
3384 baudrate = 460800;
3385 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
3386 baudrate = (portp->baud_base / portp->custom_divisor);
3387 }
3388 if (baudrate > STL_CD1400MAXBAUD)
3389 baudrate = STL_CD1400MAXBAUD;
3390
3391 if (baudrate > 0) {
3392 for (clk = 0; (clk < CD1400_NUMCLKS); clk++) {
3393 clkdiv = ((portp->clk / stl_cd1400clkdivs[clk]) / baudrate);
3394 if (clkdiv < 0x100)
3395 break;
3396 }
3397 div = (unsigned char) clkdiv;
3398 }
3399
3400/*
3401 * Check what form of modem signaling is required and set it up.
3402 */
3403 if ((tiosp->c_cflag & CLOCAL) == 0) {
3404 mcor1 |= MCOR1_DCD;
3405 mcor2 |= MCOR2_DCD;
3406 sreron |= SRER_MODEM;
3407 portp->flags |= ASYNC_CHECK_CD;
3408 } else {
3409 portp->flags &= ~ASYNC_CHECK_CD;
3410 }
3411
3412/*
3413 * Setup cd1400 enhanced modes if we can. In particular we want to
3414 * handle as much of the flow control as possible automatically. As
3415 * well as saving a few CPU cycles it will also greatly improve flow
3416 * control reliability.
3417 */
3418 if (tiosp->c_iflag & IXON) {
3419 cor2 |= COR2_TXIBE;
3420 cor3 |= COR3_SCD12;
3421 if (tiosp->c_iflag & IXANY)
3422 cor2 |= COR2_IXM;
3423 }
3424
3425 if (tiosp->c_cflag & CRTSCTS) {
3426 cor2 |= COR2_CTSAE;
3427 mcor1 |= FIFO_RTSTHRESHOLD;
3428 }
3429
3430/*
3431 * All cd1400 register values calculated so go through and set
3432 * them all up.
3433 */
3434
3435#ifdef DEBUG
3436 printk("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
3437 portp->portnr, portp->panelnr, portp->brdnr);
3438 printk(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n",
3439 cor1, cor2, cor3, cor4, cor5);
3440 printk(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n",
3441 mcor1, mcor2, rtpr, sreron, sreroff);
3442 printk(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div);
3443 printk(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
3444 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
3445 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
3446#endif
3447
3448 save_flags(flags);
3449 cli();
3450 BRDENABLE(portp->brdnr, portp->pagenr);
3451 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3452 srer = stl_cd1400getreg(portp, SRER);
3453 stl_cd1400setreg(portp, SRER, 0);
3454 if (stl_cd1400updatereg(portp, COR1, cor1))
3455 ccr = 1;
3456 if (stl_cd1400updatereg(portp, COR2, cor2))
3457 ccr = 1;
3458 if (stl_cd1400updatereg(portp, COR3, cor3))
3459 ccr = 1;
3460 if (ccr) {
3461 stl_cd1400ccrwait(portp);
3462 stl_cd1400setreg(portp, CCR, CCR_CORCHANGE);
3463 }
3464 stl_cd1400setreg(portp, COR4, cor4);
3465 stl_cd1400setreg(portp, COR5, cor5);
3466 stl_cd1400setreg(portp, MCOR1, mcor1);
3467 stl_cd1400setreg(portp, MCOR2, mcor2);
3468 if (baudrate > 0) {
3469 stl_cd1400setreg(portp, TCOR, clk);
3470 stl_cd1400setreg(portp, TBPR, div);
3471 stl_cd1400setreg(portp, RCOR, clk);
3472 stl_cd1400setreg(portp, RBPR, div);
3473 }
3474 stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]);
3475 stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]);
3476 stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]);
3477 stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]);
3478 stl_cd1400setreg(portp, RTPR, rtpr);
3479 mcor1 = stl_cd1400getreg(portp, MSVR1);
3480 if (mcor1 & MSVR1_DCD)
3481 portp->sigs |= TIOCM_CD;
3482 else
3483 portp->sigs &= ~TIOCM_CD;
3484 stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron));
3485 BRDDISABLE(portp->brdnr);
3486 restore_flags(flags);
3487}
3488
3489/*****************************************************************************/
3490
3491/*
3492 * Set the state of the DTR and RTS signals.
3493 */
3494
3495static void stl_cd1400setsignals(stlport_t *portp, int dtr, int rts)
3496{
3497 unsigned char msvr1, msvr2;
3498 unsigned long flags;
3499
3500#ifdef DEBUG
3501 printk("stl_cd1400setsignals(portp=%x,dtr=%d,rts=%d)\n",
3502 (int) portp, dtr, rts);
3503#endif
3504
3505 msvr1 = 0;
3506 msvr2 = 0;
3507 if (dtr > 0)
3508 msvr1 = MSVR1_DTR;
3509 if (rts > 0)
3510 msvr2 = MSVR2_RTS;
3511
3512 save_flags(flags);
3513 cli();
3514 BRDENABLE(portp->brdnr, portp->pagenr);
3515 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3516 if (rts >= 0)
3517 stl_cd1400setreg(portp, MSVR2, msvr2);
3518 if (dtr >= 0)
3519 stl_cd1400setreg(portp, MSVR1, msvr1);
3520 BRDDISABLE(portp->brdnr);
3521 restore_flags(flags);
3522}
3523
3524/*****************************************************************************/
3525
3526/*
3527 * Return the state of the signals.
3528 */
3529
3530static int stl_cd1400getsignals(stlport_t *portp)
3531{
3532 unsigned char msvr1, msvr2;
3533 unsigned long flags;
3534 int sigs;
3535
3536#ifdef DEBUG
3537 printk("stl_cd1400getsignals(portp=%x)\n", (int) portp);
3538#endif
3539
3540 save_flags(flags);
3541 cli();
3542 BRDENABLE(portp->brdnr, portp->pagenr);
3543 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3544 msvr1 = stl_cd1400getreg(portp, MSVR1);
3545 msvr2 = stl_cd1400getreg(portp, MSVR2);
3546 BRDDISABLE(portp->brdnr);
3547 restore_flags(flags);
3548
3549 sigs = 0;
3550 sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0;
3551 sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0;
3552 sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0;
3553 sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0;
3554#if 0
3555 sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0;
3556 sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0;
3557#else
3558 sigs |= TIOCM_DSR;
3559#endif
3560 return(sigs);
3561}
3562
3563/*****************************************************************************/
3564
3565/*
3566 * Enable/Disable the Transmitter and/or Receiver.
3567 */
3568
3569static void stl_cd1400enablerxtx(stlport_t *portp, int rx, int tx)
3570{
3571 unsigned char ccr;
3572 unsigned long flags;
3573
3574#ifdef DEBUG
3575 printk("stl_cd1400enablerxtx(portp=%x,rx=%d,tx=%d)\n",
3576 (int) portp, rx, tx);
3577#endif
3578 ccr = 0;
3579
3580 if (tx == 0)
3581 ccr |= CCR_TXDISABLE;
3582 else if (tx > 0)
3583 ccr |= CCR_TXENABLE;
3584 if (rx == 0)
3585 ccr |= CCR_RXDISABLE;
3586 else if (rx > 0)
3587 ccr |= CCR_RXENABLE;
3588
3589 save_flags(flags);
3590 cli();
3591 BRDENABLE(portp->brdnr, portp->pagenr);
3592 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3593 stl_cd1400ccrwait(portp);
3594 stl_cd1400setreg(portp, CCR, ccr);
3595 stl_cd1400ccrwait(portp);
3596 BRDDISABLE(portp->brdnr);
3597 restore_flags(flags);
3598}
3599
3600/*****************************************************************************/
3601
3602/*
3603 * Start/stop the Transmitter and/or Receiver.
3604 */
3605
3606static void stl_cd1400startrxtx(stlport_t *portp, int rx, int tx)
3607{
3608 unsigned char sreron, sreroff;
3609 unsigned long flags;
3610
3611#ifdef DEBUG
3612 printk("stl_cd1400startrxtx(portp=%x,rx=%d,tx=%d)\n",
3613 (int) portp, rx, tx);
3614#endif
3615
3616 sreron = 0;
3617 sreroff = 0;
3618 if (tx == 0)
3619 sreroff |= (SRER_TXDATA | SRER_TXEMPTY);
3620 else if (tx == 1)
3621 sreron |= SRER_TXDATA;
3622 else if (tx >= 2)
3623 sreron |= SRER_TXEMPTY;
3624 if (rx == 0)
3625 sreroff |= SRER_RXDATA;
3626 else if (rx > 0)
3627 sreron |= SRER_RXDATA;
3628
3629 save_flags(flags);
3630 cli();
3631 BRDENABLE(portp->brdnr, portp->pagenr);
3632 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3633 stl_cd1400setreg(portp, SRER,
3634 ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron));
3635 BRDDISABLE(portp->brdnr);
3636 if (tx > 0)
3637 set_bit(ASYI_TXBUSY, &portp->istate);
3638 restore_flags(flags);
3639}
3640
3641/*****************************************************************************/
3642
3643/*
3644 * Disable all interrupts from this port.
3645 */
3646
3647static void stl_cd1400disableintrs(stlport_t *portp)
3648{
3649 unsigned long flags;
3650
3651#ifdef DEBUG
3652 printk("stl_cd1400disableintrs(portp=%x)\n", (int) portp);
3653#endif
3654 save_flags(flags);
3655 cli();
3656 BRDENABLE(portp->brdnr, portp->pagenr);
3657 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3658 stl_cd1400setreg(portp, SRER, 0);
3659 BRDDISABLE(portp->brdnr);
3660 restore_flags(flags);
3661}
3662
3663/*****************************************************************************/
3664
3665static void stl_cd1400sendbreak(stlport_t *portp, int len)
3666{
3667 unsigned long flags;
3668
3669#ifdef DEBUG
3670 printk("stl_cd1400sendbreak(portp=%x,len=%d)\n", (int) portp, len);
3671#endif
3672
3673 save_flags(flags);
3674 cli();
3675 BRDENABLE(portp->brdnr, portp->pagenr);
3676 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3677 stl_cd1400setreg(portp, SRER,
3678 ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) |
3679 SRER_TXEMPTY));
3680 BRDDISABLE(portp->brdnr);
3681 portp->brklen = len;
3682 if (len == 1)
3683 portp->stats.txbreaks++;
3684 restore_flags(flags);
3685}
3686
3687/*****************************************************************************/
3688
3689/*
3690 * Take flow control actions...
3691 */
3692
3693static void stl_cd1400flowctrl(stlport_t *portp, int state)
3694{
3695 struct tty_struct *tty;
3696 unsigned long flags;
3697
3698#ifdef DEBUG
3699 printk("stl_cd1400flowctrl(portp=%x,state=%x)\n", (int) portp, state);
3700#endif
3701
3702 if (portp == (stlport_t *) NULL)
3703 return;
3704 tty = portp->tty;
3705 if (tty == (struct tty_struct *) NULL)
3706 return;
3707
3708 save_flags(flags);
3709 cli();
3710 BRDENABLE(portp->brdnr, portp->pagenr);
3711 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3712
3713 if (state) {
3714 if (tty->termios->c_iflag & IXOFF) {
3715 stl_cd1400ccrwait(portp);
3716 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3717 portp->stats.rxxon++;
3718 stl_cd1400ccrwait(portp);
3719 }
3720/*
3721 * Question: should we return RTS to what it was before? It may
3722 * have been set by an ioctl... Suppose not, since if you have
3723 * hardware flow control set then it is pretty silly to go and
3724 * set the RTS line by hand.
3725 */
3726 if (tty->termios->c_cflag & CRTSCTS) {
3727 stl_cd1400setreg(portp, MCOR1,
3728 (stl_cd1400getreg(portp, MCOR1) |
3729 FIFO_RTSTHRESHOLD));
3730 stl_cd1400setreg(portp, MSVR2, MSVR2_RTS);
3731 portp->stats.rxrtson++;
3732 }
3733 } else {
3734 if (tty->termios->c_iflag & IXOFF) {
3735 stl_cd1400ccrwait(portp);
3736 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3737 portp->stats.rxxoff++;
3738 stl_cd1400ccrwait(portp);
3739 }
3740 if (tty->termios->c_cflag & CRTSCTS) {
3741 stl_cd1400setreg(portp, MCOR1,
3742 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3743 stl_cd1400setreg(portp, MSVR2, 0);
3744 portp->stats.rxrtsoff++;
3745 }
3746 }
3747
3748 BRDDISABLE(portp->brdnr);
3749 restore_flags(flags);
3750}
3751
3752/*****************************************************************************/
3753
3754/*
3755 * Send a flow control character...
3756 */
3757
3758static void stl_cd1400sendflow(stlport_t *portp, int state)
3759{
3760 struct tty_struct *tty;
3761 unsigned long flags;
3762
3763#ifdef DEBUG
3764 printk("stl_cd1400sendflow(portp=%x,state=%x)\n", (int) portp, state);
3765#endif
3766
3767 if (portp == (stlport_t *) NULL)
3768 return;
3769 tty = portp->tty;
3770 if (tty == (struct tty_struct *) NULL)
3771 return;
3772
3773 save_flags(flags);
3774 cli();
3775 BRDENABLE(portp->brdnr, portp->pagenr);
3776 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3777 if (state) {
3778 stl_cd1400ccrwait(portp);
3779 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3780 portp->stats.rxxon++;
3781 stl_cd1400ccrwait(portp);
3782 } else {
3783 stl_cd1400ccrwait(portp);
3784 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3785 portp->stats.rxxoff++;
3786 stl_cd1400ccrwait(portp);
3787 }
3788 BRDDISABLE(portp->brdnr);
3789 restore_flags(flags);
3790}
3791
3792/*****************************************************************************/
3793
3794static void stl_cd1400flush(stlport_t *portp)
3795{
3796 unsigned long flags;
3797
3798#ifdef DEBUG
3799 printk("stl_cd1400flush(portp=%x)\n", (int) portp);
3800#endif
3801
3802 if (portp == (stlport_t *) NULL)
3803 return;
3804
3805 save_flags(flags);
3806 cli();
3807 BRDENABLE(portp->brdnr, portp->pagenr);
3808 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3809 stl_cd1400ccrwait(portp);
3810 stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO);
3811 stl_cd1400ccrwait(portp);
3812 portp->tx.tail = portp->tx.head;
3813 BRDDISABLE(portp->brdnr);
3814 restore_flags(flags);
3815}
3816
3817/*****************************************************************************/
3818
3819/*
3820 * Return the current state of data flow on this port. This is only
3821 * really interresting when determining if data has fully completed
3822 * transmission or not... This is easy for the cd1400, it accurately
3823 * maintains the busy port flag.
3824 */
3825
3826static int stl_cd1400datastate(stlport_t *portp)
3827{
3828#ifdef DEBUG
3829 printk("stl_cd1400datastate(portp=%x)\n", (int) portp);
3830#endif
3831
3832 if (portp == (stlport_t *) NULL)
3833 return(0);
3834
3835 return(test_bit(ASYI_TXBUSY, &portp->istate) ? 1 : 0);
3836}
3837
3838/*****************************************************************************/
3839
3840/*
3841 * Interrupt service routine for cd1400 EasyIO boards.
3842 */
3843
3844static void stl_cd1400eiointr(stlpanel_t *panelp, unsigned int iobase)
3845{
3846 unsigned char svrtype;
3847
3848#ifdef DEBUG
3849 printk("stl_cd1400eiointr(panelp=%x,iobase=%x)\n",
3850 (int) panelp, iobase);
3851#endif
3852
3853 outb(SVRR, iobase);
3854 svrtype = inb(iobase + EREG_DATA);
3855 if (panelp->nrports > 4) {
3856 outb((SVRR + 0x80), iobase);
3857 svrtype |= inb(iobase + EREG_DATA);
3858 }
3859
3860 if (svrtype & SVRR_RX)
3861 stl_cd1400rxisr(panelp, iobase);
3862 else if (svrtype & SVRR_TX)
3863 stl_cd1400txisr(panelp, iobase);
3864 else if (svrtype & SVRR_MDM)
3865 stl_cd1400mdmisr(panelp, iobase);
3866}
3867
3868/*****************************************************************************/
3869
3870/*
3871 * Interrupt service routine for cd1400 panels.
3872 */
3873
3874static void stl_cd1400echintr(stlpanel_t *panelp, unsigned int iobase)
3875{
3876 unsigned char svrtype;
3877
3878#ifdef DEBUG
3879 printk("stl_cd1400echintr(panelp=%x,iobase=%x)\n", (int) panelp,
3880 iobase);
3881#endif
3882
3883 outb(SVRR, iobase);
3884 svrtype = inb(iobase + EREG_DATA);
3885 outb((SVRR + 0x80), iobase);
3886 svrtype |= inb(iobase + EREG_DATA);
3887 if (svrtype & SVRR_RX)
3888 stl_cd1400rxisr(panelp, iobase);
3889 else if (svrtype & SVRR_TX)
3890 stl_cd1400txisr(panelp, iobase);
3891 else if (svrtype & SVRR_MDM)
3892 stl_cd1400mdmisr(panelp, iobase);
3893}
3894
3895
3896/*****************************************************************************/
3897
3898/*
3899 * Unfortunately we need to handle breaks in the TX data stream, since
3900 * this is the only way to generate them on the cd1400.
3901 */
3902
3903static inline int stl_cd1400breakisr(stlport_t *portp, int ioaddr)
3904{
3905 if (portp->brklen == 1) {
3906 outb((COR2 + portp->uartaddr), ioaddr);
3907 outb((inb(ioaddr + EREG_DATA) | COR2_ETC),
3908 (ioaddr + EREG_DATA));
3909 outb((TDR + portp->uartaddr), ioaddr);
3910 outb(ETC_CMD, (ioaddr + EREG_DATA));
3911 outb(ETC_STARTBREAK, (ioaddr + EREG_DATA));
3912 outb((SRER + portp->uartaddr), ioaddr);
3913 outb((inb(ioaddr + EREG_DATA) & ~(SRER_TXDATA | SRER_TXEMPTY)),
3914 (ioaddr + EREG_DATA));
3915 return(1);
3916 } else if (portp->brklen > 1) {
3917 outb((TDR + portp->uartaddr), ioaddr);
3918 outb(ETC_CMD, (ioaddr + EREG_DATA));
3919 outb(ETC_STOPBREAK, (ioaddr + EREG_DATA));
3920 portp->brklen = -1;
3921 return(1);
3922 } else {
3923 outb((COR2 + portp->uartaddr), ioaddr);
3924 outb((inb(ioaddr + EREG_DATA) & ~COR2_ETC),
3925 (ioaddr + EREG_DATA));
3926 portp->brklen = 0;
3927 }
3928 return(0);
3929}
3930
3931/*****************************************************************************/
3932
3933/*
3934 * Transmit interrupt handler. This has gotta be fast! Handling TX
3935 * chars is pretty simple, stuff as many as possible from the TX buffer
3936 * into the cd1400 FIFO. Must also handle TX breaks here, since they
3937 * are embedded as commands in the data stream. Oh no, had to use a goto!
3938 * This could be optimized more, will do when I get time...
3939 * In practice it is possible that interrupts are enabled but that the
3940 * port has been hung up. Need to handle not having any TX buffer here,
3941 * this is done by using the side effect that head and tail will also
3942 * be NULL if the buffer has been freed.
3943 */
3944
3945static void stl_cd1400txisr(stlpanel_t *panelp, int ioaddr)
3946{
3947 stlport_t *portp;
3948 int len, stlen;
3949 char *head, *tail;
3950 unsigned char ioack, srer;
3951
3952#ifdef DEBUG
3953 printk("stl_cd1400txisr(panelp=%x,ioaddr=%x)\n", (int) panelp, ioaddr);
3954#endif
3955
3956 ioack = inb(ioaddr + EREG_TXACK);
3957 if (((ioack & panelp->ackmask) != 0) ||
3958 ((ioack & ACK_TYPMASK) != ACK_TYPTX)) {
3959 printk("STALLION: bad TX interrupt ack value=%x\n", ioack);
3960 return;
3961 }
3962 portp = panelp->ports[(ioack >> 3)];
3963
3964/*
3965 * Unfortunately we need to handle breaks in the data stream, since
3966 * this is the only way to generate them on the cd1400. Do it now if
3967 * a break is to be sent.
3968 */
3969 if (portp->brklen != 0)
3970 if (stl_cd1400breakisr(portp, ioaddr))
3971 goto stl_txalldone;
3972
3973 head = portp->tx.head;
3974 tail = portp->tx.tail;
3975 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
3976 if ((len == 0) || ((len < STL_TXBUFLOW) &&
3977 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
3978 set_bit(ASYI_TXLOW, &portp->istate);
3979 schedule_work(&portp->tqueue);
3980 }
3981
3982 if (len == 0) {
3983 outb((SRER + portp->uartaddr), ioaddr);
3984 srer = inb(ioaddr + EREG_DATA);
3985 if (srer & SRER_TXDATA) {
3986 srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY;
3987 } else {
3988 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
3989 clear_bit(ASYI_TXBUSY, &portp->istate);
3990 }
3991 outb(srer, (ioaddr + EREG_DATA));
3992 } else {
3993 len = MIN(len, CD1400_TXFIFOSIZE);
3994 portp->stats.txtotal += len;
3995 stlen = MIN(len, ((portp->tx.buf + STL_TXBUFSIZE) - tail));
3996 outb((TDR + portp->uartaddr), ioaddr);
3997 outsb((ioaddr + EREG_DATA), tail, stlen);
3998 len -= stlen;
3999 tail += stlen;
4000 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
4001 tail = portp->tx.buf;
4002 if (len > 0) {
4003 outsb((ioaddr + EREG_DATA), tail, len);
4004 tail += len;
4005 }
4006 portp->tx.tail = tail;
4007 }
4008
4009stl_txalldone:
4010 outb((EOSRR + portp->uartaddr), ioaddr);
4011 outb(0, (ioaddr + EREG_DATA));
4012}
4013
4014/*****************************************************************************/
4015
4016/*
4017 * Receive character interrupt handler. Determine if we have good chars
4018 * or bad chars and then process appropriately. Good chars are easy
4019 * just shove the lot into the RX buffer and set all status byte to 0.
4020 * If a bad RX char then process as required. This routine needs to be
4021 * fast! In practice it is possible that we get an interrupt on a port
4022 * that is closed. This can happen on hangups - since they completely
4023 * shutdown a port not in user context. Need to handle this case.
4024 */
4025
4026static void stl_cd1400rxisr(stlpanel_t *panelp, int ioaddr)
4027{
4028 stlport_t *portp;
4029 struct tty_struct *tty;
4030 unsigned int ioack, len, buflen;
4031 unsigned char status;
4032 char ch;
4033
4034#ifdef DEBUG
4035 printk("stl_cd1400rxisr(panelp=%x,ioaddr=%x)\n", (int) panelp, ioaddr);
4036#endif
4037
4038 ioack = inb(ioaddr + EREG_RXACK);
4039 if ((ioack & panelp->ackmask) != 0) {
4040 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
4041 return;
4042 }
4043 portp = panelp->ports[(ioack >> 3)];
4044 tty = portp->tty;
4045
4046 if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) {
4047 outb((RDCR + portp->uartaddr), ioaddr);
4048 len = inb(ioaddr + EREG_DATA);
4049 if ((tty == (struct tty_struct *) NULL) ||
4050 (tty->flip.char_buf_ptr == (char *) NULL) ||
4051 ((buflen = TTY_FLIPBUF_SIZE - tty->flip.count) == 0)) {
4052 len = MIN(len, sizeof(stl_unwanted));
4053 outb((RDSR + portp->uartaddr), ioaddr);
4054 insb((ioaddr + EREG_DATA), &stl_unwanted[0], len);
4055 portp->stats.rxlost += len;
4056 portp->stats.rxtotal += len;
4057 } else {
4058 len = MIN(len, buflen);
4059 if (len > 0) {
4060 outb((RDSR + portp->uartaddr), ioaddr);
4061 insb((ioaddr + EREG_DATA), tty->flip.char_buf_ptr, len);
4062 memset(tty->flip.flag_buf_ptr, 0, len);
4063 tty->flip.flag_buf_ptr += len;
4064 tty->flip.char_buf_ptr += len;
4065 tty->flip.count += len;
4066 tty_schedule_flip(tty);
4067 portp->stats.rxtotal += len;
4068 }
4069 }
4070 } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) {
4071 outb((RDSR + portp->uartaddr), ioaddr);
4072 status = inb(ioaddr + EREG_DATA);
4073 ch = inb(ioaddr + EREG_DATA);
4074 if (status & ST_PARITY)
4075 portp->stats.rxparity++;
4076 if (status & ST_FRAMING)
4077 portp->stats.rxframing++;
4078 if (status & ST_OVERRUN)
4079 portp->stats.rxoverrun++;
4080 if (status & ST_BREAK)
4081 portp->stats.rxbreaks++;
4082 if (status & ST_SCHARMASK) {
4083 if ((status & ST_SCHARMASK) == ST_SCHAR1)
4084 portp->stats.txxon++;
4085 if ((status & ST_SCHARMASK) == ST_SCHAR2)
4086 portp->stats.txxoff++;
4087 goto stl_rxalldone;
4088 }
4089 if ((tty != (struct tty_struct *) NULL) &&
4090 ((portp->rxignoremsk & status) == 0)) {
4091 if (portp->rxmarkmsk & status) {
4092 if (status & ST_BREAK) {
4093 status = TTY_BREAK;
4094 if (portp->flags & ASYNC_SAK) {
4095 do_SAK(tty);
4096 BRDENABLE(portp->brdnr, portp->pagenr);
4097 }
4098 } else if (status & ST_PARITY) {
4099 status = TTY_PARITY;
4100 } else if (status & ST_FRAMING) {
4101 status = TTY_FRAME;
4102 } else if(status & ST_OVERRUN) {
4103 status = TTY_OVERRUN;
4104 } else {
4105 status = 0;
4106 }
4107 } else {
4108 status = 0;
4109 }
4110 if (tty->flip.char_buf_ptr != (char *) NULL) {
4111 if (tty->flip.count < TTY_FLIPBUF_SIZE) {
4112 *tty->flip.flag_buf_ptr++ = status;
4113 *tty->flip.char_buf_ptr++ = ch;
4114 tty->flip.count++;
4115 }
4116 tty_schedule_flip(tty);
4117 }
4118 }
4119 } else {
4120 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
4121 return;
4122 }
4123
4124stl_rxalldone:
4125 outb((EOSRR + portp->uartaddr), ioaddr);
4126 outb(0, (ioaddr + EREG_DATA));
4127}
4128
4129/*****************************************************************************/
4130
4131/*
4132 * Modem interrupt handler. The is called when the modem signal line
4133 * (DCD) has changed state. Leave most of the work to the off-level
4134 * processing routine.
4135 */
4136
4137static void stl_cd1400mdmisr(stlpanel_t *panelp, int ioaddr)
4138{
4139 stlport_t *portp;
4140 unsigned int ioack;
4141 unsigned char misr;
4142
4143#ifdef DEBUG
4144 printk("stl_cd1400mdmisr(panelp=%x)\n", (int) panelp);
4145#endif
4146
4147 ioack = inb(ioaddr + EREG_MDACK);
4148 if (((ioack & panelp->ackmask) != 0) ||
4149 ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) {
4150 printk("STALLION: bad MODEM interrupt ack value=%x\n", ioack);
4151 return;
4152 }
4153 portp = panelp->ports[(ioack >> 3)];
4154
4155 outb((MISR + portp->uartaddr), ioaddr);
4156 misr = inb(ioaddr + EREG_DATA);
4157 if (misr & MISR_DCD) {
4158 set_bit(ASYI_DCDCHANGE, &portp->istate);
4159 schedule_work(&portp->tqueue);
4160 portp->stats.modem++;
4161 }
4162
4163 outb((EOSRR + portp->uartaddr), ioaddr);
4164 outb(0, (ioaddr + EREG_DATA));
4165}
4166
4167/*****************************************************************************/
4168/* SC26198 HARDWARE FUNCTIONS */
4169/*****************************************************************************/
4170
4171/*
4172 * These functions get/set/update the registers of the sc26198 UARTs.
4173 * Access to the sc26198 registers is via an address/data io port pair.
4174 * (Maybe should make this inline...)
4175 */
4176
4177static int stl_sc26198getreg(stlport_t *portp, int regnr)
4178{
4179 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
4180 return(inb(portp->ioaddr + XP_DATA));
4181}
4182
4183static void stl_sc26198setreg(stlport_t *portp, int regnr, int value)
4184{
4185 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
4186 outb(value, (portp->ioaddr + XP_DATA));
4187}
4188
4189static int stl_sc26198updatereg(stlport_t *portp, int regnr, int value)
4190{
4191 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
4192 if (inb(portp->ioaddr + XP_DATA) != value) {
4193 outb(value, (portp->ioaddr + XP_DATA));
4194 return(1);
4195 }
4196 return(0);
4197}
4198
4199/*****************************************************************************/
4200
4201/*
4202 * Functions to get and set the sc26198 global registers.
4203 */
4204
4205static int stl_sc26198getglobreg(stlport_t *portp, int regnr)
4206{
4207 outb(regnr, (portp->ioaddr + XP_ADDR));
4208 return(inb(portp->ioaddr + XP_DATA));
4209}
4210
4211#if 0
4212static void stl_sc26198setglobreg(stlport_t *portp, int regnr, int value)
4213{
4214 outb(regnr, (portp->ioaddr + XP_ADDR));
4215 outb(value, (portp->ioaddr + XP_DATA));
4216}
4217#endif
4218
4219/*****************************************************************************/
4220
4221/*
4222 * Inbitialize the UARTs in a panel. We don't care what sort of board
4223 * these ports are on - since the port io registers are almost
4224 * identical when dealing with ports.
4225 */
4226
4227static int stl_sc26198panelinit(stlbrd_t *brdp, stlpanel_t *panelp)
4228{
4229 int chipmask, i;
4230 int nrchips, ioaddr;
4231
4232#ifdef DEBUG
4233 printk("stl_sc26198panelinit(brdp=%x,panelp=%x)\n",
4234 (int) brdp, (int) panelp);
4235#endif
4236
4237 BRDENABLE(panelp->brdnr, panelp->pagenr);
4238
4239/*
4240 * Check that each chip is present and started up OK.
4241 */
4242 chipmask = 0;
4243 nrchips = (panelp->nrports + 4) / SC26198_PORTS;
4244 if (brdp->brdtype == BRD_ECHPCI)
4245 outb(panelp->pagenr, brdp->ioctrl);
4246
4247 for (i = 0; (i < nrchips); i++) {
4248 ioaddr = panelp->iobase + (i * 4);
4249 outb(SCCR, (ioaddr + XP_ADDR));
4250 outb(CR_RESETALL, (ioaddr + XP_DATA));
4251 outb(TSTR, (ioaddr + XP_ADDR));
4252 if (inb(ioaddr + XP_DATA) != 0) {
4253 printk("STALLION: sc26198 not responding, "
4254 "brd=%d panel=%d chip=%d\n",
4255 panelp->brdnr, panelp->panelnr, i);
4256 continue;
4257 }
4258 chipmask |= (0x1 << i);
4259 outb(GCCR, (ioaddr + XP_ADDR));
4260 outb(GCCR_IVRTYPCHANACK, (ioaddr + XP_DATA));
4261 outb(WDTRCR, (ioaddr + XP_ADDR));
4262 outb(0xff, (ioaddr + XP_DATA));
4263 }
4264
4265 BRDDISABLE(panelp->brdnr);
4266 return(chipmask);
4267}
4268
4269/*****************************************************************************/
4270
4271/*
4272 * Initialize hardware specific port registers.
4273 */
4274
4275static void stl_sc26198portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp)
4276{
4277#ifdef DEBUG
4278 printk("stl_sc26198portinit(brdp=%x,panelp=%x,portp=%x)\n",
4279 (int) brdp, (int) panelp, (int) portp);
4280#endif
4281
4282 if ((brdp == (stlbrd_t *) NULL) || (panelp == (stlpanel_t *) NULL) ||
4283 (portp == (stlport_t *) NULL))
4284 return;
4285
4286 portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4);
4287 portp->uartaddr = (portp->portnr & 0x07) << 4;
4288 portp->pagenr = panelp->pagenr;
4289 portp->hwid = 0x1;
4290
4291 BRDENABLE(portp->brdnr, portp->pagenr);
4292 stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS);
4293 BRDDISABLE(portp->brdnr);
4294}
4295
4296/*****************************************************************************/
4297
4298/*
4299 * Set up the sc26198 registers for a port based on the termios port
4300 * settings.
4301 */
4302
4303static void stl_sc26198setport(stlport_t *portp, struct termios *tiosp)
4304{
4305 stlbrd_t *brdp;
4306 unsigned long flags;
4307 unsigned int baudrate;
4308 unsigned char mr0, mr1, mr2, clk;
4309 unsigned char imron, imroff, iopr, ipr;
4310
4311 mr0 = 0;
4312 mr1 = 0;
4313 mr2 = 0;
4314 clk = 0;
4315 iopr = 0;
4316 imron = 0;
4317 imroff = 0;
4318
4319 brdp = stl_brds[portp->brdnr];
4320 if (brdp == (stlbrd_t *) NULL)
4321 return;
4322
4323/*
4324 * Set up the RX char ignore mask with those RX error types we
4325 * can ignore.
4326 */
4327 portp->rxignoremsk = 0;
4328 if (tiosp->c_iflag & IGNPAR)
4329 portp->rxignoremsk |= (SR_RXPARITY | SR_RXFRAMING |
4330 SR_RXOVERRUN);
4331 if (tiosp->c_iflag & IGNBRK)
4332 portp->rxignoremsk |= SR_RXBREAK;
4333
4334 portp->rxmarkmsk = SR_RXOVERRUN;
4335 if (tiosp->c_iflag & (INPCK | PARMRK))
4336 portp->rxmarkmsk |= (SR_RXPARITY | SR_RXFRAMING);
4337 if (tiosp->c_iflag & BRKINT)
4338 portp->rxmarkmsk |= SR_RXBREAK;
4339
4340/*
4341 * Go through the char size, parity and stop bits and set all the
4342 * option register appropriately.
4343 */
4344 switch (tiosp->c_cflag & CSIZE) {
4345 case CS5:
4346 mr1 |= MR1_CS5;
4347 break;
4348 case CS6:
4349 mr1 |= MR1_CS6;
4350 break;
4351 case CS7:
4352 mr1 |= MR1_CS7;
4353 break;
4354 default:
4355 mr1 |= MR1_CS8;
4356 break;
4357 }
4358
4359 if (tiosp->c_cflag & CSTOPB)
4360 mr2 |= MR2_STOP2;
4361 else
4362 mr2 |= MR2_STOP1;
4363
4364 if (tiosp->c_cflag & PARENB) {
4365 if (tiosp->c_cflag & PARODD)
4366 mr1 |= (MR1_PARENB | MR1_PARODD);
4367 else
4368 mr1 |= (MR1_PARENB | MR1_PAREVEN);
4369 } else {
4370 mr1 |= MR1_PARNONE;
4371 }
4372
4373 mr1 |= MR1_ERRBLOCK;
4374
4375/*
4376 * Set the RX FIFO threshold at 8 chars. This gives a bit of breathing
4377 * space for hardware flow control and the like. This should be set to
4378 * VMIN.
4379 */
4380 mr2 |= MR2_RXFIFOHALF;
4381
4382/*
4383 * Calculate the baud rate timers. For now we will just assume that
4384 * the input and output baud are the same. The sc26198 has a fixed
4385 * baud rate table, so only discrete baud rates possible.
4386 */
4387 baudrate = tiosp->c_cflag & CBAUD;
4388 if (baudrate & CBAUDEX) {
4389 baudrate &= ~CBAUDEX;
4390 if ((baudrate < 1) || (baudrate > 4))
4391 tiosp->c_cflag &= ~CBAUDEX;
4392 else
4393 baudrate += 15;
4394 }
4395 baudrate = stl_baudrates[baudrate];
4396 if ((tiosp->c_cflag & CBAUD) == B38400) {
4397 if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
4398 baudrate = 57600;
4399 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
4400 baudrate = 115200;
4401 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
4402 baudrate = 230400;
4403 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
4404 baudrate = 460800;
4405 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
4406 baudrate = (portp->baud_base / portp->custom_divisor);
4407 }
4408 if (baudrate > STL_SC26198MAXBAUD)
4409 baudrate = STL_SC26198MAXBAUD;
4410
4411 if (baudrate > 0) {
4412 for (clk = 0; (clk < SC26198_NRBAUDS); clk++) {
4413 if (baudrate <= sc26198_baudtable[clk])
4414 break;
4415 }
4416 }
4417
4418/*
4419 * Check what form of modem signaling is required and set it up.
4420 */
4421 if (tiosp->c_cflag & CLOCAL) {
4422 portp->flags &= ~ASYNC_CHECK_CD;
4423 } else {
4424 iopr |= IOPR_DCDCOS;
4425 imron |= IR_IOPORT;
4426 portp->flags |= ASYNC_CHECK_CD;
4427 }
4428
4429/*
4430 * Setup sc26198 enhanced modes if we can. In particular we want to
4431 * handle as much of the flow control as possible automatically. As
4432 * well as saving a few CPU cycles it will also greatly improve flow
4433 * control reliability.
4434 */
4435 if (tiosp->c_iflag & IXON) {
4436 mr0 |= MR0_SWFTX | MR0_SWFT;
4437 imron |= IR_XONXOFF;
4438 } else {
4439 imroff |= IR_XONXOFF;
4440 }
4441 if (tiosp->c_iflag & IXOFF)
4442 mr0 |= MR0_SWFRX;
4443
4444 if (tiosp->c_cflag & CRTSCTS) {
4445 mr2 |= MR2_AUTOCTS;
4446 mr1 |= MR1_AUTORTS;
4447 }
4448
4449/*
4450 * All sc26198 register values calculated so go through and set
4451 * them all up.
4452 */
4453
4454#ifdef DEBUG
4455 printk("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
4456 portp->portnr, portp->panelnr, portp->brdnr);
4457 printk(" mr0=%x mr1=%x mr2=%x clk=%x\n", mr0, mr1, mr2, clk);
4458 printk(" iopr=%x imron=%x imroff=%x\n", iopr, imron, imroff);
4459 printk(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
4460 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
4461 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
4462#endif
4463
4464 save_flags(flags);
4465 cli();
4466 BRDENABLE(portp->brdnr, portp->pagenr);
4467 stl_sc26198setreg(portp, IMR, 0);
4468 stl_sc26198updatereg(portp, MR0, mr0);
4469 stl_sc26198updatereg(portp, MR1, mr1);
4470 stl_sc26198setreg(portp, SCCR, CR_RXERRBLOCK);
4471 stl_sc26198updatereg(portp, MR2, mr2);
4472 stl_sc26198updatereg(portp, IOPIOR,
4473 ((stl_sc26198getreg(portp, IOPIOR) & ~IPR_CHANGEMASK) | iopr));
4474
4475 if (baudrate > 0) {
4476 stl_sc26198setreg(portp, TXCSR, clk);
4477 stl_sc26198setreg(portp, RXCSR, clk);
4478 }
4479
4480 stl_sc26198setreg(portp, XONCR, tiosp->c_cc[VSTART]);
4481 stl_sc26198setreg(portp, XOFFCR, tiosp->c_cc[VSTOP]);
4482
4483 ipr = stl_sc26198getreg(portp, IPR);
4484 if (ipr & IPR_DCD)
4485 portp->sigs &= ~TIOCM_CD;
4486 else
4487 portp->sigs |= TIOCM_CD;
4488
4489 portp->imr = (portp->imr & ~imroff) | imron;
4490 stl_sc26198setreg(portp, IMR, portp->imr);
4491 BRDDISABLE(portp->brdnr);
4492 restore_flags(flags);
4493}
4494
4495/*****************************************************************************/
4496
4497/*
4498 * Set the state of the DTR and RTS signals.
4499 */
4500
4501static void stl_sc26198setsignals(stlport_t *portp, int dtr, int rts)
4502{
4503 unsigned char iopioron, iopioroff;
4504 unsigned long flags;
4505
4506#ifdef DEBUG
4507 printk("stl_sc26198setsignals(portp=%x,dtr=%d,rts=%d)\n",
4508 (int) portp, dtr, rts);
4509#endif
4510
4511 iopioron = 0;
4512 iopioroff = 0;
4513 if (dtr == 0)
4514 iopioroff |= IPR_DTR;
4515 else if (dtr > 0)
4516 iopioron |= IPR_DTR;
4517 if (rts == 0)
4518 iopioroff |= IPR_RTS;
4519 else if (rts > 0)
4520 iopioron |= IPR_RTS;
4521
4522 save_flags(flags);
4523 cli();
4524 BRDENABLE(portp->brdnr, portp->pagenr);
4525 stl_sc26198setreg(portp, IOPIOR,
4526 ((stl_sc26198getreg(portp, IOPIOR) & ~iopioroff) | iopioron));
4527 BRDDISABLE(portp->brdnr);
4528 restore_flags(flags);
4529}
4530
4531/*****************************************************************************/
4532
4533/*
4534 * Return the state of the signals.
4535 */
4536
4537static int stl_sc26198getsignals(stlport_t *portp)
4538{
4539 unsigned char ipr;
4540 unsigned long flags;
4541 int sigs;
4542
4543#ifdef DEBUG
4544 printk("stl_sc26198getsignals(portp=%x)\n", (int) portp);
4545#endif
4546
4547 save_flags(flags);
4548 cli();
4549 BRDENABLE(portp->brdnr, portp->pagenr);
4550 ipr = stl_sc26198getreg(portp, IPR);
4551 BRDDISABLE(portp->brdnr);
4552 restore_flags(flags);
4553
4554 sigs = 0;
4555 sigs |= (ipr & IPR_DCD) ? 0 : TIOCM_CD;
4556 sigs |= (ipr & IPR_CTS) ? 0 : TIOCM_CTS;
4557 sigs |= (ipr & IPR_DTR) ? 0: TIOCM_DTR;
4558 sigs |= (ipr & IPR_RTS) ? 0: TIOCM_RTS;
4559 sigs |= TIOCM_DSR;
4560 return(sigs);
4561}
4562
4563/*****************************************************************************/
4564
4565/*
4566 * Enable/Disable the Transmitter and/or Receiver.
4567 */
4568
4569static void stl_sc26198enablerxtx(stlport_t *portp, int rx, int tx)
4570{
4571 unsigned char ccr;
4572 unsigned long flags;
4573
4574#ifdef DEBUG
4575 printk("stl_sc26198enablerxtx(portp=%x,rx=%d,tx=%d)\n",
4576 (int) portp, rx, tx);
4577#endif
4578
4579 ccr = portp->crenable;
4580 if (tx == 0)
4581 ccr &= ~CR_TXENABLE;
4582 else if (tx > 0)
4583 ccr |= CR_TXENABLE;
4584 if (rx == 0)
4585 ccr &= ~CR_RXENABLE;
4586 else if (rx > 0)
4587 ccr |= CR_RXENABLE;
4588
4589 save_flags(flags);
4590 cli();
4591 BRDENABLE(portp->brdnr, portp->pagenr);
4592 stl_sc26198setreg(portp, SCCR, ccr);
4593 BRDDISABLE(portp->brdnr);
4594 portp->crenable = ccr;
4595 restore_flags(flags);
4596}
4597
4598/*****************************************************************************/
4599
4600/*
4601 * Start/stop the Transmitter and/or Receiver.
4602 */
4603
4604static void stl_sc26198startrxtx(stlport_t *portp, int rx, int tx)
4605{
4606 unsigned char imr;
4607 unsigned long flags;
4608
4609#ifdef DEBUG
4610 printk("stl_sc26198startrxtx(portp=%x,rx=%d,tx=%d)\n",
4611 (int) portp, rx, tx);
4612#endif
4613
4614 imr = portp->imr;
4615 if (tx == 0)
4616 imr &= ~IR_TXRDY;
4617 else if (tx == 1)
4618 imr |= IR_TXRDY;
4619 if (rx == 0)
4620 imr &= ~(IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG);
4621 else if (rx > 0)
4622 imr |= IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG;
4623
4624 save_flags(flags);
4625 cli();
4626 BRDENABLE(portp->brdnr, portp->pagenr);
4627 stl_sc26198setreg(portp, IMR, imr);
4628 BRDDISABLE(portp->brdnr);
4629 portp->imr = imr;
4630 if (tx > 0)
4631 set_bit(ASYI_TXBUSY, &portp->istate);
4632 restore_flags(flags);
4633}
4634
4635/*****************************************************************************/
4636
4637/*
4638 * Disable all interrupts from this port.
4639 */
4640
4641static void stl_sc26198disableintrs(stlport_t *portp)
4642{
4643 unsigned long flags;
4644
4645#ifdef DEBUG
4646 printk("stl_sc26198disableintrs(portp=%x)\n", (int) portp);
4647#endif
4648
4649 save_flags(flags);
4650 cli();
4651 BRDENABLE(portp->brdnr, portp->pagenr);
4652 portp->imr = 0;
4653 stl_sc26198setreg(portp, IMR, 0);
4654 BRDDISABLE(portp->brdnr);
4655 restore_flags(flags);
4656}
4657
4658/*****************************************************************************/
4659
4660static void stl_sc26198sendbreak(stlport_t *portp, int len)
4661{
4662 unsigned long flags;
4663
4664#ifdef DEBUG
4665 printk("stl_sc26198sendbreak(portp=%x,len=%d)\n", (int) portp, len);
4666#endif
4667
4668 save_flags(flags);
4669 cli();
4670 BRDENABLE(portp->brdnr, portp->pagenr);
4671 if (len == 1) {
4672 stl_sc26198setreg(portp, SCCR, CR_TXSTARTBREAK);
4673 portp->stats.txbreaks++;
4674 } else {
4675 stl_sc26198setreg(portp, SCCR, CR_TXSTOPBREAK);
4676 }
4677 BRDDISABLE(portp->brdnr);
4678 restore_flags(flags);
4679}
4680
4681/*****************************************************************************/
4682
4683/*
4684 * Take flow control actions...
4685 */
4686
4687static void stl_sc26198flowctrl(stlport_t *portp, int state)
4688{
4689 struct tty_struct *tty;
4690 unsigned long flags;
4691 unsigned char mr0;
4692
4693#ifdef DEBUG
4694 printk("stl_sc26198flowctrl(portp=%x,state=%x)\n", (int) portp, state);
4695#endif
4696
4697 if (portp == (stlport_t *) NULL)
4698 return;
4699 tty = portp->tty;
4700 if (tty == (struct tty_struct *) NULL)
4701 return;
4702
4703 save_flags(flags);
4704 cli();
4705 BRDENABLE(portp->brdnr, portp->pagenr);
4706
4707 if (state) {
4708 if (tty->termios->c_iflag & IXOFF) {
4709 mr0 = stl_sc26198getreg(portp, MR0);
4710 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4711 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4712 mr0 |= MR0_SWFRX;
4713 portp->stats.rxxon++;
4714 stl_sc26198wait(portp);
4715 stl_sc26198setreg(portp, MR0, mr0);
4716 }
4717/*
4718 * Question: should we return RTS to what it was before? It may
4719 * have been set by an ioctl... Suppose not, since if you have
4720 * hardware flow control set then it is pretty silly to go and
4721 * set the RTS line by hand.
4722 */
4723 if (tty->termios->c_cflag & CRTSCTS) {
4724 stl_sc26198setreg(portp, MR1,
4725 (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS));
4726 stl_sc26198setreg(portp, IOPIOR,
4727 (stl_sc26198getreg(portp, IOPIOR) | IOPR_RTS));
4728 portp->stats.rxrtson++;
4729 }
4730 } else {
4731 if (tty->termios->c_iflag & IXOFF) {
4732 mr0 = stl_sc26198getreg(portp, MR0);
4733 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4734 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4735 mr0 &= ~MR0_SWFRX;
4736 portp->stats.rxxoff++;
4737 stl_sc26198wait(portp);
4738 stl_sc26198setreg(portp, MR0, mr0);
4739 }
4740 if (tty->termios->c_cflag & CRTSCTS) {
4741 stl_sc26198setreg(portp, MR1,
4742 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4743 stl_sc26198setreg(portp, IOPIOR,
4744 (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS));
4745 portp->stats.rxrtsoff++;
4746 }
4747 }
4748
4749 BRDDISABLE(portp->brdnr);
4750 restore_flags(flags);
4751}
4752
4753/*****************************************************************************/
4754
4755/*
4756 * Send a flow control character.
4757 */
4758
4759static void stl_sc26198sendflow(stlport_t *portp, int state)
4760{
4761 struct tty_struct *tty;
4762 unsigned long flags;
4763 unsigned char mr0;
4764
4765#ifdef DEBUG
4766 printk("stl_sc26198sendflow(portp=%x,state=%x)\n", (int) portp, state);
4767#endif
4768
4769 if (portp == (stlport_t *) NULL)
4770 return;
4771 tty = portp->tty;
4772 if (tty == (struct tty_struct *) NULL)
4773 return;
4774
4775 save_flags(flags);
4776 cli();
4777 BRDENABLE(portp->brdnr, portp->pagenr);
4778 if (state) {
4779 mr0 = stl_sc26198getreg(portp, MR0);
4780 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4781 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4782 mr0 |= MR0_SWFRX;
4783 portp->stats.rxxon++;
4784 stl_sc26198wait(portp);
4785 stl_sc26198setreg(portp, MR0, mr0);
4786 } else {
4787 mr0 = stl_sc26198getreg(portp, MR0);
4788 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4789 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4790 mr0 &= ~MR0_SWFRX;
4791 portp->stats.rxxoff++;
4792 stl_sc26198wait(portp);
4793 stl_sc26198setreg(portp, MR0, mr0);
4794 }
4795 BRDDISABLE(portp->brdnr);
4796 restore_flags(flags);
4797}
4798
4799/*****************************************************************************/
4800
4801static void stl_sc26198flush(stlport_t *portp)
4802{
4803 unsigned long flags;
4804
4805#ifdef DEBUG
4806 printk("stl_sc26198flush(portp=%x)\n", (int) portp);
4807#endif
4808
4809 if (portp == (stlport_t *) NULL)
4810 return;
4811
4812 save_flags(flags);
4813 cli();
4814 BRDENABLE(portp->brdnr, portp->pagenr);
4815 stl_sc26198setreg(portp, SCCR, CR_TXRESET);
4816 stl_sc26198setreg(portp, SCCR, portp->crenable);
4817 BRDDISABLE(portp->brdnr);
4818 portp->tx.tail = portp->tx.head;
4819 restore_flags(flags);
4820}
4821
4822/*****************************************************************************/
4823
4824/*
4825 * Return the current state of data flow on this port. This is only
4826 * really interresting when determining if data has fully completed
4827 * transmission or not... The sc26198 interrupt scheme cannot
4828 * determine when all data has actually drained, so we need to
4829 * check the port statusy register to be sure.
4830 */
4831
4832static int stl_sc26198datastate(stlport_t *portp)
4833{
4834 unsigned long flags;
4835 unsigned char sr;
4836
4837#ifdef DEBUG
4838 printk("stl_sc26198datastate(portp=%x)\n", (int) portp);
4839#endif
4840
4841 if (portp == (stlport_t *) NULL)
4842 return(0);
4843 if (test_bit(ASYI_TXBUSY, &portp->istate))
4844 return(1);
4845
4846 save_flags(flags);
4847 cli();
4848 BRDENABLE(portp->brdnr, portp->pagenr);
4849 sr = stl_sc26198getreg(portp, SR);
4850 BRDDISABLE(portp->brdnr);
4851 restore_flags(flags);
4852
4853 return((sr & SR_TXEMPTY) ? 0 : 1);
4854}
4855
4856/*****************************************************************************/
4857
4858/*
4859 * Delay for a small amount of time, to give the sc26198 a chance
4860 * to process a command...
4861 */
4862
4863static void stl_sc26198wait(stlport_t *portp)
4864{
4865 int i;
4866
4867#ifdef DEBUG
4868 printk("stl_sc26198wait(portp=%x)\n", (int) portp);
4869#endif
4870
4871 if (portp == (stlport_t *) NULL)
4872 return;
4873
4874 for (i = 0; (i < 20); i++)
4875 stl_sc26198getglobreg(portp, TSTR);
4876}
4877
4878/*****************************************************************************/
4879
4880/*
4881 * If we are TX flow controlled and in IXANY mode then we may
4882 * need to unflow control here. We gotta do this because of the
4883 * automatic flow control modes of the sc26198.
4884 */
4885
4886static inline void stl_sc26198txunflow(stlport_t *portp, struct tty_struct *tty)
4887{
4888 unsigned char mr0;
4889
4890 mr0 = stl_sc26198getreg(portp, MR0);
4891 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4892 stl_sc26198setreg(portp, SCCR, CR_HOSTXON);
4893 stl_sc26198wait(portp);
4894 stl_sc26198setreg(portp, MR0, mr0);
4895 clear_bit(ASYI_TXFLOWED, &portp->istate);
4896}
4897
4898/*****************************************************************************/
4899
4900/*
4901 * Interrupt service routine for sc26198 panels.
4902 */
4903
4904static void stl_sc26198intr(stlpanel_t *panelp, unsigned int iobase)
4905{
4906 stlport_t *portp;
4907 unsigned int iack;
4908
4909/*
4910 * Work around bug in sc26198 chip... Cannot have A6 address
4911 * line of UART high, else iack will be returned as 0.
4912 */
4913 outb(0, (iobase + 1));
4914
4915 iack = inb(iobase + XP_IACK);
4916 portp = panelp->ports[(iack & IVR_CHANMASK) + ((iobase & 0x4) << 1)];
4917
4918 if (iack & IVR_RXDATA)
4919 stl_sc26198rxisr(portp, iack);
4920 else if (iack & IVR_TXDATA)
4921 stl_sc26198txisr(portp);
4922 else
4923 stl_sc26198otherisr(portp, iack);
4924}
4925
4926/*****************************************************************************/
4927
4928/*
4929 * Transmit interrupt handler. This has gotta be fast! Handling TX
4930 * chars is pretty simple, stuff as many as possible from the TX buffer
4931 * into the sc26198 FIFO.
4932 * In practice it is possible that interrupts are enabled but that the
4933 * port has been hung up. Need to handle not having any TX buffer here,
4934 * this is done by using the side effect that head and tail will also
4935 * be NULL if the buffer has been freed.
4936 */
4937
4938static void stl_sc26198txisr(stlport_t *portp)
4939{
4940 unsigned int ioaddr;
4941 unsigned char mr0;
4942 int len, stlen;
4943 char *head, *tail;
4944
4945#ifdef DEBUG
4946 printk("stl_sc26198txisr(portp=%x)\n", (int) portp);
4947#endif
4948
4949 ioaddr = portp->ioaddr;
4950 head = portp->tx.head;
4951 tail = portp->tx.tail;
4952 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
4953 if ((len == 0) || ((len < STL_TXBUFLOW) &&
4954 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
4955 set_bit(ASYI_TXLOW, &portp->istate);
4956 schedule_work(&portp->tqueue);
4957 }
4958
4959 if (len == 0) {
4960 outb((MR0 | portp->uartaddr), (ioaddr + XP_ADDR));
4961 mr0 = inb(ioaddr + XP_DATA);
4962 if ((mr0 & MR0_TXMASK) == MR0_TXEMPTY) {
4963 portp->imr &= ~IR_TXRDY;
4964 outb((IMR | portp->uartaddr), (ioaddr + XP_ADDR));
4965 outb(portp->imr, (ioaddr + XP_DATA));
4966 clear_bit(ASYI_TXBUSY, &portp->istate);
4967 } else {
4968 mr0 |= ((mr0 & ~MR0_TXMASK) | MR0_TXEMPTY);
4969 outb(mr0, (ioaddr + XP_DATA));
4970 }
4971 } else {
4972 len = MIN(len, SC26198_TXFIFOSIZE);
4973 portp->stats.txtotal += len;
4974 stlen = MIN(len, ((portp->tx.buf + STL_TXBUFSIZE) - tail));
4975 outb(GTXFIFO, (ioaddr + XP_ADDR));
4976 outsb((ioaddr + XP_DATA), tail, stlen);
4977 len -= stlen;
4978 tail += stlen;
4979 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
4980 tail = portp->tx.buf;
4981 if (len > 0) {
4982 outsb((ioaddr + XP_DATA), tail, len);
4983 tail += len;
4984 }
4985 portp->tx.tail = tail;
4986 }
4987}
4988
4989/*****************************************************************************/
4990
4991/*
4992 * Receive character interrupt handler. Determine if we have good chars
4993 * or bad chars and then process appropriately. Good chars are easy
4994 * just shove the lot into the RX buffer and set all status byte to 0.
4995 * If a bad RX char then process as required. This routine needs to be
4996 * fast! In practice it is possible that we get an interrupt on a port
4997 * that is closed. This can happen on hangups - since they completely
4998 * shutdown a port not in user context. Need to handle this case.
4999 */
5000
5001static void stl_sc26198rxisr(stlport_t *portp, unsigned int iack)
5002{
5003 struct tty_struct *tty;
5004 unsigned int len, buflen, ioaddr;
5005
5006#ifdef DEBUG
5007 printk("stl_sc26198rxisr(portp=%x,iack=%x)\n", (int) portp, iack);
5008#endif
5009
5010 tty = portp->tty;
5011 ioaddr = portp->ioaddr;
5012 outb(GIBCR, (ioaddr + XP_ADDR));
5013 len = inb(ioaddr + XP_DATA) + 1;
5014
5015 if ((iack & IVR_TYPEMASK) == IVR_RXDATA) {
5016 if ((tty == (struct tty_struct *) NULL) ||
5017 (tty->flip.char_buf_ptr == (char *) NULL) ||
5018 ((buflen = TTY_FLIPBUF_SIZE - tty->flip.count) == 0)) {
5019 len = MIN(len, sizeof(stl_unwanted));
5020 outb(GRXFIFO, (ioaddr + XP_ADDR));
5021 insb((ioaddr + XP_DATA), &stl_unwanted[0], len);
5022 portp->stats.rxlost += len;
5023 portp->stats.rxtotal += len;
5024 } else {
5025 len = MIN(len, buflen);
5026 if (len > 0) {
5027 outb(GRXFIFO, (ioaddr + XP_ADDR));
5028 insb((ioaddr + XP_DATA), tty->flip.char_buf_ptr, len);
5029 memset(tty->flip.flag_buf_ptr, 0, len);
5030 tty->flip.flag_buf_ptr += len;
5031 tty->flip.char_buf_ptr += len;
5032 tty->flip.count += len;
5033 tty_schedule_flip(tty);
5034 portp->stats.rxtotal += len;
5035 }
5036 }
5037 } else {
5038 stl_sc26198rxbadchars(portp);
5039 }
5040
5041/*
5042 * If we are TX flow controlled and in IXANY mode then we may need
5043 * to unflow control here. We gotta do this because of the automatic
5044 * flow control modes of the sc26198.
5045 */
5046 if (test_bit(ASYI_TXFLOWED, &portp->istate)) {
5047 if ((tty != (struct tty_struct *) NULL) &&
5048 (tty->termios != (struct termios *) NULL) &&
5049 (tty->termios->c_iflag & IXANY)) {
5050 stl_sc26198txunflow(portp, tty);
5051 }
5052 }
5053}
5054
5055/*****************************************************************************/
5056
5057/*
5058 * Process an RX bad character.
5059 */
5060
5061static inline void stl_sc26198rxbadch(stlport_t *portp, unsigned char status, char ch)
5062{
5063 struct tty_struct *tty;
5064 unsigned int ioaddr;
5065
5066 tty = portp->tty;
5067 ioaddr = portp->ioaddr;
5068
5069 if (status & SR_RXPARITY)
5070 portp->stats.rxparity++;
5071 if (status & SR_RXFRAMING)
5072 portp->stats.rxframing++;
5073 if (status & SR_RXOVERRUN)
5074 portp->stats.rxoverrun++;
5075 if (status & SR_RXBREAK)
5076 portp->stats.rxbreaks++;
5077
5078 if ((tty != (struct tty_struct *) NULL) &&
5079 ((portp->rxignoremsk & status) == 0)) {
5080 if (portp->rxmarkmsk & status) {
5081 if (status & SR_RXBREAK) {
5082 status = TTY_BREAK;
5083 if (portp->flags & ASYNC_SAK) {
5084 do_SAK(tty);
5085 BRDENABLE(portp->brdnr, portp->pagenr);
5086 }
5087 } else if (status & SR_RXPARITY) {
5088 status = TTY_PARITY;
5089 } else if (status & SR_RXFRAMING) {
5090 status = TTY_FRAME;
5091 } else if(status & SR_RXOVERRUN) {
5092 status = TTY_OVERRUN;
5093 } else {
5094 status = 0;
5095 }
5096 } else {
5097 status = 0;
5098 }
5099
5100 if (tty->flip.char_buf_ptr != (char *) NULL) {
5101 if (tty->flip.count < TTY_FLIPBUF_SIZE) {
5102 *tty->flip.flag_buf_ptr++ = status;
5103 *tty->flip.char_buf_ptr++ = ch;
5104 tty->flip.count++;
5105 }
5106 tty_schedule_flip(tty);
5107 }
5108
5109 if (status == 0)
5110 portp->stats.rxtotal++;
5111 }
5112}
5113
5114/*****************************************************************************/
5115
5116/*
5117 * Process all characters in the RX FIFO of the UART. Check all char
5118 * status bytes as well, and process as required. We need to check
5119 * all bytes in the FIFO, in case some more enter the FIFO while we
5120 * are here. To get the exact character error type we need to switch
5121 * into CHAR error mode (that is why we need to make sure we empty
5122 * the FIFO).
5123 */
5124
5125static void stl_sc26198rxbadchars(stlport_t *portp)
5126{
5127 unsigned char status, mr1;
5128 char ch;
5129
5130/*
5131 * To get the precise error type for each character we must switch
5132 * back into CHAR error mode.
5133 */
5134 mr1 = stl_sc26198getreg(portp, MR1);
5135 stl_sc26198setreg(portp, MR1, (mr1 & ~MR1_ERRBLOCK));
5136
5137 while ((status = stl_sc26198getreg(portp, SR)) & SR_RXRDY) {
5138 stl_sc26198setreg(portp, SCCR, CR_CLEARRXERR);
5139 ch = stl_sc26198getreg(portp, RXFIFO);
5140 stl_sc26198rxbadch(portp, status, ch);
5141 }
5142
5143/*
5144 * To get correct interrupt class we must switch back into BLOCK
5145 * error mode.
5146 */
5147 stl_sc26198setreg(portp, MR1, mr1);
5148}
5149
5150/*****************************************************************************/
5151
5152/*
5153 * Other interrupt handler. This includes modem signals, flow
5154 * control actions, etc. Most stuff is left to off-level interrupt
5155 * processing time.
5156 */
5157
5158static void stl_sc26198otherisr(stlport_t *portp, unsigned int iack)
5159{
5160 unsigned char cir, ipr, xisr;
5161
5162#ifdef DEBUG
5163 printk("stl_sc26198otherisr(portp=%x,iack=%x)\n", (int) portp, iack);
5164#endif
5165
5166 cir = stl_sc26198getglobreg(portp, CIR);
5167
5168 switch (cir & CIR_SUBTYPEMASK) {
5169 case CIR_SUBCOS:
5170 ipr = stl_sc26198getreg(portp, IPR);
5171 if (ipr & IPR_DCDCHANGE) {
5172 set_bit(ASYI_DCDCHANGE, &portp->istate);
5173 schedule_work(&portp->tqueue);
5174 portp->stats.modem++;
5175 }
5176 break;
5177 case CIR_SUBXONXOFF:
5178 xisr = stl_sc26198getreg(portp, XISR);
5179 if (xisr & XISR_RXXONGOT) {
5180 set_bit(ASYI_TXFLOWED, &portp->istate);
5181 portp->stats.txxoff++;
5182 }
5183 if (xisr & XISR_RXXOFFGOT) {
5184 clear_bit(ASYI_TXFLOWED, &portp->istate);
5185 portp->stats.txxon++;
5186 }
5187 break;
5188 case CIR_SUBBREAK:
5189 stl_sc26198setreg(portp, SCCR, CR_BREAKRESET);
5190 stl_sc26198rxbadchars(portp);
5191 break;
5192 default:
5193 break;
5194 }
5195}
5196
5197/*****************************************************************************/
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-07 09:42:21 -0500