diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-08-05 10:59:12 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-10-07 04:33:12 -0400 |
commit | 45ef6ac6f5d4d4ea441a042fee3790b3f33cba73 (patch) | |
tree | 29897e692ff81474a9a74f0a27ce957b49cdc7e3 /drivers/char/nwflash.c | |
parent | edc9e3334a19efe1f0c1d2dc7df354e77c8d535d (diff) |
ARM: footbridge: nw_gpio_lock is raw_spin_lock
bd31b85960a "locking, ARM: Annotate low level hw locks as raw"
made nw_gpio_lock a raw spinlock, but did not change all the
users in device drivers. This fixes the remaining ones.
sound/oss/waveartist.c: In function 'vnc_mute_spkr':
sound/oss/waveartist.c:1485:2: warning: passing argument 1 of 'spinlock_check' from incompatible pointer type [enabled by default]
include/linux/spinlock.h:272:102: note: expected 'struct spinlock_t *' but argument is of type 'struct raw_spinlock_t *'
drivers/char/ds1620.c: In function 'netwinder_lock':
drivers/char/ds1620.c:77:2: warning: passing argument 1 of 'spinlock_check' from incompatible pointer type [enabled by default]
include/linux/spinlock.h:272:102: note: expected 'struct spinlock_t *' but argument is of type 'struct raw_spinlock_t *'
drivers/char/nwflash.c: In function 'kick_open':
drivers/char/nwflash.c:620:2: warning: passing argument 1 of 'spinlock_check' from incompatible pointer type [enabled by default]
include/linux/spinlock.h:272:102: note: expected 'struct spinlock_t *' but argument is of type 'struct raw_spinlock_t *'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/char/nwflash.c')
-rw-r--r-- | drivers/char/nwflash.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/char/nwflash.c b/drivers/char/nwflash.c index d45c3345b4af..04e2a9491fca 100644 --- a/drivers/char/nwflash.c +++ b/drivers/char/nwflash.c | |||
@@ -617,9 +617,9 @@ static void kick_open(void) | |||
617 | * we want to write a bit pattern XXX1 to Xilinx to enable | 617 | * we want to write a bit pattern XXX1 to Xilinx to enable |
618 | * the write gate, which will be open for about the next 2ms. | 618 | * the write gate, which will be open for about the next 2ms. |
619 | */ | 619 | */ |
620 | spin_lock_irqsave(&nw_gpio_lock, flags); | 620 | raw_spin_lock_irqsave(&nw_gpio_lock, flags); |
621 | nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE); | 621 | nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE); |
622 | spin_unlock_irqrestore(&nw_gpio_lock, flags); | 622 | raw_spin_unlock_irqrestore(&nw_gpio_lock, flags); |
623 | 623 | ||
624 | /* | 624 | /* |
625 | * let the ISA bus to catch on... | 625 | * let the ISA bus to catch on... |