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authorAl Viro <viro@ftp.linux.org.uk>2007-10-29 00:31:16 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-29 10:41:32 -0400
commitca5cd877ae699e758e6f26efc11b01bf6631d427 (patch)
treef2337ce76ab006d9705b10e8e0ed2f62487c837f /drivers/char/mem.c
parent2a397e82c7db18019e408f953dd58dc1963a328c (diff)
x86 merge fallout: uml
Don't undef __i386__/__x86_64__ in uml anymore, make sure that (few) places that required adjusting the ifdefs got those. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/char/mem.c')
-rw-r--r--drivers/char/mem.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/char/mem.c b/drivers/char/mem.c
index 0e937f64a789..20070b7c573d 100644
--- a/drivers/char/mem.c
+++ b/drivers/char/mem.c
@@ -41,7 +41,7 @@
41 */ 41 */
42static inline int uncached_access(struct file *file, unsigned long addr) 42static inline int uncached_access(struct file *file, unsigned long addr)
43{ 43{
44#if defined(__i386__) 44#if defined(__i386__) && !defined(__arch_um__)
45 /* 45 /*
46 * On the PPro and successors, the MTRRs are used to set 46 * On the PPro and successors, the MTRRs are used to set
47 * memory types for physical addresses outside main memory, 47 * memory types for physical addresses outside main memory,
@@ -57,7 +57,7 @@ static inline int uncached_access(struct file *file, unsigned long addr)
57 test_bit(X86_FEATURE_CYRIX_ARR, boot_cpu_data.x86_capability) || 57 test_bit(X86_FEATURE_CYRIX_ARR, boot_cpu_data.x86_capability) ||
58 test_bit(X86_FEATURE_CENTAUR_MCR, boot_cpu_data.x86_capability) ) 58 test_bit(X86_FEATURE_CENTAUR_MCR, boot_cpu_data.x86_capability) )
59 && addr >= __pa(high_memory); 59 && addr >= __pa(high_memory);
60#elif defined(__x86_64__) 60#elif defined(__x86_64__) && !defined(__arch_um__)
61 /* 61 /*
62 * This is broken because it can generate memory type aliases, 62 * This is broken because it can generate memory type aliases,
63 * which can cause cache corruptions 63 * which can cause cache corruptions