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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2005-09-23 16:24:07 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-09-23 16:35:36 -0400
commit67b108131df1230bad20a7279a8897de123d690b (patch)
treed9551fb8d2d610840e5538760ac5ba61c8c32c7e /drivers/char/ipmi
parent2601c2e278863cd48c01bce1377b4c9747893025 (diff)
[PATCH] ppc64: Fix huge pages MMU mapping bug
Current kernel has a couple of sneaky bugs in the ppc64 hugetlb code that cause huge pages to be potentially left stale in the hash table and TLBs (improperly invalidated), with all the nasty consequences that can have. One is that we forgot to set the "secondary" bit in the hash PTEs when hashing a huge page in the secondary bucket (fortunately very rare). The other one is on non-LPAR machines (like Apple G5s), flush_hash_range() which is used to flush a batch of PTEs simply did not work for huge pages. Historically, our huge page code didn't batch, but this was changed without fixing this routine. This patch fixes both. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/char/ipmi')
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