diff options
author | Michael Buesch <mb@bu3sch.de> | 2006-06-26 03:25:03 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-26 12:58:19 -0400 |
commit | ebc915ad26d881ddcafbe4e0975203d23289f36f (patch) | |
tree | fc094ef896f3770293252010e5f4bdebe8e848bd /drivers/char/hw_random/omap-rng.c | |
parent | d7174bcb919c15b295271e37c3f65c716710715c (diff) |
[PATCH] Add TI OMAP CPU family HW RNG driver
Signed-off-by: Michael Buesch <mb@bu3sch.de>
Cc: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/char/hw_random/omap-rng.c')
-rw-r--r-- | drivers/char/hw_random/omap-rng.c | 208 |
1 files changed, 208 insertions, 0 deletions
diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c new file mode 100644 index 000000000000..819516b35a79 --- /dev/null +++ b/drivers/char/hw_random/omap-rng.c | |||
@@ -0,0 +1,208 @@ | |||
1 | /* | ||
2 | * driver/char/hw_random/omap-rng.c | ||
3 | * | ||
4 | * RNG driver for TI OMAP CPU family | ||
5 | * | ||
6 | * Author: Deepak Saxena <dsaxena@plexity.net> | ||
7 | * | ||
8 | * Copyright 2005 (c) MontaVista Software, Inc. | ||
9 | * | ||
10 | * Mostly based on original driver: | ||
11 | * | ||
12 | * Copyright (C) 2005 Nokia Corporation | ||
13 | * Author: Juha Yrj��<juha.yrjola@nokia.com> | ||
14 | * | ||
15 | * This file is licensed under the terms of the GNU General Public | ||
16 | * License version 2. This program is licensed "as is" without any | ||
17 | * warranty of any kind, whether express or implied. | ||
18 | * | ||
19 | * TODO: | ||
20 | * | ||
21 | * - Make status updated be interrupt driven so we don't poll | ||
22 | * | ||
23 | */ | ||
24 | |||
25 | #include <linux/module.h> | ||
26 | #include <linux/init.h> | ||
27 | #include <linux/random.h> | ||
28 | #include <linux/err.h> | ||
29 | #include <linux/device.h> | ||
30 | #include <linux/hw_random.h> | ||
31 | |||
32 | #include <asm/io.h> | ||
33 | #include <asm/hardware/clock.h> | ||
34 | |||
35 | #define RNG_OUT_REG 0x00 /* Output register */ | ||
36 | #define RNG_STAT_REG 0x04 /* Status register | ||
37 | [0] = STAT_BUSY */ | ||
38 | #define RNG_ALARM_REG 0x24 /* Alarm register | ||
39 | [7:0] = ALARM_COUNTER */ | ||
40 | #define RNG_CONFIG_REG 0x28 /* Configuration register | ||
41 | [11:6] = RESET_COUNT | ||
42 | [5:3] = RING2_DELAY | ||
43 | [2:0] = RING1_DELAY */ | ||
44 | #define RNG_REV_REG 0x3c /* Revision register | ||
45 | [7:0] = REV_NB */ | ||
46 | #define RNG_MASK_REG 0x40 /* Mask and reset register | ||
47 | [2] = IT_EN | ||
48 | [1] = SOFTRESET | ||
49 | [0] = AUTOIDLE */ | ||
50 | #define RNG_SYSSTATUS 0x44 /* System status | ||
51 | [0] = RESETDONE */ | ||
52 | |||
53 | static void __iomem *rng_base; | ||
54 | static struct clk *rng_ick; | ||
55 | static struct device *rng_dev; | ||
56 | |||
57 | static u32 omap_rng_read_reg(int reg) | ||
58 | { | ||
59 | return __raw_readl(rng_base + reg); | ||
60 | } | ||
61 | |||
62 | static void omap_rng_write_reg(int reg, u32 val) | ||
63 | { | ||
64 | __raw_writel(val, rng_base + reg); | ||
65 | } | ||
66 | |||
67 | /* REVISIT: Does the status bit really work on 16xx? */ | ||
68 | static int omap_rng_data_present(struct hwrng *rng) | ||
69 | { | ||
70 | return omap_rng_read_reg(RNG_STAT_REG) ? 0 : 1; | ||
71 | } | ||
72 | |||
73 | static int omap_rng_data_read(struct hwrng *rng, u32 *data) | ||
74 | { | ||
75 | *data = omap_rng_read_reg(RNG_OUT_REG); | ||
76 | |||
77 | return 4; | ||
78 | } | ||
79 | |||
80 | static struct hwrng omap_rng_ops = { | ||
81 | .name = "omap", | ||
82 | .data_present = omap_rng_data_present, | ||
83 | .data_read = omap_rng_data_read, | ||
84 | }; | ||
85 | |||
86 | static int __init omap_rng_probe(struct device *dev) | ||
87 | { | ||
88 | struct platform_device *pdev = to_platform_device(dev); | ||
89 | struct resource *res, *mem; | ||
90 | int ret; | ||
91 | |||
92 | /* | ||
93 | * A bit ugly, and it will never actually happen but there can | ||
94 | * be only one RNG and this catches any bork | ||
95 | */ | ||
96 | BUG_ON(rng_dev); | ||
97 | |||
98 | if (cpu_is_omap24xx()) { | ||
99 | rng_ick = clk_get(NULL, "rng_ick"); | ||
100 | if (IS_ERR(rng_ick)) { | ||
101 | dev_err(dev, "Could not get rng_ick\n"); | ||
102 | ret = PTR_ERR(rng_ick); | ||
103 | return ret; | ||
104 | } | ||
105 | else { | ||
106 | clk_use(rng_ick); | ||
107 | } | ||
108 | } | ||
109 | |||
110 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
111 | |||
112 | if (!res) | ||
113 | return -ENOENT; | ||
114 | |||
115 | mem = request_mem_region(res->start, res->end - res->start + 1, | ||
116 | pdev->name); | ||
117 | if (mem == NULL) | ||
118 | return -EBUSY; | ||
119 | |||
120 | dev_set_drvdata(dev, mem); | ||
121 | rng_base = (u32 __iomem *)io_p2v(res->start); | ||
122 | |||
123 | ret = hwrng_register(&omap_rng_ops); | ||
124 | if (ret) { | ||
125 | release_resource(mem); | ||
126 | rng_base = NULL; | ||
127 | return ret; | ||
128 | } | ||
129 | |||
130 | dev_info(dev, "OMAP Random Number Generator ver. %02x\n", | ||
131 | omap_rng_read_reg(RNG_REV_REG)); | ||
132 | omap_rng_write_reg(RNG_MASK_REG, 0x1); | ||
133 | |||
134 | rng_dev = dev; | ||
135 | |||
136 | return 0; | ||
137 | } | ||
138 | |||
139 | static int __exit omap_rng_remove(struct device *dev) | ||
140 | { | ||
141 | struct resource *mem = dev_get_drvdata(dev); | ||
142 | |||
143 | hwrng_unregister(&omap_rng_ops); | ||
144 | |||
145 | omap_rng_write_reg(RNG_MASK_REG, 0x0); | ||
146 | |||
147 | if (cpu_is_omap24xx()) { | ||
148 | clk_unuse(rng_ick); | ||
149 | clk_put(rng_ick); | ||
150 | } | ||
151 | |||
152 | release_resource(mem); | ||
153 | rng_base = NULL; | ||
154 | |||
155 | return 0; | ||
156 | } | ||
157 | |||
158 | #ifdef CONFIG_PM | ||
159 | |||
160 | static int omap_rng_suspend(struct device *dev, pm_message_t message, u32 level) | ||
161 | { | ||
162 | omap_rng_write_reg(RNG_MASK_REG, 0x0); | ||
163 | |||
164 | return 0; | ||
165 | } | ||
166 | |||
167 | static int omap_rng_resume(struct device *dev, pm_message_t message, u32 level) | ||
168 | { | ||
169 | omap_rng_write_reg(RNG_MASK_REG, 0x1); | ||
170 | |||
171 | return 1; | ||
172 | } | ||
173 | |||
174 | #else | ||
175 | |||
176 | #define omap_rng_suspend NULL | ||
177 | #define omap_rng_resume NULL | ||
178 | |||
179 | #endif | ||
180 | |||
181 | |||
182 | static struct device_driver omap_rng_driver = { | ||
183 | .name = "omap_rng", | ||
184 | .bus = &platform_bus_type, | ||
185 | .probe = omap_rng_probe, | ||
186 | .remove = __exit_p(omap_rng_remove), | ||
187 | .suspend = omap_rng_suspend, | ||
188 | .resume = omap_rng_resume | ||
189 | }; | ||
190 | |||
191 | static int __init omap_rng_init(void) | ||
192 | { | ||
193 | if (!cpu_is_omap16xx() && !cpu_is_omap24xx()) | ||
194 | return -ENODEV; | ||
195 | |||
196 | return driver_register(&omap_rng_driver); | ||
197 | } | ||
198 | |||
199 | static void __exit omap_rng_exit(void) | ||
200 | { | ||
201 | driver_unregister(&omap_rng_driver); | ||
202 | } | ||
203 | |||
204 | module_init(omap_rng_init); | ||
205 | module_exit(omap_rng_exit); | ||
206 | |||
207 | MODULE_AUTHOR("Deepak Saxena (and others)"); | ||
208 | MODULE_LICENSE("GPL"); | ||