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authorDave Airlie <airlied@linux.ie>2006-08-19 03:43:52 -0400
committerDave Airlie <airlied@linux.ie>2006-09-21 15:32:33 -0400
commitb15ec36806ce3b89a2fddce958de9370efb249da (patch)
treea7c027ffd411eb719123aec77c69355cdf4aded2 /drivers/char/drm
parentd40c8533a5b8ca1887f81ae1c81136f3c40a8488 (diff)
drm: realign sosme radeon code with drm git tree
this applies some minor cleanups for the radeon driver, to use the 3D flush and reset the AGP flags on X recycle Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/char/drm')
-rw-r--r--drivers/char/drm/radeon_cp.c19
-rw-r--r--drivers/char/drm/radeon_drv.h5
2 files changed, 15 insertions, 9 deletions
diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c
index 45f8044e9a30..2b5efa306ad7 100644
--- a/drivers/char/drm/radeon_cp.c
+++ b/drivers/char/drm/radeon_cp.c
@@ -1340,17 +1340,19 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
1340 DRM_DEBUG("\n"); 1340 DRM_DEBUG("\n");
1341 1341
1342 /* if we require new memory map but we don't have it fail */ 1342 /* if we require new memory map but we don't have it fail */
1343 if ((dev_priv->flags & CHIP_NEW_MEMMAP) && !dev_priv->new_memmap) 1343 if ((dev_priv->flags & CHIP_NEW_MEMMAP) && !dev_priv->new_memmap) {
1344 { 1344 DRM_ERROR("Cannot initialise DRM on this card\nThis card requires a new X.org DDX for 3D\n");
1345 DRM_ERROR("Cannot initialise DRM on this card\nThis card requires a new X.org DDX\n");
1346 radeon_do_cleanup_cp(dev); 1345 radeon_do_cleanup_cp(dev);
1347 return DRM_ERR(EINVAL); 1346 return DRM_ERR(EINVAL);
1348 } 1347 }
1349 1348
1350 if (init->is_pci && (dev_priv->flags & CHIP_IS_AGP)) 1349 if (init->is_pci && (dev_priv->flags & CHIP_IS_AGP)) {
1351 {
1352 DRM_DEBUG("Forcing AGP card to PCI mode\n"); 1350 DRM_DEBUG("Forcing AGP card to PCI mode\n");
1353 dev_priv->flags &= ~CHIP_IS_AGP; 1351 dev_priv->flags &= ~CHIP_IS_AGP;
1352 } else if (!(dev_priv->flags & (CHIP_IS_AGP | CHIP_IS_PCI | CHIP_IS_PCIE))
1353 && !init->is_pci) {
1354 DRM_DEBUG("Restoring AGP flag\n");
1355 dev_priv->flags |= CHIP_IS_AGP;
1354 } 1356 }
1355 1357
1356 if ((!(dev_priv->flags & CHIP_IS_AGP)) && !dev->sg) { 1358 if ((!(dev_priv->flags & CHIP_IS_AGP)) && !dev->sg) {
@@ -2189,7 +2191,9 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags)
2189 case CHIP_RV200: 2191 case CHIP_RV200:
2190 case CHIP_R200: 2192 case CHIP_R200:
2191 case CHIP_R300: 2193 case CHIP_R300:
2194 case CHIP_R350:
2192 case CHIP_R420: 2195 case CHIP_R420:
2196 case CHIP_RV410:
2193 dev_priv->flags |= CHIP_HAS_HIERZ; 2197 dev_priv->flags |= CHIP_HAS_HIERZ;
2194 break; 2198 break;
2195 default: 2199 default:
@@ -2199,9 +2203,10 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags)
2199 2203
2200 if (drm_device_is_agp(dev)) 2204 if (drm_device_is_agp(dev))
2201 dev_priv->flags |= CHIP_IS_AGP; 2205 dev_priv->flags |= CHIP_IS_AGP;
2202 2206 else if (drm_device_is_pcie(dev))
2203 if (drm_device_is_pcie(dev))
2204 dev_priv->flags |= CHIP_IS_PCIE; 2207 dev_priv->flags |= CHIP_IS_PCIE;
2208 else
2209 dev_priv->flags |= CHIP_IS_PCI;
2205 2210
2206 DRM_DEBUG("%s card detected\n", 2211 DRM_DEBUG("%s card detected\n",
2207 ((dev_priv->flags & CHIP_IS_AGP) ? "AGP" : (((dev_priv->flags & CHIP_IS_PCIE) ? "PCIE" : "PCI")))); 2212 ((dev_priv->flags & CHIP_IS_AGP) ? "AGP" : (((dev_priv->flags & CHIP_IS_PCIE) ? "PCIE" : "PCI"))));
diff --git a/drivers/char/drm/radeon_drv.h b/drivers/char/drm/radeon_drv.h
index 2f51d5147730..40f1dde6b1bb 100644
--- a/drivers/char/drm/radeon_drv.h
+++ b/drivers/char/drm/radeon_drv.h
@@ -142,6 +142,7 @@ enum radeon_chip_flags {
142 CHIP_HAS_HIERZ = 0x00100000UL, 142 CHIP_HAS_HIERZ = 0x00100000UL,
143 CHIP_IS_PCIE = 0x00200000UL, 143 CHIP_IS_PCIE = 0x00200000UL,
144 CHIP_NEW_MEMMAP = 0x00400000UL, 144 CHIP_NEW_MEMMAP = 0x00400000UL,
145 CHIP_IS_PCI = 0x00800000UL,
145}; 146};
146 147
147#define GET_RING_HEAD(dev_priv) (dev_priv->writeback_works ? \ 148#define GET_RING_HEAD(dev_priv) (dev_priv->writeback_works ? \
@@ -993,12 +994,12 @@ do { \
993 994
994#define RADEON_FLUSH_CACHE() do { \ 995#define RADEON_FLUSH_CACHE() do { \
995 OUT_RING( CP_PACKET0( RADEON_RB3D_DSTCACHE_CTLSTAT, 0 ) ); \ 996 OUT_RING( CP_PACKET0( RADEON_RB3D_DSTCACHE_CTLSTAT, 0 ) ); \
996 OUT_RING( RADEON_RB2D_DC_FLUSH ); \ 997 OUT_RING( RADEON_RB3D_DC_FLUSH ); \
997} while (0) 998} while (0)
998 999
999#define RADEON_PURGE_CACHE() do { \ 1000#define RADEON_PURGE_CACHE() do { \
1000 OUT_RING( CP_PACKET0( RADEON_RB3D_DSTCACHE_CTLSTAT, 0 ) ); \ 1001 OUT_RING( CP_PACKET0( RADEON_RB3D_DSTCACHE_CTLSTAT, 0 ) ); \
1001 OUT_RING( RADEON_RB2D_DC_FLUSH_ALL ); \ 1002 OUT_RING( RADEON_RB3D_DC_FLUSH_ALL ); \
1002} while (0) 1003} while (0)
1003 1004
1004#define RADEON_FLUSH_ZCACHE() do { \ 1005#define RADEON_FLUSH_ZCACHE() do { \