diff options
author | Dave Airlie <airlied@starflyer.(none)> | 2005-09-25 00:28:13 -0400 |
---|---|---|
committer | Dave Airlie <airlied@linux.ie> | 2005-09-25 00:28:13 -0400 |
commit | b5e89ed53ed8d24f83ba1941c07382af00ed238e (patch) | |
tree | 747bae7a565f88a2e1d5974776eeb054a932c505 /drivers/char/drm/via_dma.c | |
parent | 99a2657a29e2d623c3568cd86b27cac13fb63140 (diff) |
drm: lindent the drm directory.
I've been threatening this for a while, so no point hanging around.
This lindents the DRM code which was always really bad in tabbing department.
I've also fixed some misnamed files in comments and removed some trailing
whitespace.
Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/char/drm/via_dma.c')
-rw-r--r-- | drivers/char/drm/via_dma.c | 259 |
1 files changed, 122 insertions, 137 deletions
diff --git a/drivers/char/drm/via_dma.c b/drivers/char/drm/via_dma.c index 4f60f7f4193d..d4b1766608b0 100644 --- a/drivers/char/drm/via_dma.c +++ b/drivers/char/drm/via_dma.c | |||
@@ -1,11 +1,11 @@ | |||
1 | /* via_dma.c -- DMA support for the VIA Unichrome/Pro | 1 | /* via_dma.c -- DMA support for the VIA Unichrome/Pro |
2 | * | 2 | * |
3 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. | 3 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
4 | * All Rights Reserved. | 4 | * All Rights Reserved. |
5 | * | 5 | * |
6 | * Copyright 2004 Digeo, Inc., Palo Alto, CA, U.S.A. | 6 | * Copyright 2004 Digeo, Inc., Palo Alto, CA, U.S.A. |
7 | * All Rights Reserved. | 7 | * All Rights Reserved. |
8 | * | 8 | * |
9 | * Copyright 2004 The Unichrome project. | 9 | * Copyright 2004 The Unichrome project. |
10 | * All Rights Reserved. | 10 | * All Rights Reserved. |
11 | * | 11 | * |
@@ -23,14 +23,14 @@ | |||
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
24 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | 24 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
25 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | 25 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
26 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | 26 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, |
27 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | 27 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
28 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE | 28 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
29 | * USE OR OTHER DEALINGS IN THE SOFTWARE. | 29 | * USE OR OTHER DEALINGS IN THE SOFTWARE. |
30 | * | 30 | * |
31 | * Authors: | 31 | * Authors: |
32 | * Tungsten Graphics, | 32 | * Tungsten Graphics, |
33 | * Erdi Chen, | 33 | * Erdi Chen, |
34 | * Thomas Hellstrom. | 34 | * Thomas Hellstrom. |
35 | */ | 35 | */ |
36 | 36 | ||
@@ -61,34 +61,31 @@ | |||
61 | dev_priv->dma_low +=8; \ | 61 | dev_priv->dma_low +=8; \ |
62 | } | 62 | } |
63 | 63 | ||
64 | #define via_flush_write_combine() DRM_MEMORYBARRIER() | 64 | #define via_flush_write_combine() DRM_MEMORYBARRIER() |
65 | 65 | ||
66 | #define VIA_OUT_RING_QW(w1,w2) \ | 66 | #define VIA_OUT_RING_QW(w1,w2) \ |
67 | *vb++ = (w1); \ | 67 | *vb++ = (w1); \ |
68 | *vb++ = (w2); \ | 68 | *vb++ = (w2); \ |
69 | dev_priv->dma_low += 8; | 69 | dev_priv->dma_low += 8; |
70 | 70 | ||
71 | static void via_cmdbuf_start(drm_via_private_t * dev_priv); | 71 | static void via_cmdbuf_start(drm_via_private_t * dev_priv); |
72 | static void via_cmdbuf_pause(drm_via_private_t * dev_priv); | 72 | static void via_cmdbuf_pause(drm_via_private_t * dev_priv); |
73 | static void via_cmdbuf_reset(drm_via_private_t * dev_priv); | 73 | static void via_cmdbuf_reset(drm_via_private_t * dev_priv); |
74 | static void via_cmdbuf_rewind(drm_via_private_t * dev_priv); | 74 | static void via_cmdbuf_rewind(drm_via_private_t * dev_priv); |
75 | static int via_wait_idle(drm_via_private_t * dev_priv); | 75 | static int via_wait_idle(drm_via_private_t * dev_priv); |
76 | static void via_pad_cache(drm_via_private_t *dev_priv, int qwords); | 76 | static void via_pad_cache(drm_via_private_t * dev_priv, int qwords); |
77 | |||
78 | 77 | ||
79 | /* | 78 | /* |
80 | * Free space in command buffer. | 79 | * Free space in command buffer. |
81 | */ | 80 | */ |
82 | 81 | ||
83 | static uint32_t | 82 | static uint32_t via_cmdbuf_space(drm_via_private_t * dev_priv) |
84 | via_cmdbuf_space(drm_via_private_t *dev_priv) | ||
85 | { | 83 | { |
86 | uint32_t agp_base = dev_priv->dma_offset + | 84 | uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; |
87 | (uint32_t) dev_priv->agpAddr; | ||
88 | uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; | 85 | uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; |
89 | 86 | ||
90 | return ((hw_addr <= dev_priv->dma_low) ? | 87 | return ((hw_addr <= dev_priv->dma_low) ? |
91 | (dev_priv->dma_high + hw_addr - dev_priv->dma_low) : | 88 | (dev_priv->dma_high + hw_addr - dev_priv->dma_low) : |
92 | (hw_addr - dev_priv->dma_low)); | 89 | (hw_addr - dev_priv->dma_low)); |
93 | } | 90 | } |
94 | 91 | ||
@@ -96,15 +93,13 @@ via_cmdbuf_space(drm_via_private_t *dev_priv) | |||
96 | * How much does the command regulator lag behind? | 93 | * How much does the command regulator lag behind? |
97 | */ | 94 | */ |
98 | 95 | ||
99 | static uint32_t | 96 | static uint32_t via_cmdbuf_lag(drm_via_private_t * dev_priv) |
100 | via_cmdbuf_lag(drm_via_private_t *dev_priv) | ||
101 | { | 97 | { |
102 | uint32_t agp_base = dev_priv->dma_offset + | 98 | uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; |
103 | (uint32_t) dev_priv->agpAddr; | ||
104 | uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; | 99 | uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; |
105 | 100 | ||
106 | return ((hw_addr <= dev_priv->dma_low) ? | 101 | return ((hw_addr <= dev_priv->dma_low) ? |
107 | (dev_priv->dma_low - hw_addr) : | 102 | (dev_priv->dma_low - hw_addr) : |
108 | (dev_priv->dma_wrap + dev_priv->dma_low - hw_addr)); | 103 | (dev_priv->dma_wrap + dev_priv->dma_low - hw_addr)); |
109 | } | 104 | } |
110 | 105 | ||
@@ -121,20 +116,20 @@ via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size) | |||
121 | uint32_t count; | 116 | uint32_t count; |
122 | hw_addr_ptr = dev_priv->hw_addr_ptr; | 117 | hw_addr_ptr = dev_priv->hw_addr_ptr; |
123 | cur_addr = dev_priv->dma_low; | 118 | cur_addr = dev_priv->dma_low; |
124 | next_addr = cur_addr + size + 512*1024; | 119 | next_addr = cur_addr + size + 512 * 1024; |
125 | count = 1000000; | 120 | count = 1000000; |
126 | do { | 121 | do { |
127 | hw_addr = *hw_addr_ptr - agp_base; | 122 | hw_addr = *hw_addr_ptr - agp_base; |
128 | if (count-- == 0) { | 123 | if (count-- == 0) { |
129 | DRM_ERROR("via_cmdbuf_wait timed out hw %x cur_addr %x next_addr %x\n", | 124 | DRM_ERROR |
130 | hw_addr, cur_addr, next_addr); | 125 | ("via_cmdbuf_wait timed out hw %x cur_addr %x next_addr %x\n", |
126 | hw_addr, cur_addr, next_addr); | ||
131 | return -1; | 127 | return -1; |
132 | } | 128 | } |
133 | } while ((cur_addr < hw_addr) && (next_addr >= hw_addr)); | 129 | } while ((cur_addr < hw_addr) && (next_addr >= hw_addr)); |
134 | return 0; | 130 | return 0; |
135 | } | 131 | } |
136 | 132 | ||
137 | |||
138 | /* | 133 | /* |
139 | * Checks whether buffer head has reach the end. Rewind the ring buffer | 134 | * Checks whether buffer head has reach the end. Rewind the ring buffer |
140 | * when necessary. | 135 | * when necessary. |
@@ -145,7 +140,8 @@ via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size) | |||
145 | static inline uint32_t *via_check_dma(drm_via_private_t * dev_priv, | 140 | static inline uint32_t *via_check_dma(drm_via_private_t * dev_priv, |
146 | unsigned int size) | 141 | unsigned int size) |
147 | { | 142 | { |
148 | if ((dev_priv->dma_low + size + 4*CMDBUF_ALIGNMENT_SIZE) > dev_priv->dma_high) { | 143 | if ((dev_priv->dma_low + size + 4 * CMDBUF_ALIGNMENT_SIZE) > |
144 | dev_priv->dma_high) { | ||
149 | via_cmdbuf_rewind(dev_priv); | 145 | via_cmdbuf_rewind(dev_priv); |
150 | } | 146 | } |
151 | if (via_cmdbuf_wait(dev_priv, size) != 0) { | 147 | if (via_cmdbuf_wait(dev_priv, size) != 0) { |
@@ -159,7 +155,7 @@ int via_dma_cleanup(drm_device_t * dev) | |||
159 | { | 155 | { |
160 | if (dev->dev_private) { | 156 | if (dev->dev_private) { |
161 | drm_via_private_t *dev_priv = | 157 | drm_via_private_t *dev_priv = |
162 | (drm_via_private_t *) dev->dev_private; | 158 | (drm_via_private_t *) dev->dev_private; |
163 | 159 | ||
164 | if (dev_priv->ring.virtual_start) { | 160 | if (dev_priv->ring.virtual_start) { |
165 | via_cmdbuf_reset(dev_priv); | 161 | via_cmdbuf_reset(dev_priv); |
@@ -189,7 +185,7 @@ static int via_initialize(drm_device_t * dev, | |||
189 | } | 185 | } |
190 | 186 | ||
191 | if (!dev->agp || !dev->agp->base) { | 187 | if (!dev->agp || !dev->agp->base) { |
192 | DRM_ERROR("%s called with no agp memory available\n", | 188 | DRM_ERROR("%s called with no agp memory available\n", |
193 | __FUNCTION__); | 189 | __FUNCTION__); |
194 | return DRM_ERR(EFAULT); | 190 | return DRM_ERR(EFAULT); |
195 | } | 191 | } |
@@ -247,10 +243,10 @@ int via_dma_init(DRM_IOCTL_ARGS) | |||
247 | else | 243 | else |
248 | retcode = via_dma_cleanup(dev); | 244 | retcode = via_dma_cleanup(dev); |
249 | break; | 245 | break; |
250 | case VIA_DMA_INITIALIZED: | 246 | case VIA_DMA_INITIALIZED: |
251 | retcode = (dev_priv->ring.virtual_start != NULL) ? | 247 | retcode = (dev_priv->ring.virtual_start != NULL) ? |
252 | 0: DRM_ERR( EFAULT ); | 248 | 0 : DRM_ERR(EFAULT); |
253 | break; | 249 | break; |
254 | default: | 250 | default: |
255 | retcode = DRM_ERR(EINVAL); | 251 | retcode = DRM_ERR(EINVAL); |
256 | break; | 252 | break; |
@@ -259,8 +255,6 @@ int via_dma_init(DRM_IOCTL_ARGS) | |||
259 | return retcode; | 255 | return retcode; |
260 | } | 256 | } |
261 | 257 | ||
262 | |||
263 | |||
264 | static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd) | 258 | static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd) |
265 | { | 259 | { |
266 | drm_via_private_t *dev_priv; | 260 | drm_via_private_t *dev_priv; |
@@ -277,8 +271,7 @@ static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd) | |||
277 | 271 | ||
278 | if (cmd->size > VIA_PCI_BUF_SIZE) { | 272 | if (cmd->size > VIA_PCI_BUF_SIZE) { |
279 | return DRM_ERR(ENOMEM); | 273 | return DRM_ERR(ENOMEM); |
280 | } | 274 | } |
281 | |||
282 | 275 | ||
283 | if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) | 276 | if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) |
284 | return DRM_ERR(EFAULT); | 277 | return DRM_ERR(EFAULT); |
@@ -289,19 +282,19 @@ static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd) | |||
289 | * copy it to AGP memory when ready. | 282 | * copy it to AGP memory when ready. |
290 | */ | 283 | */ |
291 | 284 | ||
292 | 285 | if ((ret = | |
293 | if ((ret = via_verify_command_stream((uint32_t *)dev_priv->pci_buf, cmd->size, dev, 1))) { | 286 | via_verify_command_stream((uint32_t *) dev_priv->pci_buf, |
287 | cmd->size, dev, 1))) { | ||
294 | return ret; | 288 | return ret; |
295 | } | 289 | } |
296 | 290 | ||
297 | |||
298 | vb = via_check_dma(dev_priv, (cmd->size < 0x100) ? 0x102 : cmd->size); | 291 | vb = via_check_dma(dev_priv, (cmd->size < 0x100) ? 0x102 : cmd->size); |
299 | if (vb == NULL) { | 292 | if (vb == NULL) { |
300 | return DRM_ERR(EAGAIN); | 293 | return DRM_ERR(EAGAIN); |
301 | } | 294 | } |
302 | 295 | ||
303 | memcpy(vb, dev_priv->pci_buf, cmd->size); | 296 | memcpy(vb, dev_priv->pci_buf, cmd->size); |
304 | 297 | ||
305 | dev_priv->dma_low += cmd->size; | 298 | dev_priv->dma_low += cmd->size; |
306 | 299 | ||
307 | /* | 300 | /* |
@@ -310,7 +303,7 @@ static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd) | |||
310 | */ | 303 | */ |
311 | 304 | ||
312 | if (cmd->size < 0x100) | 305 | if (cmd->size < 0x100) |
313 | via_pad_cache(dev_priv,(0x100 - cmd->size) >> 3); | 306 | via_pad_cache(dev_priv, (0x100 - cmd->size) >> 3); |
314 | via_cmdbuf_pause(dev_priv); | 307 | via_cmdbuf_pause(dev_priv); |
315 | 308 | ||
316 | return 0; | 309 | return 0; |
@@ -330,7 +323,7 @@ int via_flush_ioctl(DRM_IOCTL_ARGS) | |||
330 | { | 323 | { |
331 | DRM_DEVICE; | 324 | DRM_DEVICE; |
332 | 325 | ||
333 | LOCK_TEST_WITH_RETURN( dev, filp ); | 326 | LOCK_TEST_WITH_RETURN(dev, filp); |
334 | 327 | ||
335 | return via_driver_dma_quiescent(dev); | 328 | return via_driver_dma_quiescent(dev); |
336 | } | 329 | } |
@@ -341,7 +334,7 @@ int via_cmdbuffer(DRM_IOCTL_ARGS) | |||
341 | drm_via_cmdbuffer_t cmdbuf; | 334 | drm_via_cmdbuffer_t cmdbuf; |
342 | int ret; | 335 | int ret; |
343 | 336 | ||
344 | LOCK_TEST_WITH_RETURN( dev, filp ); | 337 | LOCK_TEST_WITH_RETURN(dev, filp); |
345 | 338 | ||
346 | DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t __user *) data, | 339 | DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t __user *) data, |
347 | sizeof(cmdbuf)); | 340 | sizeof(cmdbuf)); |
@@ -356,8 +349,9 @@ int via_cmdbuffer(DRM_IOCTL_ARGS) | |||
356 | return 0; | 349 | return 0; |
357 | } | 350 | } |
358 | 351 | ||
359 | extern int | 352 | extern int |
360 | via_parse_command_stream(drm_device_t *dev, const uint32_t * buf, unsigned int size); | 353 | via_parse_command_stream(drm_device_t * dev, const uint32_t * buf, |
354 | unsigned int size); | ||
361 | static int via_dispatch_pci_cmdbuffer(drm_device_t * dev, | 355 | static int via_dispatch_pci_cmdbuffer(drm_device_t * dev, |
362 | drm_via_cmdbuffer_t * cmd) | 356 | drm_via_cmdbuffer_t * cmd) |
363 | { | 357 | { |
@@ -366,15 +360,19 @@ static int via_dispatch_pci_cmdbuffer(drm_device_t * dev, | |||
366 | 360 | ||
367 | if (cmd->size > VIA_PCI_BUF_SIZE) { | 361 | if (cmd->size > VIA_PCI_BUF_SIZE) { |
368 | return DRM_ERR(ENOMEM); | 362 | return DRM_ERR(ENOMEM); |
369 | } | 363 | } |
370 | if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) | 364 | if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) |
371 | return DRM_ERR(EFAULT); | 365 | return DRM_ERR(EFAULT); |
372 | 366 | ||
373 | if ((ret = via_verify_command_stream((uint32_t *)dev_priv->pci_buf, cmd->size, dev, 0))) { | 367 | if ((ret = |
368 | via_verify_command_stream((uint32_t *) dev_priv->pci_buf, | ||
369 | cmd->size, dev, 0))) { | ||
374 | return ret; | 370 | return ret; |
375 | } | 371 | } |
376 | 372 | ||
377 | ret = via_parse_command_stream(dev, (const uint32_t *)dev_priv->pci_buf, cmd->size); | 373 | ret = |
374 | via_parse_command_stream(dev, (const uint32_t *)dev_priv->pci_buf, | ||
375 | cmd->size); | ||
378 | return ret; | 376 | return ret; |
379 | } | 377 | } |
380 | 378 | ||
@@ -384,7 +382,7 @@ int via_pci_cmdbuffer(DRM_IOCTL_ARGS) | |||
384 | drm_via_cmdbuffer_t cmdbuf; | 382 | drm_via_cmdbuffer_t cmdbuf; |
385 | int ret; | 383 | int ret; |
386 | 384 | ||
387 | LOCK_TEST_WITH_RETURN( dev, filp ); | 385 | LOCK_TEST_WITH_RETURN(dev, filp); |
388 | 386 | ||
389 | DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t __user *) data, | 387 | DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t __user *) data, |
390 | sizeof(cmdbuf)); | 388 | sizeof(cmdbuf)); |
@@ -400,17 +398,15 @@ int via_pci_cmdbuffer(DRM_IOCTL_ARGS) | |||
400 | return 0; | 398 | return 0; |
401 | } | 399 | } |
402 | 400 | ||
403 | |||
404 | static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv, | 401 | static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv, |
405 | uint32_t * vb, int qw_count) | 402 | uint32_t * vb, int qw_count) |
406 | { | 403 | { |
407 | for (; qw_count > 0; --qw_count) { | 404 | for (; qw_count > 0; --qw_count) { |
408 | VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY); | 405 | VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY); |
409 | } | 406 | } |
410 | return vb; | 407 | return vb; |
411 | } | 408 | } |
412 | 409 | ||
413 | |||
414 | /* | 410 | /* |
415 | * This function is used internally by ring buffer mangement code. | 411 | * This function is used internally by ring buffer mangement code. |
416 | * | 412 | * |
@@ -426,7 +422,7 @@ static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv) | |||
426 | * modifying the pause address stored in the buffer itself. If | 422 | * modifying the pause address stored in the buffer itself. If |
427 | * the regulator has already paused, restart it. | 423 | * the regulator has already paused, restart it. |
428 | */ | 424 | */ |
429 | static int via_hook_segment(drm_via_private_t *dev_priv, | 425 | static int via_hook_segment(drm_via_private_t * dev_priv, |
430 | uint32_t pause_addr_hi, uint32_t pause_addr_lo, | 426 | uint32_t pause_addr_hi, uint32_t pause_addr_lo, |
431 | int no_pci_fire) | 427 | int no_pci_fire) |
432 | { | 428 | { |
@@ -434,7 +430,7 @@ static int via_hook_segment(drm_via_private_t *dev_priv, | |||
434 | volatile uint32_t *paused_at = dev_priv->last_pause_ptr; | 430 | volatile uint32_t *paused_at = dev_priv->last_pause_ptr; |
435 | 431 | ||
436 | via_flush_write_combine(); | 432 | via_flush_write_combine(); |
437 | while(! *(via_get_dma(dev_priv)-1)); | 433 | while (!*(via_get_dma(dev_priv) - 1)) ; |
438 | *dev_priv->last_pause_ptr = pause_addr_lo; | 434 | *dev_priv->last_pause_ptr = pause_addr_lo; |
439 | via_flush_write_combine(); | 435 | via_flush_write_combine(); |
440 | 436 | ||
@@ -443,55 +439,53 @@ static int via_hook_segment(drm_via_private_t *dev_priv, | |||
443 | * Not sure it is needed. | 439 | * Not sure it is needed. |
444 | */ | 440 | */ |
445 | 441 | ||
446 | while(! *dev_priv->last_pause_ptr); | 442 | while (!*dev_priv->last_pause_ptr) ; |
447 | dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1; | 443 | dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1; |
448 | while(! *dev_priv->last_pause_ptr); | 444 | while (!*dev_priv->last_pause_ptr) ; |
449 | |||
450 | 445 | ||
451 | paused = 0; | 446 | paused = 0; |
452 | count = 20; | 447 | count = 20; |
453 | 448 | ||
454 | while (!(paused = (VIA_READ(0x41c) & 0x80000000)) && count--); | 449 | while (!(paused = (VIA_READ(0x41c) & 0x80000000)) && count--) ; |
455 | if ((count <= 8) && (count >= 0)) { | 450 | if ((count <= 8) && (count >= 0)) { |
456 | uint32_t rgtr, ptr; | 451 | uint32_t rgtr, ptr; |
457 | rgtr = *(dev_priv->hw_addr_ptr); | 452 | rgtr = *(dev_priv->hw_addr_ptr); |
458 | ptr = ((char *)dev_priv->last_pause_ptr - dev_priv->dma_ptr) + | 453 | ptr = ((char *)dev_priv->last_pause_ptr - dev_priv->dma_ptr) + |
459 | dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4 - | 454 | dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4 - |
460 | CMDBUF_ALIGNMENT_SIZE; | 455 | CMDBUF_ALIGNMENT_SIZE; |
461 | if (rgtr <= ptr) { | 456 | if (rgtr <= ptr) { |
462 | DRM_ERROR("Command regulator\npaused at count %d, address %x, " | 457 | DRM_ERROR |
463 | "while current pause address is %x.\n" | 458 | ("Command regulator\npaused at count %d, address %x, " |
464 | "Please mail this message to " | 459 | "while current pause address is %x.\n" |
465 | "<unichrome-devel@lists.sourceforge.net>\n", | 460 | "Please mail this message to " |
466 | count, rgtr, ptr); | 461 | "<unichrome-devel@lists.sourceforge.net>\n", count, |
462 | rgtr, ptr); | ||
467 | } | 463 | } |
468 | } | 464 | } |
469 | 465 | ||
470 | if (paused && !no_pci_fire) { | 466 | if (paused && !no_pci_fire) { |
471 | uint32_t rgtr,ptr; | 467 | uint32_t rgtr, ptr; |
472 | uint32_t ptr_low; | 468 | uint32_t ptr_low; |
473 | 469 | ||
474 | count = 1000000; | 470 | count = 1000000; |
475 | while ((VIA_READ(VIA_REG_STATUS) & VIA_CMD_RGTR_BUSY) && count--); | 471 | while ((VIA_READ(VIA_REG_STATUS) & VIA_CMD_RGTR_BUSY) |
476 | 472 | && count--) ; | |
473 | |||
477 | rgtr = *(dev_priv->hw_addr_ptr); | 474 | rgtr = *(dev_priv->hw_addr_ptr); |
478 | ptr = ((char *)paused_at - dev_priv->dma_ptr) + | 475 | ptr = ((char *)paused_at - dev_priv->dma_ptr) + |
479 | dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4; | 476 | dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4; |
480 | |||
481 | 477 | ||
482 | ptr_low = (ptr > 3*CMDBUF_ALIGNMENT_SIZE) ? | 478 | ptr_low = (ptr > 3 * CMDBUF_ALIGNMENT_SIZE) ? |
483 | ptr - 3*CMDBUF_ALIGNMENT_SIZE : 0; | 479 | ptr - 3 * CMDBUF_ALIGNMENT_SIZE : 0; |
484 | if (rgtr <= ptr && rgtr >= ptr_low) { | 480 | if (rgtr <= ptr && rgtr >= ptr_low) { |
485 | VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); | 481 | VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); |
486 | VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); | 482 | VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); |
487 | VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); | 483 | VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); |
488 | } | 484 | } |
489 | } | 485 | } |
490 | return paused; | 486 | return paused; |
491 | } | 487 | } |
492 | 488 | ||
493 | |||
494 | |||
495 | static int via_wait_idle(drm_via_private_t * dev_priv) | 489 | static int via_wait_idle(drm_via_private_t * dev_priv) |
496 | { | 490 | { |
497 | int count = 10000000; | 491 | int count = 10000000; |
@@ -502,9 +496,8 @@ static int via_wait_idle(drm_via_private_t * dev_priv) | |||
502 | } | 496 | } |
503 | 497 | ||
504 | static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type, | 498 | static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type, |
505 | uint32_t addr, uint32_t *cmd_addr_hi, | 499 | uint32_t addr, uint32_t * cmd_addr_hi, |
506 | uint32_t *cmd_addr_lo, | 500 | uint32_t * cmd_addr_lo, int skip_wait) |
507 | int skip_wait) | ||
508 | { | 501 | { |
509 | uint32_t agp_base; | 502 | uint32_t agp_base; |
510 | uint32_t cmd_addr, addr_lo, addr_hi; | 503 | uint32_t cmd_addr, addr_lo, addr_hi; |
@@ -512,31 +505,26 @@ static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type, | |||
512 | uint32_t qw_pad_count; | 505 | uint32_t qw_pad_count; |
513 | 506 | ||
514 | if (!skip_wait) | 507 | if (!skip_wait) |
515 | via_cmdbuf_wait(dev_priv, 2*CMDBUF_ALIGNMENT_SIZE); | 508 | via_cmdbuf_wait(dev_priv, 2 * CMDBUF_ALIGNMENT_SIZE); |
516 | 509 | ||
517 | vb = via_get_dma(dev_priv); | 510 | vb = via_get_dma(dev_priv); |
518 | VIA_OUT_RING_QW( HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) | | 511 | VIA_OUT_RING_QW(HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) | |
519 | (VIA_REG_TRANSPACE >> 2), HC_ParaType_PreCR << 16); | 512 | (VIA_REG_TRANSPACE >> 2), HC_ParaType_PreCR << 16); |
520 | agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; | 513 | agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; |
521 | qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) - | 514 | qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) - |
522 | ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3); | 515 | ((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3); |
523 | 516 | ||
524 | 517 | cmd_addr = (addr) ? addr : | |
525 | cmd_addr = (addr) ? addr : | 518 | agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3); |
526 | agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3); | ||
527 | addr_lo = ((HC_SubA_HAGPBpL << 24) | (cmd_type & HC_HAGPBpID_MASK) | | 519 | addr_lo = ((HC_SubA_HAGPBpL << 24) | (cmd_type & HC_HAGPBpID_MASK) | |
528 | (cmd_addr & HC_HAGPBpL_MASK)); | 520 | (cmd_addr & HC_HAGPBpL_MASK)); |
529 | addr_hi = ((HC_SubA_HAGPBpH << 24) | (cmd_addr >> 24)); | 521 | addr_hi = ((HC_SubA_HAGPBpH << 24) | (cmd_addr >> 24)); |
530 | 522 | ||
531 | vb = via_align_buffer(dev_priv, vb, qw_pad_count - 1); | 523 | vb = via_align_buffer(dev_priv, vb, qw_pad_count - 1); |
532 | VIA_OUT_RING_QW(*cmd_addr_hi = addr_hi, | 524 | VIA_OUT_RING_QW(*cmd_addr_hi = addr_hi, *cmd_addr_lo = addr_lo); |
533 | *cmd_addr_lo = addr_lo); | ||
534 | return vb; | 525 | return vb; |
535 | } | 526 | } |
536 | 527 | ||
537 | |||
538 | |||
539 | |||
540 | static void via_cmdbuf_start(drm_via_private_t * dev_priv) | 528 | static void via_cmdbuf_start(drm_via_private_t * dev_priv) |
541 | { | 529 | { |
542 | uint32_t pause_addr_lo, pause_addr_hi; | 530 | uint32_t pause_addr_lo, pause_addr_hi; |
@@ -545,7 +533,6 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv) | |||
545 | uint32_t command; | 533 | uint32_t command; |
546 | uint32_t agp_base; | 534 | uint32_t agp_base; |
547 | 535 | ||
548 | |||
549 | dev_priv->dma_low = 0; | 536 | dev_priv->dma_low = 0; |
550 | 537 | ||
551 | agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; | 538 | agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; |
@@ -557,12 +544,12 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv) | |||
557 | command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) | | 544 | command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) | |
558 | ((end_addr & 0xff000000) >> 16)); | 545 | ((end_addr & 0xff000000) >> 16)); |
559 | 546 | ||
560 | dev_priv->last_pause_ptr = | 547 | dev_priv->last_pause_ptr = |
561 | via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, | 548 | via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, |
562 | &pause_addr_hi, & pause_addr_lo, 1) - 1; | 549 | &pause_addr_hi, &pause_addr_lo, 1) - 1; |
563 | 550 | ||
564 | via_flush_write_combine(); | 551 | via_flush_write_combine(); |
565 | while(! *dev_priv->last_pause_ptr); | 552 | while (!*dev_priv->last_pause_ptr) ; |
566 | 553 | ||
567 | VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); | 554 | VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); |
568 | VIA_WRITE(VIA_REG_TRANSPACE, command); | 555 | VIA_WRITE(VIA_REG_TRANSPACE, command); |
@@ -575,14 +562,14 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv) | |||
575 | VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK); | 562 | VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK); |
576 | } | 563 | } |
577 | 564 | ||
578 | static void via_pad_cache(drm_via_private_t *dev_priv, int qwords) | 565 | static void via_pad_cache(drm_via_private_t * dev_priv, int qwords) |
579 | { | 566 | { |
580 | uint32_t *vb; | 567 | uint32_t *vb; |
581 | 568 | ||
582 | via_cmdbuf_wait(dev_priv, qwords + 2); | 569 | via_cmdbuf_wait(dev_priv, qwords + 2); |
583 | vb = via_get_dma(dev_priv); | 570 | vb = via_get_dma(dev_priv); |
584 | VIA_OUT_RING_QW( HC_HEADER2, HC_ParaType_NotTex << 16); | 571 | VIA_OUT_RING_QW(HC_HEADER2, HC_ParaType_NotTex << 16); |
585 | via_align_buffer(dev_priv,vb,qwords); | 572 | via_align_buffer(dev_priv, vb, qwords); |
586 | } | 573 | } |
587 | 574 | ||
588 | static inline void via_dummy_bitblt(drm_via_private_t * dev_priv) | 575 | static inline void via_dummy_bitblt(drm_via_private_t * dev_priv) |
@@ -590,10 +577,9 @@ static inline void via_dummy_bitblt(drm_via_private_t * dev_priv) | |||
590 | uint32_t *vb = via_get_dma(dev_priv); | 577 | uint32_t *vb = via_get_dma(dev_priv); |
591 | SetReg2DAGP(0x0C, (0 | (0 << 16))); | 578 | SetReg2DAGP(0x0C, (0 | (0 << 16))); |
592 | SetReg2DAGP(0x10, 0 | (0 << 16)); | 579 | SetReg2DAGP(0x10, 0 | (0 << 16)); |
593 | SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000); | 580 | SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000); |
594 | } | 581 | } |
595 | 582 | ||
596 | |||
597 | static void via_cmdbuf_jump(drm_via_private_t * dev_priv) | 583 | static void via_cmdbuf_jump(drm_via_private_t * dev_priv) |
598 | { | 584 | { |
599 | uint32_t agp_base; | 585 | uint32_t agp_base; |
@@ -603,11 +589,10 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv) | |||
603 | uint32_t dma_low_save1, dma_low_save2; | 589 | uint32_t dma_low_save1, dma_low_save2; |
604 | 590 | ||
605 | agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; | 591 | agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; |
606 | via_align_cmd(dev_priv, HC_HAGPBpID_JUMP, 0, &jump_addr_hi, | 592 | via_align_cmd(dev_priv, HC_HAGPBpID_JUMP, 0, &jump_addr_hi, |
607 | &jump_addr_lo, 0); | 593 | &jump_addr_lo, 0); |
608 | |||
609 | dev_priv->dma_wrap = dev_priv->dma_low; | ||
610 | 594 | ||
595 | dev_priv->dma_wrap = dev_priv->dma_low; | ||
611 | 596 | ||
612 | /* | 597 | /* |
613 | * Wrap command buffer to the beginning. | 598 | * Wrap command buffer to the beginning. |
@@ -619,11 +604,12 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv) | |||
619 | } | 604 | } |
620 | 605 | ||
621 | via_dummy_bitblt(dev_priv); | 606 | via_dummy_bitblt(dev_priv); |
622 | via_dummy_bitblt(dev_priv); | 607 | via_dummy_bitblt(dev_priv); |
623 | 608 | ||
624 | last_pause_ptr = via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, | 609 | last_pause_ptr = |
625 | &pause_addr_lo, 0) -1; | 610 | via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, |
626 | via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, | 611 | &pause_addr_lo, 0) - 1; |
612 | via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, | ||
627 | &pause_addr_lo, 0); | 613 | &pause_addr_lo, 0); |
628 | 614 | ||
629 | *last_pause_ptr = pause_addr_lo; | 615 | *last_pause_ptr = pause_addr_lo; |
@@ -638,23 +624,23 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv) | |||
638 | * does not seem to get updated immediately when a jump occurs. | 624 | * does not seem to get updated immediately when a jump occurs. |
639 | */ | 625 | */ |
640 | 626 | ||
641 | last_pause_ptr = via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, | 627 | last_pause_ptr = |
642 | &pause_addr_lo, 0) -1; | 628 | via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, |
643 | via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, | 629 | &pause_addr_lo, 0) - 1; |
630 | via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi, | ||
644 | &pause_addr_lo, 0); | 631 | &pause_addr_lo, 0); |
645 | *last_pause_ptr = pause_addr_lo; | 632 | *last_pause_ptr = pause_addr_lo; |
646 | 633 | ||
647 | dma_low_save2 = dev_priv->dma_low; | 634 | dma_low_save2 = dev_priv->dma_low; |
648 | dev_priv->dma_low = dma_low_save1; | 635 | dev_priv->dma_low = dma_low_save1; |
649 | via_hook_segment( dev_priv, jump_addr_hi, jump_addr_lo, 0); | 636 | via_hook_segment(dev_priv, jump_addr_hi, jump_addr_lo, 0); |
650 | dev_priv->dma_low = dma_low_save2; | 637 | dev_priv->dma_low = dma_low_save2; |
651 | via_hook_segment( dev_priv, pause_addr_hi, pause_addr_lo, 0); | 638 | via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0); |
652 | } | 639 | } |
653 | 640 | ||
654 | |||
655 | static void via_cmdbuf_rewind(drm_via_private_t * dev_priv) | 641 | static void via_cmdbuf_rewind(drm_via_private_t * dev_priv) |
656 | { | 642 | { |
657 | via_cmdbuf_jump(dev_priv); | 643 | via_cmdbuf_jump(dev_priv); |
658 | } | 644 | } |
659 | 645 | ||
660 | static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type) | 646 | static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type) |
@@ -662,10 +648,9 @@ static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type) | |||
662 | uint32_t pause_addr_lo, pause_addr_hi; | 648 | uint32_t pause_addr_lo, pause_addr_hi; |
663 | 649 | ||
664 | via_align_cmd(dev_priv, cmd_type, 0, &pause_addr_hi, &pause_addr_lo, 0); | 650 | via_align_cmd(dev_priv, cmd_type, 0, &pause_addr_hi, &pause_addr_lo, 0); |
665 | via_hook_segment( dev_priv, pause_addr_hi, pause_addr_lo, 0); | 651 | via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0); |
666 | } | 652 | } |
667 | 653 | ||
668 | |||
669 | static void via_cmdbuf_pause(drm_via_private_t * dev_priv) | 654 | static void via_cmdbuf_pause(drm_via_private_t * dev_priv) |
670 | { | 655 | { |
671 | via_cmdbuf_flush(dev_priv, HC_HAGPBpID_PAUSE); | 656 | via_cmdbuf_flush(dev_priv, HC_HAGPBpID_PAUSE); |
@@ -681,8 +666,7 @@ static void via_cmdbuf_reset(drm_via_private_t * dev_priv) | |||
681 | * User interface to the space and lag functions. | 666 | * User interface to the space and lag functions. |
682 | */ | 667 | */ |
683 | 668 | ||
684 | int | 669 | int via_cmdbuf_size(DRM_IOCTL_ARGS) |
685 | via_cmdbuf_size(DRM_IOCTL_ARGS) | ||
686 | { | 670 | { |
687 | DRM_DEVICE; | 671 | DRM_DEVICE; |
688 | drm_via_cmdbuf_size_t d_siz; | 672 | drm_via_cmdbuf_size_t d_siz; |
@@ -691,7 +675,7 @@ via_cmdbuf_size(DRM_IOCTL_ARGS) | |||
691 | drm_via_private_t *dev_priv; | 675 | drm_via_private_t *dev_priv; |
692 | 676 | ||
693 | DRM_DEBUG("via cmdbuf_size\n"); | 677 | DRM_DEBUG("via cmdbuf_size\n"); |
694 | LOCK_TEST_WITH_RETURN( dev, filp ); | 678 | LOCK_TEST_WITH_RETURN(dev, filp); |
695 | 679 | ||
696 | dev_priv = (drm_via_private_t *) dev->dev_private; | 680 | dev_priv = (drm_via_private_t *) dev->dev_private; |
697 | 681 | ||
@@ -704,12 +688,12 @@ via_cmdbuf_size(DRM_IOCTL_ARGS) | |||
704 | DRM_COPY_FROM_USER_IOCTL(d_siz, (drm_via_cmdbuf_size_t __user *) data, | 688 | DRM_COPY_FROM_USER_IOCTL(d_siz, (drm_via_cmdbuf_size_t __user *) data, |
705 | sizeof(d_siz)); | 689 | sizeof(d_siz)); |
706 | 690 | ||
707 | |||
708 | count = 1000000; | 691 | count = 1000000; |
709 | tmp_size = d_siz.size; | 692 | tmp_size = d_siz.size; |
710 | switch(d_siz.func) { | 693 | switch (d_siz.func) { |
711 | case VIA_CMDBUF_SPACE: | 694 | case VIA_CMDBUF_SPACE: |
712 | while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz.size) && count--) { | 695 | while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz.size) |
696 | && count--) { | ||
713 | if (!d_siz.wait) { | 697 | if (!d_siz.wait) { |
714 | break; | 698 | break; |
715 | } | 699 | } |
@@ -720,7 +704,8 @@ via_cmdbuf_size(DRM_IOCTL_ARGS) | |||
720 | } | 704 | } |
721 | break; | 705 | break; |
722 | case VIA_CMDBUF_LAG: | 706 | case VIA_CMDBUF_LAG: |
723 | while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz.size) && count--) { | 707 | while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz.size) |
708 | && count--) { | ||
724 | if (!d_siz.wait) { | 709 | if (!d_siz.wait) { |
725 | break; | 710 | break; |
726 | } | 711 | } |