drm/radeon: upgrade to 1.27 - make PCI GART more flexible

radeon: make PCI GART aperture size variable, but making table size variable
    This is precursor to getting a TTM backend for this stuff, and also
    allows the PCI table to be allocated at fb 0
radeon: add support for reverse engineered xpress200m

    The IGPGART setup code was traced using mmio-trace on fglrx by myself
    and Phillip Ezolt <phillipezolt@gmail.com> on dri-devel.

    This code doesn't let the 3D driver work properly as the card has no
    vertex shader support.

    Thanks to Matthew Garrett + Ubuntu for providing me some hardware to do this
    work on.

Signed-off-by: Dave Airlie <airlied@linux.ie>

1 files changed, 6 insertions, 0 deletions

diff --git a/drivers/char/drm/radeon_state.c b/drivers/char/drm/radeon_state.c
index 938eccb78cc0..d6041911c474 100644
--- a/drivers/char/drm/radeon_state.c
+++ b/drivers/char/drm/radeon_state.c
@@ -3145,10 +3145,16 @@ static int radeon_cp_setparam(DRM_IOCTL_ARGS)
                 break;
         case RADEON_SETPARAM_PCIGART_LOCATION:
                 dev_priv->pcigart_offset = sp.value;
+                dev_priv->pcigart_offset_set = 1;
                 break;
         case RADEON_SETPARAM_NEW_MEMMAP:
                 dev_priv->new_memmap = sp.value;
                 break;
+        case RADEON_SETPARAM_PCIGART_TABLE_SIZE:
+                dev_priv->gart_info.table_size = sp.value;
+                if (dev_priv->gart_info.table_size < RADEON_PCIGART_TABLE_SIZE)
+                        dev_priv->gart_info.table_size = RADEON_PCIGART_TABLE_SIZE;
+                break;
         default:
                 DRM_DEBUG("Invalid parameter %d\n", sp.param);
                 return DRM_ERR(EINVAL);