diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-01-12 16:53:40 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-01-12 16:53:40 -0500 |
commit | 37ef4399a6bb265d3035e6d6e45f7677b132a3ba (patch) | |
tree | 31adbac36ea310a44562a335f501d69d5ce2c78c /drivers/char/drm/radeon_drv.h | |
parent | bf785ee0aeea7a3e717cb1e11df4135b6cbde7da (diff) | |
parent | 9c7d462eda13ca211b7b4a62f191f4cfda135e2d (diff) |
Merge branch 'drm-forlinus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
Diffstat (limited to 'drivers/char/drm/radeon_drv.h')
-rw-r--r-- | drivers/char/drm/radeon_drv.h | 41 |
1 files changed, 20 insertions, 21 deletions
diff --git a/drivers/char/drm/radeon_drv.h b/drivers/char/drm/radeon_drv.h index d92ccee3e54c..498b19b1d641 100644 --- a/drivers/char/drm/radeon_drv.h +++ b/drivers/char/drm/radeon_drv.h | |||
@@ -38,7 +38,7 @@ | |||
38 | 38 | ||
39 | #define DRIVER_NAME "radeon" | 39 | #define DRIVER_NAME "radeon" |
40 | #define DRIVER_DESC "ATI Radeon" | 40 | #define DRIVER_DESC "ATI Radeon" |
41 | #define DRIVER_DATE "20050911" | 41 | #define DRIVER_DATE "20051229" |
42 | 42 | ||
43 | /* Interface history: | 43 | /* Interface history: |
44 | * | 44 | * |
@@ -73,7 +73,7 @@ | |||
73 | * 1.11- Add packet R200_EMIT_RB3D_BLENDCOLOR to support GL_EXT_blend_color | 73 | * 1.11- Add packet R200_EMIT_RB3D_BLENDCOLOR to support GL_EXT_blend_color |
74 | * and GL_EXT_blend_[func|equation]_separate on r200 | 74 | * and GL_EXT_blend_[func|equation]_separate on r200 |
75 | * 1.12- Add R300 CP microcode support - this just loads the CP on r300 | 75 | * 1.12- Add R300 CP microcode support - this just loads the CP on r300 |
76 | * (No 3D support yet - just microcode loading) | 76 | * (No 3D support yet - just microcode loading). |
77 | * 1.13- Add packet R200_EMIT_TCL_POINT_SPRITE_CNTL for ARB_point_parameters | 77 | * 1.13- Add packet R200_EMIT_TCL_POINT_SPRITE_CNTL for ARB_point_parameters |
78 | * - Add hyperz support, add hyperz flags to clear ioctl. | 78 | * - Add hyperz support, add hyperz flags to clear ioctl. |
79 | * 1.14- Add support for color tiling | 79 | * 1.14- Add support for color tiling |
@@ -88,14 +88,13 @@ | |||
88 | * R200_EMIT_PP_TXFILTER_0-5, 2 more regs) and R200_EMIT_ATF_TFACTOR | 88 | * R200_EMIT_PP_TXFILTER_0-5, 2 more regs) and R200_EMIT_ATF_TFACTOR |
89 | * (replaces R200_EMIT_TFACTOR_0 (8 consts instead of 6) | 89 | * (replaces R200_EMIT_TFACTOR_0 (8 consts instead of 6) |
90 | * 1.19- Add support for gart table in FB memory and PCIE r300 | 90 | * 1.19- Add support for gart table in FB memory and PCIE r300 |
91 | * 1.20- Add support for r300 texrect | ||
92 | * 1.21- Add support for card type getparam | ||
91 | */ | 93 | */ |
92 | #define DRIVER_MAJOR 1 | 94 | #define DRIVER_MAJOR 1 |
93 | #define DRIVER_MINOR 19 | 95 | #define DRIVER_MINOR 21 |
94 | #define DRIVER_PATCHLEVEL 0 | 96 | #define DRIVER_PATCHLEVEL 0 |
95 | 97 | ||
96 | #define GET_RING_HEAD(dev_priv) DRM_READ32( (dev_priv)->ring_rptr, 0 ) | ||
97 | #define SET_RING_HEAD(dev_priv,val) DRM_WRITE32( (dev_priv)->ring_rptr, 0, (val) ) | ||
98 | |||
99 | /* | 98 | /* |
100 | * Radeon chip families | 99 | * Radeon chip families |
101 | */ | 100 | */ |
@@ -103,8 +102,8 @@ enum radeon_family { | |||
103 | CHIP_R100, | 102 | CHIP_R100, |
104 | CHIP_RS100, | 103 | CHIP_RS100, |
105 | CHIP_RV100, | 104 | CHIP_RV100, |
106 | CHIP_R200, | ||
107 | CHIP_RV200, | 105 | CHIP_RV200, |
106 | CHIP_R200, | ||
108 | CHIP_RS200, | 107 | CHIP_RS200, |
109 | CHIP_R250, | 108 | CHIP_R250, |
110 | CHIP_RS250, | 109 | CHIP_RS250, |
@@ -138,6 +137,9 @@ enum radeon_chip_flags { | |||
138 | CHIP_IS_PCIE = 0x00200000UL, | 137 | CHIP_IS_PCIE = 0x00200000UL, |
139 | }; | 138 | }; |
140 | 139 | ||
140 | #define GET_RING_HEAD(dev_priv) DRM_READ32( (dev_priv)->ring_rptr, 0 ) | ||
141 | #define SET_RING_HEAD(dev_priv,val) DRM_WRITE32( (dev_priv)->ring_rptr, 0, (val) ) | ||
142 | |||
141 | typedef struct drm_radeon_freelist { | 143 | typedef struct drm_radeon_freelist { |
142 | unsigned int age; | 144 | unsigned int age; |
143 | drm_buf_t *buf; | 145 | drm_buf_t *buf; |
@@ -245,8 +247,6 @@ typedef struct drm_radeon_private { | |||
245 | 247 | ||
246 | drm_radeon_depth_clear_t depth_clear; | 248 | drm_radeon_depth_clear_t depth_clear; |
247 | 249 | ||
248 | unsigned long fb_offset; | ||
249 | unsigned long mmio_offset; | ||
250 | unsigned long ring_offset; | 250 | unsigned long ring_offset; |
251 | unsigned long ring_rptr_offset; | 251 | unsigned long ring_rptr_offset; |
252 | unsigned long buffers_offset; | 252 | unsigned long buffers_offset; |
@@ -273,7 +273,6 @@ typedef struct drm_radeon_private { | |||
273 | 273 | ||
274 | /* starting from here on, data is preserved accross an open */ | 274 | /* starting from here on, data is preserved accross an open */ |
275 | uint32_t flags; /* see radeon_chip_flags */ | 275 | uint32_t flags; /* see radeon_chip_flags */ |
276 | int is_pci; | ||
277 | } drm_radeon_private_t; | 276 | } drm_radeon_private_t; |
278 | 277 | ||
279 | typedef struct drm_radeon_buf_priv { | 278 | typedef struct drm_radeon_buf_priv { |
@@ -330,17 +329,14 @@ extern irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS); | |||
330 | extern void radeon_driver_irq_preinstall(drm_device_t * dev); | 329 | extern void radeon_driver_irq_preinstall(drm_device_t * dev); |
331 | extern void radeon_driver_irq_postinstall(drm_device_t * dev); | 330 | extern void radeon_driver_irq_postinstall(drm_device_t * dev); |
332 | extern void radeon_driver_irq_uninstall(drm_device_t * dev); | 331 | extern void radeon_driver_irq_uninstall(drm_device_t * dev); |
333 | extern void radeon_driver_prerelease(drm_device_t * dev, DRMFILE filp); | ||
334 | extern void radeon_driver_pretakedown(drm_device_t * dev); | ||
335 | extern int radeon_driver_open_helper(drm_device_t * dev, | ||
336 | drm_file_t * filp_priv); | ||
337 | extern void radeon_driver_free_filp_priv(drm_device_t * dev, | ||
338 | drm_file_t * filp_priv); | ||
339 | |||
340 | extern int radeon_preinit(struct drm_device *dev, unsigned long flags); | ||
341 | extern int radeon_postinit(struct drm_device *dev, unsigned long flags); | ||
342 | extern int radeon_postcleanup(struct drm_device *dev); | ||
343 | 332 | ||
333 | extern int radeon_driver_load(struct drm_device *dev, unsigned long flags); | ||
334 | extern int radeon_driver_unload(struct drm_device *dev); | ||
335 | extern int radeon_driver_firstopen(struct drm_device *dev); | ||
336 | extern void radeon_driver_preclose(drm_device_t * dev, DRMFILE filp); | ||
337 | extern void radeon_driver_postclose(drm_device_t * dev, drm_file_t * filp); | ||
338 | extern void radeon_driver_lastclose(drm_device_t * dev); | ||
339 | extern int radeon_driver_open(drm_device_t * dev, drm_file_t * filp_priv); | ||
344 | extern long radeon_compat_ioctl(struct file *filp, unsigned int cmd, | 340 | extern long radeon_compat_ioctl(struct file *filp, unsigned int cmd, |
345 | unsigned long arg); | 341 | unsigned long arg); |
346 | 342 | ||
@@ -364,6 +360,8 @@ extern int r300_do_cp_cmdbuf(drm_device_t * dev, DRMFILE filp, | |||
364 | */ | 360 | */ |
365 | 361 | ||
366 | #define RADEON_AGP_COMMAND 0x0f60 | 362 | #define RADEON_AGP_COMMAND 0x0f60 |
363 | #define RADEON_AGP_COMMAND_PCI_CONFIG 0x0060 /* offset in PCI config */ | ||
364 | # define RADEON_AGP_ENABLE (1<<8) | ||
367 | #define RADEON_AUX_SCISSOR_CNTL 0x26f0 | 365 | #define RADEON_AUX_SCISSOR_CNTL 0x26f0 |
368 | # define RADEON_EXCLUSIVE_SCISSOR_0 (1 << 24) | 366 | # define RADEON_EXCLUSIVE_SCISSOR_0 (1 << 24) |
369 | # define RADEON_EXCLUSIVE_SCISSOR_1 (1 << 25) | 367 | # define RADEON_EXCLUSIVE_SCISSOR_1 (1 << 25) |
@@ -651,6 +649,8 @@ extern int r300_do_cp_cmdbuf(drm_device_t * dev, DRMFILE filp, | |||
651 | 649 | ||
652 | #define RADEON_WAIT_UNTIL 0x1720 | 650 | #define RADEON_WAIT_UNTIL 0x1720 |
653 | # define RADEON_WAIT_CRTC_PFLIP (1 << 0) | 651 | # define RADEON_WAIT_CRTC_PFLIP (1 << 0) |
652 | # define RADEON_WAIT_2D_IDLE (1 << 14) | ||
653 | # define RADEON_WAIT_3D_IDLE (1 << 15) | ||
654 | # define RADEON_WAIT_2D_IDLECLEAN (1 << 16) | 654 | # define RADEON_WAIT_2D_IDLECLEAN (1 << 16) |
655 | # define RADEON_WAIT_3D_IDLECLEAN (1 << 17) | 655 | # define RADEON_WAIT_3D_IDLECLEAN (1 << 17) |
656 | # define RADEON_WAIT_HOST_IDLECLEAN (1 << 18) | 656 | # define RADEON_WAIT_HOST_IDLECLEAN (1 << 18) |
@@ -1105,7 +1105,6 @@ do { \ | |||
1105 | write = 0; \ | 1105 | write = 0; \ |
1106 | _tab += _i; \ | 1106 | _tab += _i; \ |
1107 | } \ | 1107 | } \ |
1108 | \ | ||
1109 | while (_size > 0) { \ | 1108 | while (_size > 0) { \ |
1110 | *(ring + write) = *_tab++; \ | 1109 | *(ring + write) = *_tab++; \ |
1111 | write++; \ | 1110 | write++; \ |