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authorDave Airlie <airlied@linux.ie>2007-05-08 01:19:23 -0400
committerDave Airlie <airlied@linux.ie>2007-05-08 01:19:23 -0400
commitf2b04cd219e5c0f1214c0eeeec814ddd08a12c1b (patch)
treefa114ea7f96b5985e10c7f8696d635b074649bab /drivers/char/drm/radeon_drm.h
parent5b94f675f57e4ff16c8fda09088d7480a84dcd91 (diff)
drm/radeon: upgrade to 1.27 - make PCI GART more flexible
radeon: make PCI GART aperture size variable, but making table size variable This is precursor to getting a TTM backend for this stuff, and also allows the PCI table to be allocated at fb 0 radeon: add support for reverse engineered xpress200m The IGPGART setup code was traced using mmio-trace on fglrx by myself and Phillip Ezolt <phillipezolt@gmail.com> on dri-devel. This code doesn't let the 3D driver work properly as the card has no vertex shader support. Thanks to Matthew Garrett + Ubuntu for providing me some hardware to do this work on. Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/char/drm/radeon_drm.h')
-rw-r--r--drivers/char/drm/radeon_drm.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/char/drm/radeon_drm.h b/drivers/char/drm/radeon_drm.h
index 8d6350dd5360..66c4b6fed04f 100644
--- a/drivers/char/drm/radeon_drm.h
+++ b/drivers/char/drm/radeon_drm.h
@@ -707,6 +707,7 @@ typedef struct drm_radeon_setparam {
707#define RADEON_SETPARAM_SWITCH_TILING 2 /* enable/disable color tiling */ 707#define RADEON_SETPARAM_SWITCH_TILING 2 /* enable/disable color tiling */
708#define RADEON_SETPARAM_PCIGART_LOCATION 3 /* PCI Gart Location */ 708#define RADEON_SETPARAM_PCIGART_LOCATION 3 /* PCI Gart Location */
709#define RADEON_SETPARAM_NEW_MEMMAP 4 /* Use new memory map */ 709#define RADEON_SETPARAM_NEW_MEMMAP 4 /* Use new memory map */
710#define RADEON_SETPARAM_PCIGART_TABLE_SIZE 5 /* PCI GART Table Size */
710 711
711/* 1.14: Clients can allocate/free a surface 712/* 1.14: Clients can allocate/free a surface
712 */ 713 */