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authorDave Airlie <airlied@linux.ie>2007-11-04 21:50:58 -0500
committerDave Airlie <airlied@redhat.com>2008-02-07 00:09:38 -0500
commitbc5f4523f772cc7629c5c5a46cf4f2a07a5500b8 (patch)
tree8fa2f5194bb05d7e789e5d24a0fe3a7456568146 /drivers/char/drm/radeon_cp.c
parent8562b3f25d6e23c9d9e48a32672944d1e8a2aa97 (diff)
drm: run cleanfile across drm tree
Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/char/drm/radeon_cp.c')
-rw-r--r--drivers/char/drm/radeon_cp.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c
index 24fca8ec1379..df223020f0ae 100644
--- a/drivers/char/drm/radeon_cp.c
+++ b/drivers/char/drm/radeon_cp.c
@@ -1127,7 +1127,7 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
1127{ 1127{
1128 u32 ring_start, cur_read_ptr; 1128 u32 ring_start, cur_read_ptr;
1129 u32 tmp; 1129 u32 tmp;
1130 1130
1131 /* Initialize the memory controller. With new memory map, the fb location 1131 /* Initialize the memory controller. With new memory map, the fb location
1132 * is not changed, it should have been properly initialized already. Part 1132 * is not changed, it should have been properly initialized already. Part
1133 * of the problem is that the code below is bogus, assuming the GART is 1133 * of the problem is that the code below is bogus, assuming the GART is
@@ -1358,7 +1358,7 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
1358 return; 1358 return;
1359 } 1359 }
1360 1360
1361 tmp = RADEON_READ(RADEON_AIC_CNTL); 1361 tmp = RADEON_READ(RADEON_AIC_CNTL);
1362 1362
1363 if (on) { 1363 if (on) {
1364 RADEON_WRITE(RADEON_AIC_CNTL, 1364 RADEON_WRITE(RADEON_AIC_CNTL,
@@ -1583,7 +1583,7 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
1583 1583
1584 dev_priv->fb_location = (RADEON_READ(RADEON_MC_FB_LOCATION) 1584 dev_priv->fb_location = (RADEON_READ(RADEON_MC_FB_LOCATION)
1585 & 0xffff) << 16; 1585 & 0xffff) << 16;
1586 dev_priv->fb_size = 1586 dev_priv->fb_size =
1587 ((RADEON_READ(RADEON_MC_FB_LOCATION) & 0xffff0000u) + 0x10000) 1587 ((RADEON_READ(RADEON_MC_FB_LOCATION) & 0xffff0000u) + 0x10000)
1588 - dev_priv->fb_location; 1588 - dev_priv->fb_location;
1589 1589
@@ -1630,7 +1630,7 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
1630 ((base + dev_priv->gart_size) & 0xfffffffful) < base) 1630 ((base + dev_priv->gart_size) & 0xfffffffful) < base)
1631 base = dev_priv->fb_location 1631 base = dev_priv->fb_location
1632 - dev_priv->gart_size; 1632 - dev_priv->gart_size;
1633 } 1633 }
1634 dev_priv->gart_vm_start = base & 0xffc00000u; 1634 dev_priv->gart_vm_start = base & 0xffc00000u;
1635 if (dev_priv->gart_vm_start != base) 1635 if (dev_priv->gart_vm_start != base)
1636 DRM_INFO("GART aligned down from 0x%08x to 0x%08x\n", 1636 DRM_INFO("GART aligned down from 0x%08x to 0x%08x\n",