diff options
| author | Michel Dänzer <michel@tungstengraphics.com> | 2006-08-07 06:41:53 -0400 |
|---|---|---|
| committer | Dave Airlie <airlied@linux.ie> | 2006-09-21 15:32:31 -0400 |
| commit | b9b603dd1c99a68e65ad51cda25379441df2e17b (patch) | |
| tree | 7f8c00912a48714072840a2d4345282ae5d25049 /drivers/char/drm/radeon_cp.c | |
| parent | ae1b1a4816ac11075d338af79a239f4c326d675c (diff) | |
drm: radeon: Use RADEON_RB3D_DSTCACHE_CTLSTAT instead of RADEON_RB2D_DSTCACHE_CTLSTAT.
The latter seems to be a read-only mirror of the former.
Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/char/drm/radeon_cp.c')
| -rw-r--r-- | drivers/char/drm/radeon_cp.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c index 3956628b2576..45f8044e9a30 100644 --- a/drivers/char/drm/radeon_cp.c +++ b/drivers/char/drm/radeon_cp.c | |||
| @@ -864,13 +864,13 @@ static int radeon_do_pixcache_flush(drm_radeon_private_t * dev_priv) | |||
| 864 | 864 | ||
| 865 | dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; | 865 | dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; |
| 866 | 866 | ||
| 867 | tmp = RADEON_READ(RADEON_RB2D_DSTCACHE_CTLSTAT); | 867 | tmp = RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT); |
| 868 | tmp |= RADEON_RB2D_DC_FLUSH_ALL; | 868 | tmp |= RADEON_RB3D_DC_FLUSH_ALL; |
| 869 | RADEON_WRITE(RADEON_RB2D_DSTCACHE_CTLSTAT, tmp); | 869 | RADEON_WRITE(RADEON_RB3D_DSTCACHE_CTLSTAT, tmp); |
| 870 | 870 | ||
| 871 | for (i = 0; i < dev_priv->usec_timeout; i++) { | 871 | for (i = 0; i < dev_priv->usec_timeout; i++) { |
| 872 | if (!(RADEON_READ(RADEON_RB2D_DSTCACHE_CTLSTAT) | 872 | if (!(RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT) |
| 873 | & RADEON_RB2D_DC_BUSY)) { | 873 | & RADEON_RB3D_DC_BUSY)) { |
| 874 | return 0; | 874 | return 0; |
| 875 | } | 875 | } |
| 876 | DRM_UDELAY(1); | 876 | DRM_UDELAY(1); |