diff options
author | Dave Airlie <airlied@linux.ie> | 2006-03-19 03:12:10 -0500 |
---|---|---|
committer | Dave Airlie <airlied@linux.ie> | 2006-03-19 03:12:10 -0500 |
commit | 45f17100bfd18c99d6479e94598f4e533bbe30d8 (patch) | |
tree | 04f9a1fc6b96cd31380f4d0372813b50eb58e9ae /drivers/char/drm/r300_reg.h | |
parent | ddf19b973be5a96d77c8467f657fe5bd7d126e0f (diff) |
drm: update r300 register names
Update some of the DRM register names from DRM CVS
Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/char/drm/r300_reg.h')
-rw-r--r-- | drivers/char/drm/r300_reg.h | 39 |
1 files changed, 32 insertions, 7 deletions
diff --git a/drivers/char/drm/r300_reg.h b/drivers/char/drm/r300_reg.h index d1e19954406b..a881f96c983e 100644 --- a/drivers/char/drm/r300_reg.h +++ b/drivers/char/drm/r300_reg.h | |||
@@ -711,8 +711,22 @@ I am fairly certain that they are correct unless stated otherwise in comments. | |||
711 | # define R300_TX_MAX_ANISO_16_TO_1 (8 << 21) | 711 | # define R300_TX_MAX_ANISO_16_TO_1 (8 << 21) |
712 | # define R300_TX_MAX_ANISO_MASK (14 << 21) | 712 | # define R300_TX_MAX_ANISO_MASK (14 << 21) |
713 | 713 | ||
714 | #define R300_TX_UNK1_0 0x4440 | 714 | #define R300_TX_FILTER1_0 0x4440 |
715 | # define R300_CHROMA_KEY_MODE_DISABLE 0 | ||
716 | # define R300_CHROMA_KEY_FORCE 1 | ||
717 | # define R300_CHROMA_KEY_BLEND 2 | ||
718 | # define R300_MC_ROUND_NORMAL (0<<2) | ||
719 | # define R300_MC_ROUND_MPEG4 (1<<2) | ||
715 | # define R300_LOD_BIAS_MASK 0x1fff | 720 | # define R300_LOD_BIAS_MASK 0x1fff |
721 | # define R300_EDGE_ANISO_EDGE_DIAG (0<<13) | ||
722 | # define R300_EDGE_ANISO_EDGE_ONLY (1<<13) | ||
723 | # define R300_MC_COORD_TRUNCATE_DISABLE (0<<14) | ||
724 | # define R300_MC_COORD_TRUNCATE_MPEG (1<<14) | ||
725 | # define R300_TX_TRI_PERF_0_8 (0<<15) | ||
726 | # define R300_TX_TRI_PERF_1_8 (1<<15) | ||
727 | # define R300_TX_TRI_PERF_1_4 (2<<15) | ||
728 | # define R300_TX_TRI_PERF_3_8 (3<<15) | ||
729 | # define R300_ANISO_THRESHOLD_MASK (7<<17) | ||
716 | 730 | ||
717 | #define R300_TX_SIZE_0 0x4480 | 731 | #define R300_TX_SIZE_0 0x4480 |
718 | # define R300_TX_WIDTHMASK_SHIFT 0 | 732 | # define R300_TX_WIDTHMASK_SHIFT 0 |
@@ -722,6 +736,8 @@ I am fairly certain that they are correct unless stated otherwise in comments. | |||
722 | # define R300_TX_UNK23 (1 << 23) | 736 | # define R300_TX_UNK23 (1 << 23) |
723 | # define R300_TX_SIZE_SHIFT 26 /* largest of width, height */ | 737 | # define R300_TX_SIZE_SHIFT 26 /* largest of width, height */ |
724 | # define R300_TX_SIZE_MASK (15 << 26) | 738 | # define R300_TX_SIZE_MASK (15 << 26) |
739 | # define R300_TX_SIZE_PROJECTED (1<<30) | ||
740 | # define R300_TX_SIZE_TXPITCH_EN (1<<31) | ||
725 | #define R300_TX_FORMAT_0 0x44C0 | 741 | #define R300_TX_FORMAT_0 0x44C0 |
726 | /* The interpretation of the format word by Wladimir van der Laan */ | 742 | /* The interpretation of the format word by Wladimir van der Laan */ |
727 | /* The X, Y, Z and W refer to the layout of the components. | 743 | /* The X, Y, Z and W refer to the layout of the components. |
@@ -750,7 +766,8 @@ I am fairly certain that they are correct unless stated otherwise in comments. | |||
750 | # define R300_TX_FORMAT_B8G8_B8G8 0x14 /* no swizzle */ | 766 | # define R300_TX_FORMAT_B8G8_B8G8 0x14 /* no swizzle */ |
751 | # define R300_TX_FORMAT_G8R8_G8B8 0x15 /* no swizzle */ | 767 | # define R300_TX_FORMAT_G8R8_G8B8 0x15 /* no swizzle */ |
752 | /* 0x16 - some 16 bit green format.. ?? */ | 768 | /* 0x16 - some 16 bit green format.. ?? */ |
753 | # define R300_TX_FORMAT_UNK25 (1 << 25) /* no swizzle */ | 769 | # define R300_TX_FORMAT_UNK25 (1 << 25) /* no swizzle */ |
770 | # define R300_TX_FORMAT_CUBIC_MAP (1 << 26) | ||
754 | 771 | ||
755 | /* gap */ | 772 | /* gap */ |
756 | /* Floating point formats */ | 773 | /* Floating point formats */ |
@@ -800,18 +817,20 @@ I am fairly certain that they are correct unless stated otherwise in comments. | |||
800 | 817 | ||
801 | # define R300_TX_FORMAT_YUV_MODE 0x00800000 | 818 | # define R300_TX_FORMAT_YUV_MODE 0x00800000 |
802 | 819 | ||
803 | #define R300_TX_PITCH_0 0x4500 | 820 | #define R300_TX_PITCH_0 0x4500 /* obvious missing in gap */ |
804 | #define R300_TX_OFFSET_0 0x4540 | 821 | #define R300_TX_OFFSET_0 0x4540 |
805 | /* BEGIN: Guess from R200 */ | 822 | /* BEGIN: Guess from R200 */ |
806 | # define R300_TXO_ENDIAN_NO_SWAP (0 << 0) | 823 | # define R300_TXO_ENDIAN_NO_SWAP (0 << 0) |
807 | # define R300_TXO_ENDIAN_BYTE_SWAP (1 << 0) | 824 | # define R300_TXO_ENDIAN_BYTE_SWAP (1 << 0) |
808 | # define R300_TXO_ENDIAN_WORD_SWAP (2 << 0) | 825 | # define R300_TXO_ENDIAN_WORD_SWAP (2 << 0) |
809 | # define R300_TXO_ENDIAN_HALFDW_SWAP (3 << 0) | 826 | # define R300_TXO_ENDIAN_HALFDW_SWAP (3 << 0) |
827 | # define R300_TXO_MACRO_TILE (1 << 2) | ||
828 | # define R300_TXO_MICRO_TILE (1 << 3) | ||
810 | # define R300_TXO_OFFSET_MASK 0xffffffe0 | 829 | # define R300_TXO_OFFSET_MASK 0xffffffe0 |
811 | # define R300_TXO_OFFSET_SHIFT 5 | 830 | # define R300_TXO_OFFSET_SHIFT 5 |
812 | /* END */ | 831 | /* END */ |
813 | #define R300_TX_UNK4_0 0x4580 | 832 | #define R300_TX_CHROMA_KEY_0 0x4580 /* 32 bit chroma key */ |
814 | #define R300_TX_BORDER_COLOR_0 0x45C0 //ff00ff00 == { 0, 1.0, 0, 1.0 } | 833 | #define R300_TX_BORDER_COLOR_0 0x45C0 //ff00ff00 == { 0, 1.0, 0, 1.0 } |
815 | 834 | ||
816 | /* END */ | 835 | /* END */ |
817 | 836 | ||
@@ -868,7 +887,9 @@ I am fairly certain that they are correct unless stated otherwise in comments. | |||
868 | # define R300_PFS_NODE_TEX_OFFSET_MASK (31 << 12) | 887 | # define R300_PFS_NODE_TEX_OFFSET_MASK (31 << 12) |
869 | # define R300_PFS_NODE_TEX_END_SHIFT 17 | 888 | # define R300_PFS_NODE_TEX_END_SHIFT 17 |
870 | # define R300_PFS_NODE_TEX_END_MASK (31 << 17) | 889 | # define R300_PFS_NODE_TEX_END_MASK (31 << 17) |
871 | # define R300_PFS_NODE_LAST_NODE (1 << 22) | 890 | /*# define R300_PFS_NODE_LAST_NODE (1 << 22) */ |
891 | # define R300_PFS_NODE_OUTPUT_COLOR (1 << 22) | ||
892 | # define R300_PFS_NODE_OUTPUT_DEPTH (1 << 23) | ||
872 | 893 | ||
873 | /* TEX | 894 | /* TEX |
874 | // As far as I can tell, texture instructions cannot write into output | 895 | // As far as I can tell, texture instructions cannot write into output |
@@ -887,6 +908,7 @@ I am fairly certain that they are correct unless stated otherwise in comments. | |||
887 | */ | 908 | */ |
888 | # define R300_FPITX_OPCODE_SHIFT 15 | 909 | # define R300_FPITX_OPCODE_SHIFT 15 |
889 | # define R300_FPITX_OP_TEX 1 | 910 | # define R300_FPITX_OP_TEX 1 |
911 | # define R300_FPITX_OP_KIL 2 | ||
890 | # define R300_FPITX_OP_TXP 3 | 912 | # define R300_FPITX_OP_TXP 3 |
891 | # define R300_FPITX_OP_TXB 4 | 913 | # define R300_FPITX_OP_TXB 4 |
892 | 914 | ||
@@ -962,9 +984,11 @@ I am fairly certain that they are correct unless stated otherwise in comments. | |||
962 | # define R300_FPI1_SRC2C_CONST (1 << 17) | 984 | # define R300_FPI1_SRC2C_CONST (1 << 17) |
963 | # define R300_FPI1_DSTC_SHIFT 18 | 985 | # define R300_FPI1_DSTC_SHIFT 18 |
964 | # define R300_FPI1_DSTC_MASK (31 << 18) | 986 | # define R300_FPI1_DSTC_MASK (31 << 18) |
987 | # define R300_FPI1_DSTC_REG_MASK_SHIFT 23 | ||
965 | # define R300_FPI1_DSTC_REG_X (1 << 23) | 988 | # define R300_FPI1_DSTC_REG_X (1 << 23) |
966 | # define R300_FPI1_DSTC_REG_Y (1 << 24) | 989 | # define R300_FPI1_DSTC_REG_Y (1 << 24) |
967 | # define R300_FPI1_DSTC_REG_Z (1 << 25) | 990 | # define R300_FPI1_DSTC_REG_Z (1 << 25) |
991 | # define R300_FPI1_DSTC_OUTPUT_MASK_SHIFT 26 | ||
968 | # define R300_FPI1_DSTC_OUTPUT_X (1 << 26) | 992 | # define R300_FPI1_DSTC_OUTPUT_X (1 << 26) |
969 | # define R300_FPI1_DSTC_OUTPUT_Y (1 << 27) | 993 | # define R300_FPI1_DSTC_OUTPUT_Y (1 << 27) |
970 | # define R300_FPI1_DSTC_OUTPUT_Z (1 << 28) | 994 | # define R300_FPI1_DSTC_OUTPUT_Z (1 << 28) |
@@ -983,6 +1007,7 @@ I am fairly certain that they are correct unless stated otherwise in comments. | |||
983 | # define R300_FPI3_DSTA_MASK (31 << 18) | 1007 | # define R300_FPI3_DSTA_MASK (31 << 18) |
984 | # define R300_FPI3_DSTA_REG (1 << 23) | 1008 | # define R300_FPI3_DSTA_REG (1 << 23) |
985 | # define R300_FPI3_DSTA_OUTPUT (1 << 24) | 1009 | # define R300_FPI3_DSTA_OUTPUT (1 << 24) |
1010 | # define R300_FPI3_DSTA_DEPTH (1 << 27) | ||
986 | 1011 | ||
987 | #define R300_PFS_INSTR0_0 0x48C0 | 1012 | #define R300_PFS_INSTR0_0 0x48C0 |
988 | # define R300_FPI0_ARGC_SRC0C_XYZ 0 | 1013 | # define R300_FPI0_ARGC_SRC0C_XYZ 0 |
@@ -1036,7 +1061,7 @@ I am fairly certain that they are correct unless stated otherwise in comments. | |||
1036 | # define R300_FPI0_OUTC_FRC (9 << 23) | 1061 | # define R300_FPI0_OUTC_FRC (9 << 23) |
1037 | # define R300_FPI0_OUTC_REPL_ALPHA (10 << 23) | 1062 | # define R300_FPI0_OUTC_REPL_ALPHA (10 << 23) |
1038 | # define R300_FPI0_OUTC_SAT (1 << 30) | 1063 | # define R300_FPI0_OUTC_SAT (1 << 30) |
1039 | # define R300_FPI0_UNKNOWN_31 (1 << 31) | 1064 | # define R300_FPI0_INSERT_NOP (1 << 31) |
1040 | 1065 | ||
1041 | #define R300_PFS_INSTR2_0 0x49C0 | 1066 | #define R300_PFS_INSTR2_0 0x49C0 |
1042 | # define R300_FPI2_ARGA_SRC0C_X 0 | 1067 | # define R300_FPI2_ARGA_SRC0C_X 0 |