diff options
author | Oliver McFadden <z3ro.geek@gmail.com> | 2007-07-10 22:24:10 -0400 |
---|---|---|
committer | Dave Airlie <airlied@linux.ie> | 2007-07-10 22:24:10 -0400 |
commit | c6c656b4b6ddfc964f1a43394bf86bc76c5e8119 (patch) | |
tree | acca41c1464c7a2100fc2394ff7e22952fca8ae3 /drivers/char/drm/r300_cmdbuf.c | |
parent | ddbee33328dcfb892cd91f2d57a1822f4d6f70d9 (diff) |
r300: updates register header
This updates the R300 register names and allows the VAP_PVS_WAITIDLE register
to be written.
Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/char/drm/r300_cmdbuf.c')
-rw-r--r-- | drivers/char/drm/r300_cmdbuf.c | 41 |
1 files changed, 21 insertions, 20 deletions
diff --git a/drivers/char/drm/r300_cmdbuf.c b/drivers/char/drm/r300_cmdbuf.c index 032a022ec6a8..28fbf3dda28d 100644 --- a/drivers/char/drm/r300_cmdbuf.c +++ b/drivers/char/drm/r300_cmdbuf.c | |||
@@ -148,15 +148,16 @@ void r300_init_reg_flags(void) | |||
148 | 148 | ||
149 | /* these match cmducs() command in r300_driver/r300/r300_cmdbuf.c */ | 149 | /* these match cmducs() command in r300_driver/r300/r300_cmdbuf.c */ |
150 | ADD_RANGE(R300_SE_VPORT_XSCALE, 6); | 150 | ADD_RANGE(R300_SE_VPORT_XSCALE, 6); |
151 | ADD_RANGE(0x2080, 1); | 151 | ADD_RANGE(R300_VAP_CNTL, 1); |
152 | ADD_RANGE(R300_SE_VTE_CNTL, 2); | 152 | ADD_RANGE(R300_SE_VTE_CNTL, 2); |
153 | ADD_RANGE(0x2134, 2); | 153 | ADD_RANGE(0x2134, 2); |
154 | ADD_RANGE(0x2140, 1); | 154 | ADD_RANGE(R300_VAP_CNTL_STATUS, 1); |
155 | ADD_RANGE(R300_VAP_INPUT_CNTL_0, 2); | 155 | ADD_RANGE(R300_VAP_INPUT_CNTL_0, 2); |
156 | ADD_RANGE(0x21DC, 1); | 156 | ADD_RANGE(0x21DC, 1); |
157 | ADD_RANGE(0x221C, 1); | 157 | ADD_RANGE(R300_VAP_UNKNOWN_221C, 1); |
158 | ADD_RANGE(0x2220, 4); | 158 | ADD_RANGE(R300_VAP_CLIP_X_0, 4); |
159 | ADD_RANGE(0x2288, 1); | 159 | ADD_RANGE(R300_VAP_PVS_WAITIDLE, 1); |
160 | ADD_RANGE(R300_VAP_UNKNOWN_2288, 1); | ||
160 | ADD_RANGE(R300_VAP_OUTPUT_VTX_FMT_0, 2); | 161 | ADD_RANGE(R300_VAP_OUTPUT_VTX_FMT_0, 2); |
161 | ADD_RANGE(R300_VAP_PVS_CNTL_1, 3); | 162 | ADD_RANGE(R300_VAP_PVS_CNTL_1, 3); |
162 | ADD_RANGE(R300_GB_ENABLE, 1); | 163 | ADD_RANGE(R300_GB_ENABLE, 1); |
@@ -168,13 +169,13 @@ void r300_init_reg_flags(void) | |||
168 | ADD_RANGE(R300_RE_POINTSIZE, 1); | 169 | ADD_RANGE(R300_RE_POINTSIZE, 1); |
169 | ADD_RANGE(0x4230, 3); | 170 | ADD_RANGE(0x4230, 3); |
170 | ADD_RANGE(R300_RE_LINE_CNT, 1); | 171 | ADD_RANGE(R300_RE_LINE_CNT, 1); |
171 | ADD_RANGE(0x4238, 1); | 172 | ADD_RANGE(R300_RE_UNK4238, 1); |
172 | ADD_RANGE(0x4260, 3); | 173 | ADD_RANGE(0x4260, 3); |
173 | ADD_RANGE(0x4274, 4); | 174 | ADD_RANGE(R300_RE_SHADE, 4); |
174 | ADD_RANGE(0x4288, 5); | 175 | ADD_RANGE(R300_RE_POLYGON_MODE, 5); |
175 | ADD_RANGE(0x42A0, 1); | 176 | ADD_RANGE(R300_RE_ZBIAS_CNTL, 1); |
176 | ADD_RANGE(R300_RE_ZBIAS_T_FACTOR, 4); | 177 | ADD_RANGE(R300_RE_ZBIAS_T_FACTOR, 4); |
177 | ADD_RANGE(0x42B4, 1); | 178 | ADD_RANGE(R300_RE_OCCLUSION_CNTL, 1); |
178 | ADD_RANGE(R300_RE_CULL_CNTL, 1); | 179 | ADD_RANGE(R300_RE_CULL_CNTL, 1); |
179 | ADD_RANGE(0x42C0, 2); | 180 | ADD_RANGE(0x42C0, 2); |
180 | ADD_RANGE(R300_RS_CNTL_0, 2); | 181 | ADD_RANGE(R300_RS_CNTL_0, 2); |
@@ -190,22 +191,22 @@ void r300_init_reg_flags(void) | |||
190 | ADD_RANGE(R300_PFS_INSTR1_0, 64); | 191 | ADD_RANGE(R300_PFS_INSTR1_0, 64); |
191 | ADD_RANGE(R300_PFS_INSTR2_0, 64); | 192 | ADD_RANGE(R300_PFS_INSTR2_0, 64); |
192 | ADD_RANGE(R300_PFS_INSTR3_0, 64); | 193 | ADD_RANGE(R300_PFS_INSTR3_0, 64); |
193 | ADD_RANGE(0x4BC0, 1); | 194 | ADD_RANGE(R300_RE_FOG_STATE, 1); |
194 | ADD_RANGE(0x4BC8, 3); | 195 | ADD_RANGE(R300_FOG_COLOR_R, 3); |
195 | ADD_RANGE(R300_PP_ALPHA_TEST, 2); | 196 | ADD_RANGE(R300_PP_ALPHA_TEST, 2); |
196 | ADD_RANGE(0x4BD8, 1); | 197 | ADD_RANGE(0x4BD8, 1); |
197 | ADD_RANGE(R300_PFS_PARAM_0_X, 64); | 198 | ADD_RANGE(R300_PFS_PARAM_0_X, 64); |
198 | ADD_RANGE(0x4E00, 1); | 199 | ADD_RANGE(0x4E00, 1); |
199 | ADD_RANGE(R300_RB3D_CBLEND, 2); | 200 | ADD_RANGE(R300_RB3D_CBLEND, 2); |
200 | ADD_RANGE(R300_RB3D_COLORMASK, 1); | 201 | ADD_RANGE(R300_RB3D_COLORMASK, 1); |
201 | ADD_RANGE(0x4E10, 3); | 202 | ADD_RANGE(R300_RB3D_BLEND_COLOR, 3); |
202 | ADD_RANGE_MARK(R300_RB3D_COLOROFFSET0, 1, MARK_CHECK_OFFSET); /* check offset */ | 203 | ADD_RANGE_MARK(R300_RB3D_COLOROFFSET0, 1, MARK_CHECK_OFFSET); /* check offset */ |
203 | ADD_RANGE(R300_RB3D_COLORPITCH0, 1); | 204 | ADD_RANGE(R300_RB3D_COLORPITCH0, 1); |
204 | ADD_RANGE(0x4E50, 9); | 205 | ADD_RANGE(0x4E50, 9); |
205 | ADD_RANGE(0x4E88, 1); | 206 | ADD_RANGE(0x4E88, 1); |
206 | ADD_RANGE(0x4EA0, 2); | 207 | ADD_RANGE(0x4EA0, 2); |
207 | ADD_RANGE(R300_RB3D_ZSTENCIL_CNTL_0, 3); | 208 | ADD_RANGE(R300_RB3D_ZSTENCIL_CNTL_0, 3); |
208 | ADD_RANGE(0x4F10, 4); | 209 | ADD_RANGE(R300_RB3D_ZSTENCIL_FORMAT, 4); |
209 | ADD_RANGE_MARK(R300_RB3D_DEPTHOFFSET, 1, MARK_CHECK_OFFSET); /* check offset */ | 210 | ADD_RANGE_MARK(R300_RB3D_DEPTHOFFSET, 1, MARK_CHECK_OFFSET); /* check offset */ |
210 | ADD_RANGE(R300_RB3D_DEPTHPITCH, 1); | 211 | ADD_RANGE(R300_RB3D_DEPTHPITCH, 1); |
211 | ADD_RANGE(0x4F28, 1); | 212 | ADD_RANGE(0x4F28, 1); |
@@ -224,7 +225,7 @@ void r300_init_reg_flags(void) | |||
224 | ADD_RANGE(R300_TX_BORDER_COLOR_0, 16); | 225 | ADD_RANGE(R300_TX_BORDER_COLOR_0, 16); |
225 | 226 | ||
226 | /* Sporadic registers used as primitives are emitted */ | 227 | /* Sporadic registers used as primitives are emitted */ |
227 | ADD_RANGE(0x4f18, 1); | 228 | ADD_RANGE(R300_RB3D_ZCACHE_CTLSTAT, 1); |
228 | ADD_RANGE(R300_RB3D_DSTCACHE_CTLSTAT, 1); | 229 | ADD_RANGE(R300_RB3D_DSTCACHE_CTLSTAT, 1); |
229 | ADD_RANGE(R300_VAP_INPUT_ROUTE_0_0, 8); | 230 | ADD_RANGE(R300_VAP_INPUT_ROUTE_0_0, 8); |
230 | ADD_RANGE(R300_VAP_INPUT_ROUTE_1_0, 8); | 231 | ADD_RANGE(R300_VAP_INPUT_ROUTE_1_0, 8); |
@@ -692,9 +693,9 @@ static __inline__ void r300_pacify(drm_radeon_private_t *dev_priv) | |||
692 | 693 | ||
693 | BEGIN_RING(6); | 694 | BEGIN_RING(6); |
694 | OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); | 695 | OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); |
695 | OUT_RING(0xa); | 696 | OUT_RING(R300_RB3D_DSTCACHE_UNKNOWN_0A); |
696 | OUT_RING(CP_PACKET0(0x4f18, 0)); | 697 | OUT_RING(CP_PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0)); |
697 | OUT_RING(0x3); | 698 | OUT_RING(R300_RB3D_ZCACHE_UNKNOWN_03); |
698 | OUT_RING(CP_PACKET3(RADEON_CP_NOP, 0)); | 699 | OUT_RING(CP_PACKET3(RADEON_CP_NOP, 0)); |
699 | OUT_RING(0x0); | 700 | OUT_RING(0x0); |
700 | ADVANCE_RING(); | 701 | ADVANCE_RING(); |
@@ -766,8 +767,8 @@ static int r300_scratch(drm_radeon_private_t *dev_priv, | |||
766 | } | 767 | } |
767 | 768 | ||
768 | BEGIN_RING(2); | 769 | BEGIN_RING(2); |
769 | OUT_RING(CP_PACKET0(RADEON_SCRATCH_REG0 + header.scratch.reg * 4, 0)); | 770 | OUT_RING( CP_PACKET0( RADEON_SCRATCH_REG0 + header.scratch.reg * 4, 0 ) ); |
770 | OUT_RING(dev_priv->scratch_ages[header.scratch.reg]); | 771 | OUT_RING( dev_priv->scratch_ages[header.scratch.reg] ); |
771 | ADVANCE_RING(); | 772 | ADVANCE_RING(); |
772 | 773 | ||
773 | return 0; | 774 | return 0; |