drm: add initial r500 drm support

This adds CP support for the r500 series of chips, and allows
accel 2D support on these chips with a new radeon driver.

Signed-off-by: Dave Airlie <airlied@redhat.com>

1 files changed, 26 insertions, 13 deletions

diff --git a/drivers/char/drm/r300_cmdbuf.c b/drivers/char/drm/r300_cmdbuf.c
index 8cd82710f6a0..0f4afc44245c 100644
--- a/drivers/char/drm/r300_cmdbuf.c
+++ b/drivers/char/drm/r300_cmdbuf.c
@@ -77,23 +77,31 @@ static int r300_emit_cliprects(drm_radeon_private_t *dev_priv,
                                 return -EFAULT;
                         }
 
-                        box.x1 =
-                            (box.x1 +
-                             R300_CLIPRECT_OFFSET) & R300_CLIPRECT_MASK;
-                        box.y1 =
-                            (box.y1 +
-                             R300_CLIPRECT_OFFSET) & R300_CLIPRECT_MASK;
-                        box.x2 =
-                            (box.x2 +
-                             R300_CLIPRECT_OFFSET) & R300_CLIPRECT_MASK;
-                        box.y2 =
-                            (box.y2 +
-                             R300_CLIPRECT_OFFSET) & R300_CLIPRECT_MASK;
+                        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
+                                box.x1 = (box.x1) &
+                                        R300_CLIPRECT_MASK;
+                                box.y1 = (box.y1) &
+                                        R300_CLIPRECT_MASK;
+                                box.x2 = (box.x2) &
+                                        R300_CLIPRECT_MASK;
+                                box.y2 = (box.y2) &
+                                        R300_CLIPRECT_MASK;
+                        } else {
+                                box.x1 = (box.x1 + R300_CLIPRECT_OFFSET) &
+                                        R300_CLIPRECT_MASK;
+                                box.y1 = (box.y1 + R300_CLIPRECT_OFFSET) &
+                                        R300_CLIPRECT_MASK;
+                                box.x2 = (box.x2 + R300_CLIPRECT_OFFSET) &
+                                        R300_CLIPRECT_MASK;
+                                box.y2 = (box.y2 + R300_CLIPRECT_OFFSET) &
+                                        R300_CLIPRECT_MASK;
 
+                        }
                         OUT_RING((box.x1 << R300_CLIPRECT_X_SHIFT) |
                                  (box.y1 << R300_CLIPRECT_Y_SHIFT));
                         OUT_RING((box.x2 << R300_CLIPRECT_X_SHIFT) |
                                  (box.y2 << R300_CLIPRECT_Y_SHIFT));
+
                 }
 
                 OUT_RING_REG(R300_RE_CLIPRECT_CNTL, r300_cliprect_cntl[nr - 1]);
@@ -133,9 +141,11 @@ static int r300_emit_cliprects(drm_radeon_private_t *dev_priv,
 
 static u8 r300_reg_flags[0x10000 >> 2];
 
-void r300_init_reg_flags(void)
+void r300_init_reg_flags(struct drm_device *dev)
 {
         int i;
+        drm_radeon_private_t *dev_priv = dev->dev_private;
+
         memset(r300_reg_flags, 0, 0x10000 >> 2);
 #define ADD_RANGE_MARK(reg, count,mark) \
                 for(i=((reg)>>2);i<((reg)>>2)+(count);i++)\
@@ -230,6 +240,9 @@ void r300_init_reg_flags(void)
         ADD_RANGE(R300_VAP_INPUT_ROUTE_0_0, 8);
         ADD_RANGE(R300_VAP_INPUT_ROUTE_1_0, 8);
 
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
+                ADD_RANGE(0x4074, 16);
+        }
 }
 
 static __inline__ int r300_check_range(unsigned reg, int count)