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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/char/drm/r128_drm.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/char/drm/r128_drm.h')
-rw-r--r--drivers/char/drm/r128_drm.h345
1 files changed, 345 insertions, 0 deletions
diff --git a/drivers/char/drm/r128_drm.h b/drivers/char/drm/r128_drm.h
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+++ b/drivers/char/drm/r128_drm.h
@@ -0,0 +1,345 @@
1/* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
2 * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com
3 *
4 * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All rights reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 *
27 * Authors:
28 * Gareth Hughes <gareth@valinux.com>
29 * Kevin E. Martin <martin@valinux.com>
30 */
31
32#ifndef __R128_DRM_H__
33#define __R128_DRM_H__
34
35/* WARNING: If you change any of these defines, make sure to change the
36 * defines in the X server file (r128_sarea.h)
37 */
38#ifndef __R128_SAREA_DEFINES__
39#define __R128_SAREA_DEFINES__
40
41/* What needs to be changed for the current vertex buffer?
42 */
43#define R128_UPLOAD_CONTEXT 0x001
44#define R128_UPLOAD_SETUP 0x002
45#define R128_UPLOAD_TEX0 0x004
46#define R128_UPLOAD_TEX1 0x008
47#define R128_UPLOAD_TEX0IMAGES 0x010
48#define R128_UPLOAD_TEX1IMAGES 0x020
49#define R128_UPLOAD_CORE 0x040
50#define R128_UPLOAD_MASKS 0x080
51#define R128_UPLOAD_WINDOW 0x100
52#define R128_UPLOAD_CLIPRECTS 0x200 /* handled client-side */
53#define R128_REQUIRE_QUIESCENCE 0x400
54#define R128_UPLOAD_ALL 0x7ff
55
56#define R128_FRONT 0x1
57#define R128_BACK 0x2
58#define R128_DEPTH 0x4
59
60/* Primitive types
61 */
62#define R128_POINTS 0x1
63#define R128_LINES 0x2
64#define R128_LINE_STRIP 0x3
65#define R128_TRIANGLES 0x4
66#define R128_TRIANGLE_FAN 0x5
67#define R128_TRIANGLE_STRIP 0x6
68
69/* Vertex/indirect buffer size
70 */
71#define R128_BUFFER_SIZE 16384
72
73/* Byte offsets for indirect buffer data
74 */
75#define R128_INDEX_PRIM_OFFSET 20
76#define R128_HOSTDATA_BLIT_OFFSET 32
77
78/* Keep these small for testing.
79 */
80#define R128_NR_SAREA_CLIPRECTS 12
81
82/* There are 2 heaps (local/AGP). Each region within a heap is a
83 * minimum of 64k, and there are at most 64 of them per heap.
84 */
85#define R128_LOCAL_TEX_HEAP 0
86#define R128_AGP_TEX_HEAP 1
87#define R128_NR_TEX_HEAPS 2
88#define R128_NR_TEX_REGIONS 64
89#define R128_LOG_TEX_GRANULARITY 16
90
91#define R128_NR_CONTEXT_REGS 12
92
93#define R128_MAX_TEXTURE_LEVELS 11
94#define R128_MAX_TEXTURE_UNITS 2
95
96#endif /* __R128_SAREA_DEFINES__ */
97
98typedef struct {
99 /* Context state - can be written in one large chunk */
100 unsigned int dst_pitch_offset_c;
101 unsigned int dp_gui_master_cntl_c;
102 unsigned int sc_top_left_c;
103 unsigned int sc_bottom_right_c;
104 unsigned int z_offset_c;
105 unsigned int z_pitch_c;
106 unsigned int z_sten_cntl_c;
107 unsigned int tex_cntl_c;
108 unsigned int misc_3d_state_cntl_reg;
109 unsigned int texture_clr_cmp_clr_c;
110 unsigned int texture_clr_cmp_msk_c;
111 unsigned int fog_color_c;
112
113 /* Texture state */
114 unsigned int tex_size_pitch_c;
115 unsigned int constant_color_c;
116
117 /* Setup state */
118 unsigned int pm4_vc_fpu_setup;
119 unsigned int setup_cntl;
120
121 /* Mask state */
122 unsigned int dp_write_mask;
123 unsigned int sten_ref_mask_c;
124 unsigned int plane_3d_mask_c;
125
126 /* Window state */
127 unsigned int window_xy_offset;
128
129 /* Core state */
130 unsigned int scale_3d_cntl;
131} drm_r128_context_regs_t;
132
133/* Setup registers for each texture unit
134 */
135typedef struct {
136 unsigned int tex_cntl;
137 unsigned int tex_combine_cntl;
138 unsigned int tex_size_pitch;
139 unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
140 unsigned int tex_border_color;
141} drm_r128_texture_regs_t;
142
143
144typedef struct drm_r128_sarea {
145 /* The channel for communication of state information to the kernel
146 * on firing a vertex buffer.
147 */
148 drm_r128_context_regs_t context_state;
149 drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS];
150 unsigned int dirty;
151 unsigned int vertsize;
152 unsigned int vc_format;
153
154 /* The current cliprects, or a subset thereof.
155 */
156 drm_clip_rect_t boxes[R128_NR_SAREA_CLIPRECTS];
157 unsigned int nbox;
158
159 /* Counters for client-side throttling of rendering clients.
160 */
161 unsigned int last_frame;
162 unsigned int last_dispatch;
163
164 drm_tex_region_t tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1];
165 unsigned int tex_age[R128_NR_TEX_HEAPS];
166 int ctx_owner;
167 int pfAllowPageFlip; /* number of 3d windows (0,1,2 or more) */
168 int pfCurrentPage; /* which buffer is being displayed? */
169} drm_r128_sarea_t;
170
171
172/* WARNING: If you change any of these defines, make sure to change the
173 * defines in the Xserver file (xf86drmR128.h)
174 */
175
176/* Rage 128 specific ioctls
177 * The device specific ioctl range is 0x40 to 0x79.
178 */
179#define DRM_R128_INIT 0x00
180#define DRM_R128_CCE_START 0x01
181#define DRM_R128_CCE_STOP 0x02
182#define DRM_R128_CCE_RESET 0x03
183#define DRM_R128_CCE_IDLE 0x04
184/* 0x05 not used */
185#define DRM_R128_RESET 0x06
186#define DRM_R128_SWAP 0x07
187#define DRM_R128_CLEAR 0x08
188#define DRM_R128_VERTEX 0x09
189#define DRM_R128_INDICES 0x0a
190#define DRM_R128_BLIT 0x0b
191#define DRM_R128_DEPTH 0x0c
192#define DRM_R128_STIPPLE 0x0d
193/* 0x0e not used */
194#define DRM_R128_INDIRECT 0x0f
195#define DRM_R128_FULLSCREEN 0x10
196#define DRM_R128_CLEAR2 0x11
197#define DRM_R128_GETPARAM 0x12
198#define DRM_R128_FLIP 0x13
199
200#define DRM_IOCTL_R128_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t)
201#define DRM_IOCTL_R128_CCE_START DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_START)
202#define DRM_IOCTL_R128_CCE_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t)
203#define DRM_IOCTL_R128_CCE_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
204#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
205/* 0x05 not used */
206#define DRM_IOCTL_R128_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_RESET)
207#define DRM_IOCTL_R128_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_R128_SWAP)
208#define DRM_IOCTL_R128_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t)
209#define DRM_IOCTL_R128_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t)
210#define DRM_IOCTL_R128_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t)
211#define DRM_IOCTL_R128_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t)
212#define DRM_IOCTL_R128_DEPTH DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t)
213#define DRM_IOCTL_R128_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t)
214/* 0x0e not used */
215#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t)
216#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t)
217#define DRM_IOCTL_R128_CLEAR2 DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t)
218#define DRM_IOCTL_R128_GETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t)
219#define DRM_IOCTL_R128_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_R128_FLIP)
220
221typedef struct drm_r128_init {
222 enum {
223 R128_INIT_CCE = 0x01,
224 R128_CLEANUP_CCE = 0x02
225 } func;
226#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
227 int sarea_priv_offset;
228#else
229 unsigned long sarea_priv_offset;
230#endif
231 int is_pci;
232 int cce_mode;
233 int cce_secure;
234 int ring_size;
235 int usec_timeout;
236
237 unsigned int fb_bpp;
238 unsigned int front_offset, front_pitch;
239 unsigned int back_offset, back_pitch;
240 unsigned int depth_bpp;
241 unsigned int depth_offset, depth_pitch;
242 unsigned int span_offset;
243
244#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
245 unsigned int fb_offset;
246 unsigned int mmio_offset;
247 unsigned int ring_offset;
248 unsigned int ring_rptr_offset;
249 unsigned int buffers_offset;
250 unsigned int agp_textures_offset;
251#else
252 unsigned long fb_offset;
253 unsigned long mmio_offset;
254 unsigned long ring_offset;
255 unsigned long ring_rptr_offset;
256 unsigned long buffers_offset;
257 unsigned long agp_textures_offset;
258#endif
259} drm_r128_init_t;
260
261typedef struct drm_r128_cce_stop {
262 int flush;
263 int idle;
264} drm_r128_cce_stop_t;
265
266typedef struct drm_r128_clear {
267 unsigned int flags;
268#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
269 int x, y, w, h;
270#endif
271 unsigned int clear_color;
272 unsigned int clear_depth;
273#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
274 unsigned int color_mask;
275 unsigned int depth_mask;
276#endif
277} drm_r128_clear_t;
278
279typedef struct drm_r128_vertex {
280 int prim;
281 int idx; /* Index of vertex buffer */
282 int count; /* Number of vertices in buffer */
283 int discard; /* Client finished with buffer? */
284} drm_r128_vertex_t;
285
286typedef struct drm_r128_indices {
287 int prim;
288 int idx;
289 int start;
290 int end;
291 int discard; /* Client finished with buffer? */
292} drm_r128_indices_t;
293
294typedef struct drm_r128_blit {
295 int idx;
296 int pitch;
297 int offset;
298 int format;
299 unsigned short x, y;
300 unsigned short width, height;
301} drm_r128_blit_t;
302
303typedef struct drm_r128_depth {
304 enum {
305 R128_WRITE_SPAN = 0x01,
306 R128_WRITE_PIXELS = 0x02,
307 R128_READ_SPAN = 0x03,
308 R128_READ_PIXELS = 0x04
309 } func;
310 int n;
311 int __user *x;
312 int __user *y;
313 unsigned int __user *buffer;
314 unsigned char __user *mask;
315} drm_r128_depth_t;
316
317typedef struct drm_r128_stipple {
318 unsigned int __user *mask;
319} drm_r128_stipple_t;
320
321typedef struct drm_r128_indirect {
322 int idx;
323 int start;
324 int end;
325 int discard;
326} drm_r128_indirect_t;
327
328typedef struct drm_r128_fullscreen {
329 enum {
330 R128_INIT_FULLSCREEN = 0x01,
331 R128_CLEANUP_FULLSCREEN = 0x02
332 } func;
333} drm_r128_fullscreen_t;
334
335/* 2.3: An ioctl to get parameters that aren't available to the 3d
336 * client any other way.
337 */
338#define R128_PARAM_IRQ_NR 1
339
340typedef struct drm_r128_getparam {
341 int param;
342 void __user *value;
343} drm_r128_getparam_t;
344
345#endif