diff options
author | Dave Airlie <airlied@starflyer.(none)> | 2005-09-25 00:28:13 -0400 |
---|---|---|
committer | Dave Airlie <airlied@linux.ie> | 2005-09-25 00:28:13 -0400 |
commit | b5e89ed53ed8d24f83ba1941c07382af00ed238e (patch) | |
tree | 747bae7a565f88a2e1d5974776eeb054a932c505 /drivers/char/drm/mga_drm.h | |
parent | 99a2657a29e2d623c3568cd86b27cac13fb63140 (diff) |
drm: lindent the drm directory.
I've been threatening this for a while, so no point hanging around.
This lindents the DRM code which was always really bad in tabbing department.
I've also fixed some misnamed files in comments and removed some trailing
whitespace.
Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/char/drm/mga_drm.h')
-rw-r--r-- | drivers/char/drm/mga_drm.h | 142 |
1 files changed, 67 insertions, 75 deletions
diff --git a/drivers/char/drm/mga_drm.h b/drivers/char/drm/mga_drm.h index d20aab3bd57b..44d1293e2947 100644 --- a/drivers/char/drm/mga_drm.h +++ b/drivers/char/drm/mga_drm.h | |||
@@ -44,10 +44,10 @@ | |||
44 | 44 | ||
45 | /* WARP pipe flags | 45 | /* WARP pipe flags |
46 | */ | 46 | */ |
47 | #define MGA_F 0x1 /* fog */ | 47 | #define MGA_F 0x1 /* fog */ |
48 | #define MGA_A 0x2 /* alpha */ | 48 | #define MGA_A 0x2 /* alpha */ |
49 | #define MGA_S 0x4 /* specular */ | 49 | #define MGA_S 0x4 /* specular */ |
50 | #define MGA_T2 0x8 /* multitexture */ | 50 | #define MGA_T2 0x8 /* multitexture */ |
51 | 51 | ||
52 | #define MGA_WARP_TGZ 0 | 52 | #define MGA_WARP_TGZ 0 |
53 | #define MGA_WARP_TGZF (MGA_F) | 53 | #define MGA_WARP_TGZF (MGA_F) |
@@ -66,14 +66,14 @@ | |||
66 | #define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) | 66 | #define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) |
67 | #define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) | 67 | #define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) |
68 | 68 | ||
69 | #define MGA_MAX_G200_PIPES 8 /* no multitex */ | 69 | #define MGA_MAX_G200_PIPES 8 /* no multitex */ |
70 | #define MGA_MAX_G400_PIPES 16 | 70 | #define MGA_MAX_G400_PIPES 16 |
71 | #define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES | 71 | #define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES |
72 | #define MGA_WARP_UCODE_SIZE 32768 /* in bytes */ | 72 | #define MGA_WARP_UCODE_SIZE 32768 /* in bytes */ |
73 | 73 | ||
74 | #define MGA_CARD_TYPE_G200 1 | 74 | #define MGA_CARD_TYPE_G200 1 |
75 | #define MGA_CARD_TYPE_G400 2 | 75 | #define MGA_CARD_TYPE_G400 2 |
76 | #define MGA_CARD_TYPE_G450 3 /* not currently used */ | 76 | #define MGA_CARD_TYPE_G450 3 /* not currently used */ |
77 | #define MGA_CARD_TYPE_G550 4 | 77 | #define MGA_CARD_TYPE_G550 4 |
78 | 78 | ||
79 | #define MGA_FRONT 0x1 | 79 | #define MGA_FRONT 0x1 |
@@ -86,14 +86,14 @@ | |||
86 | #define MGA_UPLOAD_TEX0 0x2 | 86 | #define MGA_UPLOAD_TEX0 0x2 |
87 | #define MGA_UPLOAD_TEX1 0x4 | 87 | #define MGA_UPLOAD_TEX1 0x4 |
88 | #define MGA_UPLOAD_PIPE 0x8 | 88 | #define MGA_UPLOAD_PIPE 0x8 |
89 | #define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ | 89 | #define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ |
90 | #define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ | 90 | #define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ |
91 | #define MGA_UPLOAD_2D 0x40 | 91 | #define MGA_UPLOAD_2D 0x40 |
92 | #define MGA_WAIT_AGE 0x80 /* handled client-side */ | 92 | #define MGA_WAIT_AGE 0x80 /* handled client-side */ |
93 | #define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ | 93 | #define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ |
94 | #if 0 | 94 | #if 0 |
95 | #define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock | 95 | #define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock |
96 | quiescent */ | 96 | quiescent */ |
97 | #endif | 97 | #endif |
98 | 98 | ||
99 | /* 32 buffers of 64k each, total 2 meg. | 99 | /* 32 buffers of 64k each, total 2 meg. |
@@ -120,8 +120,7 @@ | |||
120 | 120 | ||
121 | #define DRM_MGA_IDLE_RETRY 2048 | 121 | #define DRM_MGA_IDLE_RETRY 2048 |
122 | 122 | ||
123 | #endif /* __MGA_SAREA_DEFINES__ */ | 123 | #endif /* __MGA_SAREA_DEFINES__ */ |
124 | |||
125 | 124 | ||
126 | /* Setup registers for 3D context | 125 | /* Setup registers for 3D context |
127 | */ | 126 | */ |
@@ -165,25 +164,25 @@ typedef struct { | |||
165 | /* General aging mechanism | 164 | /* General aging mechanism |
166 | */ | 165 | */ |
167 | typedef struct { | 166 | typedef struct { |
168 | unsigned int head; /* Position of head pointer */ | 167 | unsigned int head; /* Position of head pointer */ |
169 | unsigned int wrap; /* Primary DMA wrap count */ | 168 | unsigned int wrap; /* Primary DMA wrap count */ |
170 | } drm_mga_age_t; | 169 | } drm_mga_age_t; |
171 | 170 | ||
172 | typedef struct _drm_mga_sarea { | 171 | typedef struct _drm_mga_sarea { |
173 | /* The channel for communication of state information to the kernel | 172 | /* The channel for communication of state information to the kernel |
174 | * on firing a vertex dma buffer. | 173 | * on firing a vertex dma buffer. |
175 | */ | 174 | */ |
176 | drm_mga_context_regs_t context_state; | 175 | drm_mga_context_regs_t context_state; |
177 | drm_mga_server_regs_t server_state; | 176 | drm_mga_server_regs_t server_state; |
178 | drm_mga_texture_regs_t tex_state[2]; | 177 | drm_mga_texture_regs_t tex_state[2]; |
179 | unsigned int warp_pipe; | 178 | unsigned int warp_pipe; |
180 | unsigned int dirty; | 179 | unsigned int dirty; |
181 | unsigned int vertsize; | 180 | unsigned int vertsize; |
182 | 181 | ||
183 | /* The current cliprects, or a subset thereof. | 182 | /* The current cliprects, or a subset thereof. |
184 | */ | 183 | */ |
185 | drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS]; | 184 | drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS]; |
186 | unsigned int nbox; | 185 | unsigned int nbox; |
187 | 186 | ||
188 | /* Information about the most recently used 3d drawable. The | 187 | /* Information about the most recently used 3d drawable. The |
189 | * client fills in the req_* fields, the server fills in the | 188 | * client fills in the req_* fields, the server fills in the |
@@ -192,18 +191,18 @@ typedef struct _drm_mga_sarea { | |||
192 | * The client clears the exported_drawable field before | 191 | * The client clears the exported_drawable field before |
193 | * clobbering the boxes data. | 192 | * clobbering the boxes data. |
194 | */ | 193 | */ |
195 | unsigned int req_drawable; /* the X drawable id */ | 194 | unsigned int req_drawable; /* the X drawable id */ |
196 | unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ | 195 | unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ |
197 | 196 | ||
198 | unsigned int exported_drawable; | 197 | unsigned int exported_drawable; |
199 | unsigned int exported_index; | 198 | unsigned int exported_index; |
200 | unsigned int exported_stamp; | 199 | unsigned int exported_stamp; |
201 | unsigned int exported_buffers; | 200 | unsigned int exported_buffers; |
202 | unsigned int exported_nfront; | 201 | unsigned int exported_nfront; |
203 | unsigned int exported_nback; | 202 | unsigned int exported_nback; |
204 | int exported_back_x, exported_front_x, exported_w; | 203 | int exported_back_x, exported_front_x, exported_w; |
205 | int exported_back_y, exported_front_y, exported_h; | 204 | int exported_back_y, exported_front_y, exported_h; |
206 | drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS]; | 205 | drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS]; |
207 | 206 | ||
208 | /* Counters for aging textures and for client-side throttling. | 207 | /* Counters for aging textures and for client-side throttling. |
209 | */ | 208 | */ |
@@ -211,21 +210,20 @@ typedef struct _drm_mga_sarea { | |||
211 | unsigned int last_wrap; | 210 | unsigned int last_wrap; |
212 | 211 | ||
213 | drm_mga_age_t last_frame; | 212 | drm_mga_age_t last_frame; |
214 | unsigned int last_enqueue; /* last time a buffer was enqueued */ | 213 | unsigned int last_enqueue; /* last time a buffer was enqueued */ |
215 | unsigned int last_dispatch; /* age of the most recently dispatched buffer */ | 214 | unsigned int last_dispatch; /* age of the most recently dispatched buffer */ |
216 | unsigned int last_quiescent; /* */ | 215 | unsigned int last_quiescent; /* */ |
217 | 216 | ||
218 | /* LRU lists for texture memory in agp space and on the card. | 217 | /* LRU lists for texture memory in agp space and on the card. |
219 | */ | 218 | */ |
220 | drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1]; | 219 | drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1]; |
221 | unsigned int texAge[MGA_NR_TEX_HEAPS]; | 220 | unsigned int texAge[MGA_NR_TEX_HEAPS]; |
222 | 221 | ||
223 | /* Mechanism to validate card state. | 222 | /* Mechanism to validate card state. |
224 | */ | 223 | */ |
225 | int ctxOwner; | 224 | int ctxOwner; |
226 | } drm_mga_sarea_t; | 225 | } drm_mga_sarea_t; |
227 | 226 | ||
228 | |||
229 | /* MGA specific ioctls | 227 | /* MGA specific ioctls |
230 | * The device specific ioctl range is 0x40 to 0x79. | 228 | * The device specific ioctl range is 0x40 to 0x79. |
231 | */ | 229 | */ |
@@ -247,7 +245,6 @@ typedef struct _drm_mga_sarea { | |||
247 | #define DRM_MGA_WAIT_FENCE 0x0b | 245 | #define DRM_MGA_WAIT_FENCE 0x0b |
248 | #define DRM_MGA_DMA_BOOTSTRAP 0x0c | 246 | #define DRM_MGA_DMA_BOOTSTRAP 0x0c |
249 | 247 | ||
250 | |||
251 | #define DRM_IOCTL_MGA_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t) | 248 | #define DRM_IOCTL_MGA_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t) |
252 | #define DRM_IOCTL_MGA_FLUSH DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_FLUSH, drm_lock_t) | 249 | #define DRM_IOCTL_MGA_FLUSH DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_FLUSH, drm_lock_t) |
253 | #define DRM_IOCTL_MGA_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MGA_RESET) | 250 | #define DRM_IOCTL_MGA_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MGA_RESET) |
@@ -263,33 +260,33 @@ typedef struct _drm_mga_sarea { | |||
263 | #define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t) | 260 | #define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t) |
264 | 261 | ||
265 | typedef struct _drm_mga_warp_index { | 262 | typedef struct _drm_mga_warp_index { |
266 | int installed; | 263 | int installed; |
267 | unsigned long phys_addr; | 264 | unsigned long phys_addr; |
268 | int size; | 265 | int size; |
269 | } drm_mga_warp_index_t; | 266 | } drm_mga_warp_index_t; |
270 | 267 | ||
271 | typedef struct drm_mga_init { | 268 | typedef struct drm_mga_init { |
272 | enum { | 269 | enum { |
273 | MGA_INIT_DMA = 0x01, | 270 | MGA_INIT_DMA = 0x01, |
274 | MGA_CLEANUP_DMA = 0x02 | 271 | MGA_CLEANUP_DMA = 0x02 |
275 | } func; | 272 | } func; |
276 | 273 | ||
277 | unsigned long sarea_priv_offset; | 274 | unsigned long sarea_priv_offset; |
278 | 275 | ||
279 | int chipset; | 276 | int chipset; |
280 | int sgram; | 277 | int sgram; |
281 | 278 | ||
282 | unsigned int maccess; | 279 | unsigned int maccess; |
283 | 280 | ||
284 | unsigned int fb_cpp; | 281 | unsigned int fb_cpp; |
285 | unsigned int front_offset, front_pitch; | 282 | unsigned int front_offset, front_pitch; |
286 | unsigned int back_offset, back_pitch; | 283 | unsigned int back_offset, back_pitch; |
287 | 284 | ||
288 | unsigned int depth_cpp; | 285 | unsigned int depth_cpp; |
289 | unsigned int depth_offset, depth_pitch; | 286 | unsigned int depth_offset, depth_pitch; |
290 | 287 | ||
291 | unsigned int texture_offset[MGA_NR_TEX_HEAPS]; | 288 | unsigned int texture_offset[MGA_NR_TEX_HEAPS]; |
292 | unsigned int texture_size[MGA_NR_TEX_HEAPS]; | 289 | unsigned int texture_size[MGA_NR_TEX_HEAPS]; |
293 | 290 | ||
294 | unsigned long fb_offset; | 291 | unsigned long fb_offset; |
295 | unsigned long mmio_offset; | 292 | unsigned long mmio_offset; |
@@ -302,64 +299,59 @@ typedef struct drm_mga_init { | |||
302 | typedef struct drm_mga_dma_bootstrap { | 299 | typedef struct drm_mga_dma_bootstrap { |
303 | /** | 300 | /** |
304 | * \name AGP texture region | 301 | * \name AGP texture region |
305 | * | 302 | * |
306 | * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, these fields will | 303 | * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, these fields will |
307 | * be filled in with the actual AGP texture settings. | 304 | * be filled in with the actual AGP texture settings. |
308 | * | 305 | * |
309 | * \warning | 306 | * \warning |
310 | * If these fields are non-zero, but dma_mga_dma_bootstrap::agp_mode | 307 | * If these fields are non-zero, but dma_mga_dma_bootstrap::agp_mode |
311 | * is zero, it means that PCI memory (most likely through the use of | 308 | * is zero, it means that PCI memory (most likely through the use of |
312 | * an IOMMU) is being used for "AGP" textures. | 309 | * an IOMMU) is being used for "AGP" textures. |
313 | */ | 310 | */ |
314 | /*@{*/ | 311 | /*@{ */ |
315 | unsigned long texture_handle; /**< Handle used to map AGP textures. */ | 312 | unsigned long texture_handle; /**< Handle used to map AGP textures. */ |
316 | uint32_t texture_size; /**< Size of the AGP texture region. */ | 313 | uint32_t texture_size; /**< Size of the AGP texture region. */ |
317 | /*@}*/ | 314 | /*@} */ |
318 | |||
319 | 315 | ||
320 | /** | 316 | /** |
321 | * Requested size of the primary DMA region. | 317 | * Requested size of the primary DMA region. |
322 | * | 318 | * |
323 | * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be | 319 | * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be |
324 | * filled in with the actual AGP mode. If AGP was not available | 320 | * filled in with the actual AGP mode. If AGP was not available |
325 | */ | 321 | */ |
326 | uint32_t primary_size; | 322 | uint32_t primary_size; |
327 | 323 | ||
328 | |||
329 | /** | 324 | /** |
330 | * Requested number of secondary DMA buffers. | 325 | * Requested number of secondary DMA buffers. |
331 | * | 326 | * |
332 | * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be | 327 | * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be |
333 | * filled in with the actual number of secondary DMA buffers | 328 | * filled in with the actual number of secondary DMA buffers |
334 | * allocated. Particularly when PCI DMA is used, this may be | 329 | * allocated. Particularly when PCI DMA is used, this may be |
335 | * (subtantially) less than the number requested. | 330 | * (subtantially) less than the number requested. |
336 | */ | 331 | */ |
337 | uint32_t secondary_bin_count; | 332 | uint32_t secondary_bin_count; |
338 | 333 | ||
339 | |||
340 | /** | 334 | /** |
341 | * Requested size of each secondary DMA buffer. | 335 | * Requested size of each secondary DMA buffer. |
342 | * | 336 | * |
343 | * While the kernel \b is free to reduce | 337 | * While the kernel \b is free to reduce |
344 | * dma_mga_dma_bootstrap::secondary_bin_count, it is \b not allowed | 338 | * dma_mga_dma_bootstrap::secondary_bin_count, it is \b not allowed |
345 | * to reduce dma_mga_dma_bootstrap::secondary_bin_size. | 339 | * to reduce dma_mga_dma_bootstrap::secondary_bin_size. |
346 | */ | 340 | */ |
347 | uint32_t secondary_bin_size; | 341 | uint32_t secondary_bin_size; |
348 | 342 | ||
349 | |||
350 | /** | 343 | /** |
351 | * Bit-wise mask of AGPSTAT2_* values. Currently only \c AGPSTAT2_1X, | 344 | * Bit-wise mask of AGPSTAT2_* values. Currently only \c AGPSTAT2_1X, |
352 | * \c AGPSTAT2_2X, and \c AGPSTAT2_4X are supported. If this value is | 345 | * \c AGPSTAT2_2X, and \c AGPSTAT2_4X are supported. If this value is |
353 | * zero, it means that PCI DMA should be used, even if AGP is | 346 | * zero, it means that PCI DMA should be used, even if AGP is |
354 | * possible. | 347 | * possible. |
355 | * | 348 | * |
356 | * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be | 349 | * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be |
357 | * filled in with the actual AGP mode. If AGP was not available | 350 | * filled in with the actual AGP mode. If AGP was not available |
358 | * (i.e., PCI DMA was used), this value will be zero. | 351 | * (i.e., PCI DMA was used), this value will be zero. |
359 | */ | 352 | */ |
360 | uint32_t agp_mode; | 353 | uint32_t agp_mode; |
361 | 354 | ||
362 | |||
363 | /** | 355 | /** |
364 | * Desired AGP GART size, measured in megabytes. | 356 | * Desired AGP GART size, measured in megabytes. |
365 | */ | 357 | */ |
@@ -375,16 +367,16 @@ typedef struct drm_mga_clear { | |||
375 | } drm_mga_clear_t; | 367 | } drm_mga_clear_t; |
376 | 368 | ||
377 | typedef struct drm_mga_vertex { | 369 | typedef struct drm_mga_vertex { |
378 | int idx; /* buffer to queue */ | 370 | int idx; /* buffer to queue */ |
379 | int used; /* bytes in use */ | 371 | int used; /* bytes in use */ |
380 | int discard; /* client finished with buffer? */ | 372 | int discard; /* client finished with buffer? */ |
381 | } drm_mga_vertex_t; | 373 | } drm_mga_vertex_t; |
382 | 374 | ||
383 | typedef struct drm_mga_indices { | 375 | typedef struct drm_mga_indices { |
384 | int idx; /* buffer to queue */ | 376 | int idx; /* buffer to queue */ |
385 | unsigned int start; | 377 | unsigned int start; |
386 | unsigned int end; | 378 | unsigned int end; |
387 | int discard; /* client finished with buffer? */ | 379 | int discard; /* client finished with buffer? */ |
388 | } drm_mga_indices_t; | 380 | } drm_mga_indices_t; |
389 | 381 | ||
390 | typedef struct drm_mga_iload { | 382 | typedef struct drm_mga_iload { |
@@ -400,12 +392,12 @@ typedef struct _drm_mga_blit { | |||
400 | int src_pitch, dst_pitch; | 392 | int src_pitch, dst_pitch; |
401 | int delta_sx, delta_sy; | 393 | int delta_sx, delta_sy; |
402 | int delta_dx, delta_dy; | 394 | int delta_dx, delta_dy; |
403 | int height, ydir; /* flip image vertically */ | 395 | int height, ydir; /* flip image vertically */ |
404 | int source_pitch, dest_pitch; | 396 | int source_pitch, dest_pitch; |
405 | } drm_mga_blit_t; | 397 | } drm_mga_blit_t; |
406 | 398 | ||
407 | /* 3.1: An ioctl to get parameters that aren't available to the 3d | 399 | /* 3.1: An ioctl to get parameters that aren't available to the 3d |
408 | * client any other way. | 400 | * client any other way. |
409 | */ | 401 | */ |
410 | #define MGA_PARAM_IRQ_NR 1 | 402 | #define MGA_PARAM_IRQ_NR 1 |
411 | 403 | ||