diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/char/drm/mga_drm.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'drivers/char/drm/mga_drm.h')
-rw-r--r-- | drivers/char/drm/mga_drm.h | 349 |
1 files changed, 349 insertions, 0 deletions
diff --git a/drivers/char/drm/mga_drm.h b/drivers/char/drm/mga_drm.h new file mode 100644 index 000000000000..521d4451d012 --- /dev/null +++ b/drivers/char/drm/mga_drm.h | |||
@@ -0,0 +1,349 @@ | |||
1 | /* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*- | ||
2 | * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com | ||
3 | * | ||
4 | * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. | ||
5 | * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. | ||
6 | * All rights reserved. | ||
7 | * | ||
8 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
9 | * copy of this software and associated documentation files (the "Software"), | ||
10 | * to deal in the Software without restriction, including without limitation | ||
11 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
12 | * and/or sell copies of the Software, and to permit persons to whom the | ||
13 | * Software is furnished to do so, subject to the following conditions: | ||
14 | * | ||
15 | * The above copyright notice and this permission notice (including the next | ||
16 | * paragraph) shall be included in all copies or substantial portions of the | ||
17 | * Software. | ||
18 | * | ||
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
22 | * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
23 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
24 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
25 | * OTHER DEALINGS IN THE SOFTWARE. | ||
26 | * | ||
27 | * Authors: | ||
28 | * Jeff Hartmann <jhartmann@valinux.com> | ||
29 | * Keith Whitwell <keith@tungstengraphics.com> | ||
30 | * | ||
31 | * Rewritten by: | ||
32 | * Gareth Hughes <gareth@valinux.com> | ||
33 | */ | ||
34 | |||
35 | #ifndef __MGA_DRM_H__ | ||
36 | #define __MGA_DRM_H__ | ||
37 | |||
38 | /* WARNING: If you change any of these defines, make sure to change the | ||
39 | * defines in the Xserver file (mga_sarea.h) | ||
40 | */ | ||
41 | |||
42 | #ifndef __MGA_SAREA_DEFINES__ | ||
43 | #define __MGA_SAREA_DEFINES__ | ||
44 | |||
45 | /* WARP pipe flags | ||
46 | */ | ||
47 | #define MGA_F 0x1 /* fog */ | ||
48 | #define MGA_A 0x2 /* alpha */ | ||
49 | #define MGA_S 0x4 /* specular */ | ||
50 | #define MGA_T2 0x8 /* multitexture */ | ||
51 | |||
52 | #define MGA_WARP_TGZ 0 | ||
53 | #define MGA_WARP_TGZF (MGA_F) | ||
54 | #define MGA_WARP_TGZA (MGA_A) | ||
55 | #define MGA_WARP_TGZAF (MGA_F|MGA_A) | ||
56 | #define MGA_WARP_TGZS (MGA_S) | ||
57 | #define MGA_WARP_TGZSF (MGA_S|MGA_F) | ||
58 | #define MGA_WARP_TGZSA (MGA_S|MGA_A) | ||
59 | #define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A) | ||
60 | #define MGA_WARP_T2GZ (MGA_T2) | ||
61 | #define MGA_WARP_T2GZF (MGA_T2|MGA_F) | ||
62 | #define MGA_WARP_T2GZA (MGA_T2|MGA_A) | ||
63 | #define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F) | ||
64 | #define MGA_WARP_T2GZS (MGA_T2|MGA_S) | ||
65 | #define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F) | ||
66 | #define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) | ||
67 | #define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) | ||
68 | |||
69 | #define MGA_MAX_G200_PIPES 8 /* no multitex */ | ||
70 | #define MGA_MAX_G400_PIPES 16 | ||
71 | #define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES | ||
72 | #define MGA_WARP_UCODE_SIZE 32768 /* in bytes */ | ||
73 | |||
74 | #define MGA_CARD_TYPE_G200 1 | ||
75 | #define MGA_CARD_TYPE_G400 2 | ||
76 | |||
77 | |||
78 | #define MGA_FRONT 0x1 | ||
79 | #define MGA_BACK 0x2 | ||
80 | #define MGA_DEPTH 0x4 | ||
81 | |||
82 | /* What needs to be changed for the current vertex dma buffer? | ||
83 | */ | ||
84 | #define MGA_UPLOAD_CONTEXT 0x1 | ||
85 | #define MGA_UPLOAD_TEX0 0x2 | ||
86 | #define MGA_UPLOAD_TEX1 0x4 | ||
87 | #define MGA_UPLOAD_PIPE 0x8 | ||
88 | #define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ | ||
89 | #define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ | ||
90 | #define MGA_UPLOAD_2D 0x40 | ||
91 | #define MGA_WAIT_AGE 0x80 /* handled client-side */ | ||
92 | #define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ | ||
93 | #if 0 | ||
94 | #define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock | ||
95 | quiescent */ | ||
96 | #endif | ||
97 | |||
98 | /* 32 buffers of 64k each, total 2 meg. | ||
99 | */ | ||
100 | #define MGA_BUFFER_SIZE (1 << 16) | ||
101 | #define MGA_NUM_BUFFERS 128 | ||
102 | |||
103 | /* Keep these small for testing. | ||
104 | */ | ||
105 | #define MGA_NR_SAREA_CLIPRECTS 8 | ||
106 | |||
107 | /* 2 heaps (1 for card, 1 for agp), each divided into upto 128 | ||
108 | * regions, subject to a minimum region size of (1<<16) == 64k. | ||
109 | * | ||
110 | * Clients may subdivide regions internally, but when sharing between | ||
111 | * clients, the region size is the minimum granularity. | ||
112 | */ | ||
113 | |||
114 | #define MGA_CARD_HEAP 0 | ||
115 | #define MGA_AGP_HEAP 1 | ||
116 | #define MGA_NR_TEX_HEAPS 2 | ||
117 | #define MGA_NR_TEX_REGIONS 16 | ||
118 | #define MGA_LOG_MIN_TEX_REGION_SIZE 16 | ||
119 | |||
120 | #define DRM_MGA_IDLE_RETRY 2048 | ||
121 | |||
122 | #endif /* __MGA_SAREA_DEFINES__ */ | ||
123 | |||
124 | |||
125 | /* Setup registers for 3D context | ||
126 | */ | ||
127 | typedef struct { | ||
128 | unsigned int dstorg; | ||
129 | unsigned int maccess; | ||
130 | unsigned int plnwt; | ||
131 | unsigned int dwgctl; | ||
132 | unsigned int alphactrl; | ||
133 | unsigned int fogcolor; | ||
134 | unsigned int wflag; | ||
135 | unsigned int tdualstage0; | ||
136 | unsigned int tdualstage1; | ||
137 | unsigned int fcol; | ||
138 | unsigned int stencil; | ||
139 | unsigned int stencilctl; | ||
140 | } drm_mga_context_regs_t; | ||
141 | |||
142 | /* Setup registers for 2D, X server | ||
143 | */ | ||
144 | typedef struct { | ||
145 | unsigned int pitch; | ||
146 | } drm_mga_server_regs_t; | ||
147 | |||
148 | /* Setup registers for each texture unit | ||
149 | */ | ||
150 | typedef struct { | ||
151 | unsigned int texctl; | ||
152 | unsigned int texctl2; | ||
153 | unsigned int texfilter; | ||
154 | unsigned int texbordercol; | ||
155 | unsigned int texorg; | ||
156 | unsigned int texwidth; | ||
157 | unsigned int texheight; | ||
158 | unsigned int texorg1; | ||
159 | unsigned int texorg2; | ||
160 | unsigned int texorg3; | ||
161 | unsigned int texorg4; | ||
162 | } drm_mga_texture_regs_t; | ||
163 | |||
164 | /* General aging mechanism | ||
165 | */ | ||
166 | typedef struct { | ||
167 | unsigned int head; /* Position of head pointer */ | ||
168 | unsigned int wrap; /* Primary DMA wrap count */ | ||
169 | } drm_mga_age_t; | ||
170 | |||
171 | typedef struct _drm_mga_sarea { | ||
172 | /* The channel for communication of state information to the kernel | ||
173 | * on firing a vertex dma buffer. | ||
174 | */ | ||
175 | drm_mga_context_regs_t context_state; | ||
176 | drm_mga_server_regs_t server_state; | ||
177 | drm_mga_texture_regs_t tex_state[2]; | ||
178 | unsigned int warp_pipe; | ||
179 | unsigned int dirty; | ||
180 | unsigned int vertsize; | ||
181 | |||
182 | /* The current cliprects, or a subset thereof. | ||
183 | */ | ||
184 | drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS]; | ||
185 | unsigned int nbox; | ||
186 | |||
187 | /* Information about the most recently used 3d drawable. The | ||
188 | * client fills in the req_* fields, the server fills in the | ||
189 | * exported_ fields and puts the cliprects into boxes, above. | ||
190 | * | ||
191 | * The client clears the exported_drawable field before | ||
192 | * clobbering the boxes data. | ||
193 | */ | ||
194 | unsigned int req_drawable; /* the X drawable id */ | ||
195 | unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ | ||
196 | |||
197 | unsigned int exported_drawable; | ||
198 | unsigned int exported_index; | ||
199 | unsigned int exported_stamp; | ||
200 | unsigned int exported_buffers; | ||
201 | unsigned int exported_nfront; | ||
202 | unsigned int exported_nback; | ||
203 | int exported_back_x, exported_front_x, exported_w; | ||
204 | int exported_back_y, exported_front_y, exported_h; | ||
205 | drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS]; | ||
206 | |||
207 | /* Counters for aging textures and for client-side throttling. | ||
208 | */ | ||
209 | unsigned int status[4]; | ||
210 | unsigned int last_wrap; | ||
211 | |||
212 | drm_mga_age_t last_frame; | ||
213 | unsigned int last_enqueue; /* last time a buffer was enqueued */ | ||
214 | unsigned int last_dispatch; /* age of the most recently dispatched buffer */ | ||
215 | unsigned int last_quiescent; /* */ | ||
216 | |||
217 | /* LRU lists for texture memory in agp space and on the card. | ||
218 | */ | ||
219 | drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1]; | ||
220 | unsigned int texAge[MGA_NR_TEX_HEAPS]; | ||
221 | |||
222 | /* Mechanism to validate card state. | ||
223 | */ | ||
224 | int ctxOwner; | ||
225 | } drm_mga_sarea_t; | ||
226 | |||
227 | |||
228 | /* WARNING: If you change any of these defines, make sure to change the | ||
229 | * defines in the Xserver file (xf86drmMga.h) | ||
230 | */ | ||
231 | |||
232 | /* MGA specific ioctls | ||
233 | * The device specific ioctl range is 0x40 to 0x79. | ||
234 | */ | ||
235 | #define DRM_MGA_INIT 0x00 | ||
236 | #define DRM_MGA_FLUSH 0x01 | ||
237 | #define DRM_MGA_RESET 0x02 | ||
238 | #define DRM_MGA_SWAP 0x03 | ||
239 | #define DRM_MGA_CLEAR 0x04 | ||
240 | #define DRM_MGA_VERTEX 0x05 | ||
241 | #define DRM_MGA_INDICES 0x06 | ||
242 | #define DRM_MGA_ILOAD 0x07 | ||
243 | #define DRM_MGA_BLIT 0x08 | ||
244 | #define DRM_MGA_GETPARAM 0x09 | ||
245 | |||
246 | #define DRM_IOCTL_MGA_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t) | ||
247 | #define DRM_IOCTL_MGA_FLUSH DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_FLUSH, drm_lock_t) | ||
248 | #define DRM_IOCTL_MGA_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MGA_RESET) | ||
249 | #define DRM_IOCTL_MGA_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MGA_SWAP) | ||
250 | #define DRM_IOCTL_MGA_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t) | ||
251 | #define DRM_IOCTL_MGA_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t) | ||
252 | #define DRM_IOCTL_MGA_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t) | ||
253 | #define DRM_IOCTL_MGA_ILOAD DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t) | ||
254 | #define DRM_IOCTL_MGA_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t) | ||
255 | #define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t) | ||
256 | |||
257 | typedef struct _drm_mga_warp_index { | ||
258 | int installed; | ||
259 | unsigned long phys_addr; | ||
260 | int size; | ||
261 | } drm_mga_warp_index_t; | ||
262 | |||
263 | typedef struct drm_mga_init { | ||
264 | enum { | ||
265 | MGA_INIT_DMA = 0x01, | ||
266 | MGA_CLEANUP_DMA = 0x02 | ||
267 | } func; | ||
268 | |||
269 | unsigned long sarea_priv_offset; | ||
270 | |||
271 | int chipset; | ||
272 | int sgram; | ||
273 | |||
274 | unsigned int maccess; | ||
275 | |||
276 | unsigned int fb_cpp; | ||
277 | unsigned int front_offset, front_pitch; | ||
278 | unsigned int back_offset, back_pitch; | ||
279 | |||
280 | unsigned int depth_cpp; | ||
281 | unsigned int depth_offset, depth_pitch; | ||
282 | |||
283 | unsigned int texture_offset[MGA_NR_TEX_HEAPS]; | ||
284 | unsigned int texture_size[MGA_NR_TEX_HEAPS]; | ||
285 | |||
286 | unsigned long fb_offset; | ||
287 | unsigned long mmio_offset; | ||
288 | unsigned long status_offset; | ||
289 | unsigned long warp_offset; | ||
290 | unsigned long primary_offset; | ||
291 | unsigned long buffers_offset; | ||
292 | } drm_mga_init_t; | ||
293 | |||
294 | typedef struct drm_mga_fullscreen { | ||
295 | enum { | ||
296 | MGA_INIT_FULLSCREEN = 0x01, | ||
297 | MGA_CLEANUP_FULLSCREEN = 0x02 | ||
298 | } func; | ||
299 | } drm_mga_fullscreen_t; | ||
300 | |||
301 | typedef struct drm_mga_clear { | ||
302 | unsigned int flags; | ||
303 | unsigned int clear_color; | ||
304 | unsigned int clear_depth; | ||
305 | unsigned int color_mask; | ||
306 | unsigned int depth_mask; | ||
307 | } drm_mga_clear_t; | ||
308 | |||
309 | typedef struct drm_mga_vertex { | ||
310 | int idx; /* buffer to queue */ | ||
311 | int used; /* bytes in use */ | ||
312 | int discard; /* client finished with buffer? */ | ||
313 | } drm_mga_vertex_t; | ||
314 | |||
315 | typedef struct drm_mga_indices { | ||
316 | int idx; /* buffer to queue */ | ||
317 | unsigned int start; | ||
318 | unsigned int end; | ||
319 | int discard; /* client finished with buffer? */ | ||
320 | } drm_mga_indices_t; | ||
321 | |||
322 | typedef struct drm_mga_iload { | ||
323 | int idx; | ||
324 | unsigned int dstorg; | ||
325 | unsigned int length; | ||
326 | } drm_mga_iload_t; | ||
327 | |||
328 | typedef struct _drm_mga_blit { | ||
329 | unsigned int planemask; | ||
330 | unsigned int srcorg; | ||
331 | unsigned int dstorg; | ||
332 | int src_pitch, dst_pitch; | ||
333 | int delta_sx, delta_sy; | ||
334 | int delta_dx, delta_dy; | ||
335 | int height, ydir; /* flip image vertically */ | ||
336 | int source_pitch, dest_pitch; | ||
337 | } drm_mga_blit_t; | ||
338 | |||
339 | /* 3.1: An ioctl to get parameters that aren't available to the 3d | ||
340 | * client any other way. | ||
341 | */ | ||
342 | #define MGA_PARAM_IRQ_NR 1 | ||
343 | |||
344 | typedef struct drm_mga_getparam { | ||
345 | int param; | ||
346 | void __user *value; | ||
347 | } drm_mga_getparam_t; | ||
348 | |||
349 | #endif | ||