diff options
author | Keith Packard <keithp@keithp.com> | 2008-05-06 22:27:53 -0400 |
---|---|---|
committer | Dave Airlie <airlied@linux.ie> | 2008-05-06 22:27:53 -0400 |
commit | e948e99400b28af152414f15f8c8023ff2430b79 (patch) | |
tree | 2a6d1ff037cc39ba8a3c6294e73b82ff70328570 /drivers/char/drm/i915_drv.c | |
parent | a59e122a67b88925944d3bbf33d15229cf0fc3de (diff) |
drm/i915: save and restore dsparb and d_state registers.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/char/drm/i915_drv.c')
-rw-r--r-- | drivers/char/drm/i915_drv.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/char/drm/i915_drv.c b/drivers/char/drm/i915_drv.c index 96db72542e7d..e8f3d682e3b1 100644 --- a/drivers/char/drm/i915_drv.c +++ b/drivers/char/drm/i915_drv.c | |||
@@ -256,6 +256,9 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state) | |||
256 | pci_save_state(dev->pdev); | 256 | pci_save_state(dev->pdev); |
257 | pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB); | 257 | pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB); |
258 | 258 | ||
259 | /* Display arbitration control */ | ||
260 | dev_priv->saveDSPARB = I915_READ(DSPARB); | ||
261 | |||
259 | /* Pipe & plane A info */ | 262 | /* Pipe & plane A info */ |
260 | dev_priv->savePIPEACONF = I915_READ(PIPEACONF); | 263 | dev_priv->savePIPEACONF = I915_READ(PIPEACONF); |
261 | dev_priv->savePIPEASRC = I915_READ(PIPEASRC); | 264 | dev_priv->savePIPEASRC = I915_READ(PIPEASRC); |
@@ -349,6 +352,7 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state) | |||
349 | dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); | 352 | dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); |
350 | 353 | ||
351 | /* Clock gating state */ | 354 | /* Clock gating state */ |
355 | dev_priv->saveD_STATE = I915_READ(D_STATE); | ||
352 | dev_priv->saveDSPCLK_GATE_D = I915_READ(DSPCLK_GATE_D); | 356 | dev_priv->saveDSPCLK_GATE_D = I915_READ(DSPCLK_GATE_D); |
353 | 357 | ||
354 | /* Cache mode state */ | 358 | /* Cache mode state */ |
@@ -388,6 +392,8 @@ static int i915_resume(struct drm_device *dev) | |||
388 | 392 | ||
389 | pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB); | 393 | pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB); |
390 | 394 | ||
395 | I915_WRITE(DSPARB, dev_priv->saveDSPARB); | ||
396 | |||
391 | /* Pipe & plane A info */ | 397 | /* Pipe & plane A info */ |
392 | /* Prime the clock */ | 398 | /* Prime the clock */ |
393 | if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { | 399 | if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { |
@@ -507,6 +513,7 @@ static int i915_resume(struct drm_device *dev) | |||
507 | udelay(150); | 513 | udelay(150); |
508 | 514 | ||
509 | /* Clock gating state */ | 515 | /* Clock gating state */ |
516 | I915_WRITE (D_STATE, dev_priv->saveD_STATE); | ||
510 | I915_WRITE (DSPCLK_GATE_D, dev_priv->saveDSPCLK_GATE_D); | 517 | I915_WRITE (DSPCLK_GATE_D, dev_priv->saveDSPCLK_GATE_D); |
511 | 518 | ||
512 | /* Cache mode state */ | 519 | /* Cache mode state */ |