diff options
author | Dave Airlie <airlied@starflyer.(none)> | 2005-09-25 00:28:13 -0400 |
---|---|---|
committer | Dave Airlie <airlied@linux.ie> | 2005-09-25 00:28:13 -0400 |
commit | b5e89ed53ed8d24f83ba1941c07382af00ed238e (patch) | |
tree | 747bae7a565f88a2e1d5974776eeb054a932c505 /drivers/char/drm/i830_drv.h | |
parent | 99a2657a29e2d623c3568cd86b27cac13fb63140 (diff) |
drm: lindent the drm directory.
I've been threatening this for a while, so no point hanging around.
This lindents the DRM code which was always really bad in tabbing department.
I've also fixed some misnamed files in comments and removed some trailing
whitespace.
Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/char/drm/i830_drv.h')
-rw-r--r-- | drivers/char/drm/i830_drv.h | 67 |
1 files changed, 30 insertions, 37 deletions
diff --git a/drivers/char/drm/i830_drv.h b/drivers/char/drm/i830_drv.h index 63f96a8b6a4a..99835465c44b 100644 --- a/drivers/char/drm/i830_drv.h +++ b/drivers/char/drm/i830_drv.h | |||
@@ -11,11 +11,11 @@ | |||
11 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | 11 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
12 | * and/or sell copies of the Software, and to permit persons to whom the | 12 | * and/or sell copies of the Software, and to permit persons to whom the |
13 | * Software is furnished to do so, subject to the following conditions: | 13 | * Software is furnished to do so, subject to the following conditions: |
14 | * | 14 | * |
15 | * The above copyright notice and this permission notice (including the next | 15 | * The above copyright notice and this permission notice (including the next |
16 | * paragraph) shall be included in all copies or substantial portions of the | 16 | * paragraph) shall be included in all copies or substantial portions of the |
17 | * Software. | 17 | * Software. |
18 | * | 18 | * |
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | 20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | 21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
@@ -63,14 +63,14 @@ | |||
63 | #define USE_IRQS 0 | 63 | #define USE_IRQS 0 |
64 | 64 | ||
65 | typedef struct drm_i830_buf_priv { | 65 | typedef struct drm_i830_buf_priv { |
66 | u32 *in_use; | 66 | u32 *in_use; |
67 | int my_use_idx; | 67 | int my_use_idx; |
68 | int currently_mapped; | 68 | int currently_mapped; |
69 | void __user *virtual; | 69 | void __user *virtual; |
70 | void *kernel_virtual; | 70 | void *kernel_virtual; |
71 | } drm_i830_buf_priv_t; | 71 | } drm_i830_buf_priv_t; |
72 | 72 | ||
73 | typedef struct _drm_i830_ring_buffer{ | 73 | typedef struct _drm_i830_ring_buffer { |
74 | int tail_mask; | 74 | int tail_mask; |
75 | unsigned long Start; | 75 | unsigned long Start; |
76 | unsigned long End; | 76 | unsigned long End; |
@@ -86,17 +86,17 @@ typedef struct drm_i830_private { | |||
86 | drm_map_t *mmio_map; | 86 | drm_map_t *mmio_map; |
87 | 87 | ||
88 | drm_i830_sarea_t *sarea_priv; | 88 | drm_i830_sarea_t *sarea_priv; |
89 | drm_i830_ring_buffer_t ring; | 89 | drm_i830_ring_buffer_t ring; |
90 | 90 | ||
91 | void * hw_status_page; | 91 | void *hw_status_page; |
92 | unsigned long counter; | 92 | unsigned long counter; |
93 | 93 | ||
94 | dma_addr_t dma_status_page; | 94 | dma_addr_t dma_status_page; |
95 | 95 | ||
96 | drm_buf_t *mmap_buffer; | 96 | drm_buf_t *mmap_buffer; |
97 | 97 | ||
98 | u32 front_di1, back_di1, zi1; | 98 | u32 front_di1, back_di1, zi1; |
99 | 99 | ||
100 | int back_offset; | 100 | int back_offset; |
101 | int depth_offset; | 101 | int depth_offset; |
102 | int front_offset; | 102 | int front_offset; |
@@ -113,30 +113,30 @@ typedef struct drm_i830_private { | |||
113 | int page_flipping; | 113 | int page_flipping; |
114 | 114 | ||
115 | wait_queue_head_t irq_queue; | 115 | wait_queue_head_t irq_queue; |
116 | atomic_t irq_received; | 116 | atomic_t irq_received; |
117 | atomic_t irq_emitted; | 117 | atomic_t irq_emitted; |
118 | 118 | ||
119 | int use_mi_batchbuffer_start; | 119 | int use_mi_batchbuffer_start; |
120 | 120 | ||
121 | } drm_i830_private_t; | 121 | } drm_i830_private_t; |
122 | 122 | ||
123 | /* i830_dma.c */ | 123 | /* i830_dma.c */ |
124 | extern void i830_reclaim_buffers(drm_device_t *dev, struct file *filp); | 124 | extern void i830_reclaim_buffers(drm_device_t * dev, struct file *filp); |
125 | 125 | ||
126 | /* i830_irq.c */ | 126 | /* i830_irq.c */ |
127 | extern int i830_irq_emit( struct inode *inode, struct file *filp, | 127 | extern int i830_irq_emit(struct inode *inode, struct file *filp, |
128 | unsigned int cmd, unsigned long arg ); | 128 | unsigned int cmd, unsigned long arg); |
129 | extern int i830_irq_wait( struct inode *inode, struct file *filp, | 129 | extern int i830_irq_wait(struct inode *inode, struct file *filp, |
130 | unsigned int cmd, unsigned long arg ); | 130 | unsigned int cmd, unsigned long arg); |
131 | 131 | ||
132 | extern irqreturn_t i830_driver_irq_handler( DRM_IRQ_ARGS ); | 132 | extern irqreturn_t i830_driver_irq_handler(DRM_IRQ_ARGS); |
133 | extern void i830_driver_irq_preinstall( drm_device_t *dev ); | 133 | extern void i830_driver_irq_preinstall(drm_device_t * dev); |
134 | extern void i830_driver_irq_postinstall( drm_device_t *dev ); | 134 | extern void i830_driver_irq_postinstall(drm_device_t * dev); |
135 | extern void i830_driver_irq_uninstall( drm_device_t *dev ); | 135 | extern void i830_driver_irq_uninstall(drm_device_t * dev); |
136 | extern void i830_driver_pretakedown(drm_device_t *dev); | 136 | extern void i830_driver_pretakedown(drm_device_t * dev); |
137 | extern void i830_driver_release(drm_device_t *dev, struct file *filp); | 137 | extern void i830_driver_release(drm_device_t * dev, struct file *filp); |
138 | extern int i830_driver_dma_quiescent(drm_device_t *dev); | 138 | extern int i830_driver_dma_quiescent(drm_device_t * dev); |
139 | extern void i830_driver_prerelease(drm_device_t *dev, DRMFILE filp); | 139 | extern void i830_driver_prerelease(drm_device_t * dev, DRMFILE filp); |
140 | extern int i830_driver_device_is_agp(drm_device_t * dev); | 140 | extern int i830_driver_device_is_agp(drm_device_t * dev); |
141 | 141 | ||
142 | #define I830_BASE(reg) ((unsigned long) \ | 142 | #define I830_BASE(reg) ((unsigned long) \ |
@@ -149,8 +149,6 @@ extern int i830_driver_device_is_agp(drm_device_t * dev); | |||
149 | #define I830_READ16(reg) I830_DEREF16(reg) | 149 | #define I830_READ16(reg) I830_DEREF16(reg) |
150 | #define I830_WRITE16(reg,val) do { I830_DEREF16(reg) = val; } while (0) | 150 | #define I830_WRITE16(reg,val) do { I830_DEREF16(reg) = val; } while (0) |
151 | 151 | ||
152 | |||
153 | |||
154 | #define I830_VERBOSE 0 | 152 | #define I830_VERBOSE 0 |
155 | 153 | ||
156 | #define RING_LOCALS unsigned int outring, ringmask, outcount; \ | 154 | #define RING_LOCALS unsigned int outring, ringmask, outcount; \ |
@@ -168,7 +166,6 @@ extern int i830_driver_device_is_agp(drm_device_t * dev); | |||
168 | virt = dev_priv->ring.virtual_start; \ | 166 | virt = dev_priv->ring.virtual_start; \ |
169 | } while (0) | 167 | } while (0) |
170 | 168 | ||
171 | |||
172 | #define OUT_RING(n) do { \ | 169 | #define OUT_RING(n) do { \ |
173 | if (I830_VERBOSE) printk(" OUT_RING %x\n", (int)(n)); \ | 170 | if (I830_VERBOSE) printk(" OUT_RING %x\n", (int)(n)); \ |
174 | *(volatile unsigned int *)(virt + outring) = n; \ | 171 | *(volatile unsigned int *)(virt + outring) = n; \ |
@@ -184,8 +181,7 @@ extern int i830_driver_device_is_agp(drm_device_t * dev); | |||
184 | I830_WRITE(LP_RING + RING_TAIL, outring); \ | 181 | I830_WRITE(LP_RING + RING_TAIL, outring); \ |
185 | } while(0) | 182 | } while(0) |
186 | 183 | ||
187 | extern int i830_wait_ring(drm_device_t *dev, int n, const char *caller); | 184 | extern int i830_wait_ring(drm_device_t * dev, int n, const char *caller); |
188 | |||
189 | 185 | ||
190 | #define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) | 186 | #define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) |
191 | #define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23)) | 187 | #define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23)) |
@@ -200,7 +196,6 @@ extern int i830_wait_ring(drm_device_t *dev, int n, const char *caller); | |||
200 | #define INST_OP_FLUSH 0x02000000 | 196 | #define INST_OP_FLUSH 0x02000000 |
201 | #define INST_FLUSH_MAP_CACHE 0x00000001 | 197 | #define INST_FLUSH_MAP_CACHE 0x00000001 |
202 | 198 | ||
203 | |||
204 | #define BB1_START_ADDR_MASK (~0x7) | 199 | #define BB1_START_ADDR_MASK (~0x7) |
205 | #define BB1_PROTECTED (1<<0) | 200 | #define BB1_PROTECTED (1<<0) |
206 | #define BB1_UNPROTECTED (0<<0) | 201 | #define BB1_UNPROTECTED (0<<0) |
@@ -213,7 +208,6 @@ extern int i830_wait_ring(drm_device_t *dev, int n, const char *caller); | |||
213 | 208 | ||
214 | #define I830_IRQ_RESERVED ((1<<13)|(3<<2)) | 209 | #define I830_IRQ_RESERVED ((1<<13)|(3<<2)) |
215 | 210 | ||
216 | |||
217 | #define LP_RING 0x2030 | 211 | #define LP_RING 0x2030 |
218 | #define HP_RING 0x2040 | 212 | #define HP_RING 0x2040 |
219 | #define RING_TAIL 0x00 | 213 | #define RING_TAIL 0x00 |
@@ -225,7 +219,7 @@ extern int i830_wait_ring(drm_device_t *dev, int n, const char *caller); | |||
225 | #define RING_START 0x08 | 219 | #define RING_START 0x08 |
226 | #define START_ADDR 0x0xFFFFF000 | 220 | #define START_ADDR 0x0xFFFFF000 |
227 | #define RING_LEN 0x0C | 221 | #define RING_LEN 0x0C |
228 | #define RING_NR_PAGES 0x001FF000 | 222 | #define RING_NR_PAGES 0x001FF000 |
229 | #define RING_REPORT_MASK 0x00000006 | 223 | #define RING_REPORT_MASK 0x00000006 |
230 | #define RING_REPORT_64K 0x00000002 | 224 | #define RING_REPORT_64K 0x00000002 |
231 | #define RING_REPORT_128K 0x00000004 | 225 | #define RING_REPORT_128K 0x00000004 |
@@ -291,10 +285,9 @@ extern int i830_wait_ring(drm_device_t *dev, int n, const char *caller); | |||
291 | #define MI_BATCH_NON_SECURE (1) | 285 | #define MI_BATCH_NON_SECURE (1) |
292 | 286 | ||
293 | #define MI_WAIT_FOR_EVENT ((0x3<<23)) | 287 | #define MI_WAIT_FOR_EVENT ((0x3<<23)) |
294 | #define MI_WAIT_FOR_PLANE_A_FLIP (1<<2) | 288 | #define MI_WAIT_FOR_PLANE_A_FLIP (1<<2) |
295 | #define MI_WAIT_FOR_PLANE_A_SCANLINES (1<<1) | 289 | #define MI_WAIT_FOR_PLANE_A_SCANLINES (1<<1) |
296 | 290 | ||
297 | #define MI_LOAD_SCAN_LINES_INCL ((0x12<<23)) | 291 | #define MI_LOAD_SCAN_LINES_INCL ((0x12<<23)) |
298 | 292 | ||
299 | #endif | 293 | #endif |
300 | |||