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authorLinus Torvalds <torvalds@linux-foundation.org>2011-03-16 18:11:04 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-03-16 18:11:04 -0400
commite6bee325e49f17c65c1fd66e9e8b348c85788341 (patch)
treebcc9e5d8e82efa9009edd481a837cc3626360091 /drivers/char/digiPCI.h
parenta5e6b135bdff649e4330f98e2e80dbb1984f7e77 (diff)
parent6ae705b23be8da52d3163be9d81e9b767876aaf9 (diff)
Merge branch 'tty-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6
* 'tty-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6: (76 commits) pch_uart: reference clock on CM-iTC pch_phub: add new device ML7213 n_gsm: fix UIH control byte : P bit should be 0 n_gsm: add a documentation serial: msm_serial_hs: Add MSM high speed UART driver tty_audit: fix tty_audit_add_data live lock on audit disabled tty: move cd1865.h to drivers/staging/tty/ Staging: tty: fix build with epca.c driver pcmcia: synclink_cs: fix prototype for mgslpc_ioctl() Staging: generic_serial: fix double locking bug nozomi: don't use flush_scheduled_work() tty/serial: Relax the device_type restriction from of_serial MAINTAINERS: Update HVC file patterns tty: phase out of ioctl file pointer for tty3270 as well tty: forgot to remove ipwireless from drivers/char/pcmcia/Makefile pch_uart: Fix DMA channel miss-setting issue. pch_uart: fix exclusive access issue pch_uart: fix auto flow control miss-setting issue pch_uart: fix uart clock setting issue pch_uart : Use dev_xxx not pr_xxx ... Fix up trivial conflicts in drivers/misc/pch_phub.c (same patch applied twice, then changes to the same area in one branch)
Diffstat (limited to 'drivers/char/digiPCI.h')
-rw-r--r--drivers/char/digiPCI.h42
1 files changed, 0 insertions, 42 deletions
diff --git a/drivers/char/digiPCI.h b/drivers/char/digiPCI.h
deleted file mode 100644
index 6ca7819e5069..000000000000
--- a/drivers/char/digiPCI.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/*************************************************************************
2 * Defines and structure definitions for PCI BIOS Interface
3 *************************************************************************/
4#define PCIMAX 32 /* maximum number of PCI boards */
5
6
7#define PCI_VENDOR_DIGI 0x114F
8#define PCI_DEVICE_EPC 0x0002
9#define PCI_DEVICE_RIGHTSWITCH 0x0003 /* For testing */
10#define PCI_DEVICE_XEM 0x0004
11#define PCI_DEVICE_XR 0x0005
12#define PCI_DEVICE_CX 0x0006
13#define PCI_DEVICE_XRJ 0x0009 /* Jupiter boards with */
14#define PCI_DEVICE_EPCJ 0x000a /* PLX 9060 chip for PCI */
15
16
17/*
18 * On the PCI boards, there is no IO space allocated
19 * The I/O registers will be in the first 3 bytes of the
20 * upper 2MB of the 4MB memory space. The board memory
21 * will be mapped into the low 2MB of the 4MB memory space
22 */
23
24/* Potential location of PCI Bios from E0000 to FFFFF*/
25#define PCI_BIOS_SIZE 0x00020000
26
27/* Size of Memory and I/O for PCI (4MB) */
28#define PCI_RAM_SIZE 0x00400000
29
30/* Size of Memory (2MB) */
31#define PCI_MEM_SIZE 0x00200000
32
33/* Offset of I/0 in Memory (2MB) */
34#define PCI_IO_OFFSET 0x00200000
35
36#define MEMOUTB(basemem, pnum, setmemval) *(caddr_t)((basemem) + ( PCI_IO_OFFSET | pnum << 4 | pnum )) = (setmemval)
37#define MEMINB(basemem, pnum) *(caddr_t)((basemem) + (PCI_IO_OFFSET | pnum << 4 | pnum )) /* for PCI I/O */
38
39
40
41
42