agp/intel: Fix typo in G4x_GMCH_SIZE_VT_2M

Konstantin Belousov found an error in the define of G4x_GMCH_SIZE_VT_2M
relative to the GMCH specs, and confirmed that indeed one of his users
with a Q45 reports 0xb not 0xc for a 2/2MiB GATT.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Konstantin Belousov <kostikbel@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>

1 files changed, 4 insertions, 3 deletions

diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
index 999803ce10dc..5da67f165afa 100644
--- a/drivers/char/agp/intel-agp.h
+++ b/drivers/char/agp/intel-agp.h
@@ -90,9 +90,10 @@
 #define G4x_GMCH_SIZE_MASK      (0xf << 8)
 #define G4x_GMCH_SIZE_1M        (0x1 << 8)
 #define G4x_GMCH_SIZE_2M        (0x3 << 8)
-#define G4x_GMCH_SIZE_VT_1M     (0x9 << 8)
-#define G4x_GMCH_SIZE_VT_1_5M   (0xa << 8)
-#define G4x_GMCH_SIZE_VT_2M     (0xc << 8)
+#define G4x_GMCH_SIZE_VT_EN     (0x8 << 8)
+#define G4x_GMCH_SIZE_VT_1M     (G4x_GMCH_SIZE_1M | G4x_GMCH_SIZE_VT_EN)
+#define G4x_GMCH_SIZE_VT_1_5M   ((0x2 << 8) | G4x_GMCH_SIZE_VT_EN)
+#define G4x_GMCH_SIZE_VT_2M     (G4x_GMCH_SIZE_2M | G4x_GMCH_SIZE_VT_EN)
 
 #define GFX_FLSH_CNTL           0x2170 /* 915+ */