diff options
author | Ben Widawsky <ben@bwidawsk.net> | 2011-10-17 18:51:55 -0400 |
---|---|---|
committer | Keith Packard <keithp@keithp.com> | 2011-10-20 18:26:39 -0400 |
commit | 5c0422878fcdc279ae9a8e8b66972a15b5efb67f (patch) | |
tree | 13ed982427828e6a031dd5fd642f25b15c300d63 /drivers/char/agp | |
parent | f372b85463dac2fc696443d4c5063db2af5dcead (diff) |
drm/i915: ILK + VT-d workaround
Idle the GPU before doing any unmaps. We know if VT-d is in use through
an exported variable from iommu code.
This should avoid a known HW issue.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/char/agp')
-rw-r--r-- | drivers/char/agp/intel-gtt.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 85151019dde1..80a7ed0a7df5 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c | |||
@@ -923,6 +923,9 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem, | |||
923 | { | 923 | { |
924 | int ret = -EINVAL; | 924 | int ret = -EINVAL; |
925 | 925 | ||
926 | if (intel_private.base.do_idle_maps) | ||
927 | return -ENODEV; | ||
928 | |||
926 | if (intel_private.clear_fake_agp) { | 929 | if (intel_private.clear_fake_agp) { |
927 | int start = intel_private.base.stolen_size / PAGE_SIZE; | 930 | int start = intel_private.base.stolen_size / PAGE_SIZE; |
928 | int end = intel_private.base.gtt_mappable_entries; | 931 | int end = intel_private.base.gtt_mappable_entries; |
@@ -985,6 +988,9 @@ static int intel_fake_agp_remove_entries(struct agp_memory *mem, | |||
985 | if (mem->page_count == 0) | 988 | if (mem->page_count == 0) |
986 | return 0; | 989 | return 0; |
987 | 990 | ||
991 | if (intel_private.base.do_idle_maps) | ||
992 | return -ENODEV; | ||
993 | |||
988 | intel_gtt_clear_range(pg_start, mem->page_count); | 994 | intel_gtt_clear_range(pg_start, mem->page_count); |
989 | 995 | ||
990 | if (intel_private.base.needs_dmar) { | 996 | if (intel_private.base.needs_dmar) { |
@@ -1177,6 +1183,25 @@ static void gen6_cleanup(void) | |||
1177 | { | 1183 | { |
1178 | } | 1184 | } |
1179 | 1185 | ||
1186 | /* Certain Gen5 chipsets require require idling the GPU before | ||
1187 | * unmapping anything from the GTT when VT-d is enabled. | ||
1188 | */ | ||
1189 | extern int intel_iommu_gfx_mapped; | ||
1190 | static inline int needs_idle_maps(void) | ||
1191 | { | ||
1192 | const unsigned short gpu_devid = intel_private.pcidev->device; | ||
1193 | |||
1194 | /* Query intel_iommu to see if we need the workaround. Presumably that | ||
1195 | * was loaded first. | ||
1196 | */ | ||
1197 | if ((gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB || | ||
1198 | gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG) && | ||
1199 | intel_iommu_gfx_mapped) | ||
1200 | return 1; | ||
1201 | |||
1202 | return 0; | ||
1203 | } | ||
1204 | |||
1180 | static int i9xx_setup(void) | 1205 | static int i9xx_setup(void) |
1181 | { | 1206 | { |
1182 | u32 reg_addr; | 1207 | u32 reg_addr; |
@@ -1211,6 +1236,9 @@ static int i9xx_setup(void) | |||
1211 | intel_private.gtt_bus_addr = reg_addr + gtt_offset; | 1236 | intel_private.gtt_bus_addr = reg_addr + gtt_offset; |
1212 | } | 1237 | } |
1213 | 1238 | ||
1239 | if (needs_idle_maps()); | ||
1240 | intel_private.base.do_idle_maps = 1; | ||
1241 | |||
1214 | intel_i9xx_setup_flush(); | 1242 | intel_i9xx_setup_flush(); |
1215 | 1243 | ||
1216 | return 0; | 1244 | return 0; |