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authorDaniel Vetter <daniel.vetter@ffwll.ch>2010-04-13 18:29:51 -0400
committerEric Anholt <eric@anholt.net>2010-04-18 20:33:02 -0400
commitff7cdd691a0c4925c1803bf89a4c08ccda2d7658 (patch)
treec7b75e82565e3958542b87012514f04f8ee72ea0 /drivers/char/agp/intel-agp.c
parent6e0032f0ae4440e75256bee11b163552cae21962 (diff)
agp/intel: introduce intel-agp.h header file
Intel definitions have spilled into agp.h. Create a header file for them and also include it in efficion-agp.c 'cause it needs a few of them. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/char/agp/intel-agp.c')
-rw-r--r--drivers/char/agp/intel-agp.c156
1 files changed, 1 insertions, 155 deletions
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index a34fc9fdfc53..154bb9256961 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -10,6 +10,7 @@
10#include <linux/agp_backend.h> 10#include <linux/agp_backend.h>
11#include <asm/smp.h> 11#include <asm/smp.h>
12#include "agp.h" 12#include "agp.h"
13#include "intel-agp.h"
13 14
14int intel_agp_enabled; 15int intel_agp_enabled;
15EXPORT_SYMBOL(intel_agp_enabled); 16EXPORT_SYMBOL(intel_agp_enabled);
@@ -24,164 +25,9 @@ EXPORT_SYMBOL(intel_agp_enabled);
24#define USE_PCI_DMA_API 1 25#define USE_PCI_DMA_API 1
25#endif 26#endif
26 27
27#define PCI_DEVICE_ID_INTEL_E7221_HB 0x2588
28#define PCI_DEVICE_ID_INTEL_E7221_IG 0x258a
29#define PCI_DEVICE_ID_INTEL_82946GZ_HB 0x2970
30#define PCI_DEVICE_ID_INTEL_82946GZ_IG 0x2972
31#define PCI_DEVICE_ID_INTEL_82G35_HB 0x2980
32#define PCI_DEVICE_ID_INTEL_82G35_IG 0x2982
33#define PCI_DEVICE_ID_INTEL_82965Q_HB 0x2990
34#define PCI_DEVICE_ID_INTEL_82965Q_IG 0x2992
35#define PCI_DEVICE_ID_INTEL_82965G_HB 0x29A0
36#define PCI_DEVICE_ID_INTEL_82965G_IG 0x29A2
37#define PCI_DEVICE_ID_INTEL_82965GM_HB 0x2A00
38#define PCI_DEVICE_ID_INTEL_82965GM_IG 0x2A02
39#define PCI_DEVICE_ID_INTEL_82965GME_HB 0x2A10
40#define PCI_DEVICE_ID_INTEL_82965GME_IG 0x2A12
41#define PCI_DEVICE_ID_INTEL_82945GME_HB 0x27AC
42#define PCI_DEVICE_ID_INTEL_82945GME_IG 0x27AE
43#define PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB 0xA010
44#define PCI_DEVICE_ID_INTEL_PINEVIEW_M_IG 0xA011
45#define PCI_DEVICE_ID_INTEL_PINEVIEW_HB 0xA000
46#define PCI_DEVICE_ID_INTEL_PINEVIEW_IG 0xA001
47#define PCI_DEVICE_ID_INTEL_G33_HB 0x29C0
48#define PCI_DEVICE_ID_INTEL_G33_IG 0x29C2
49#define PCI_DEVICE_ID_INTEL_Q35_HB 0x29B0
50#define PCI_DEVICE_ID_INTEL_Q35_IG 0x29B2
51#define PCI_DEVICE_ID_INTEL_Q33_HB 0x29D0
52#define PCI_DEVICE_ID_INTEL_Q33_IG 0x29D2
53#define PCI_DEVICE_ID_INTEL_B43_HB 0x2E40
54#define PCI_DEVICE_ID_INTEL_B43_IG 0x2E42
55#define PCI_DEVICE_ID_INTEL_GM45_HB 0x2A40
56#define PCI_DEVICE_ID_INTEL_GM45_IG 0x2A42
57#define PCI_DEVICE_ID_INTEL_EAGLELAKE_HB 0x2E00
58#define PCI_DEVICE_ID_INTEL_EAGLELAKE_IG 0x2E02
59#define PCI_DEVICE_ID_INTEL_Q45_HB 0x2E10
60#define PCI_DEVICE_ID_INTEL_Q45_IG 0x2E12
61#define PCI_DEVICE_ID_INTEL_G45_HB 0x2E20
62#define PCI_DEVICE_ID_INTEL_G45_IG 0x2E22
63#define PCI_DEVICE_ID_INTEL_G41_HB 0x2E30
64#define PCI_DEVICE_ID_INTEL_G41_IG 0x2E32
65#define PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB 0x0040
66#define PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG 0x0042
67#define PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB 0x0044
68#define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB 0x0062
69#define PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB 0x006a
70#define PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG 0x0046
71#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB 0x0100
72#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_IG 0x0102
73#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB 0x0104
74#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_IG 0x0106
75
76/* cover 915 and 945 variants */
77#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \
78 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915G_HB || \
79 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82915GM_HB || \
80 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945G_HB || \
81 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GM_HB || \
82 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82945GME_HB)
83
84#define IS_I965 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82946GZ_HB || \
85 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82G35_HB || \
86 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965Q_HB || \
87 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \
88 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB || \
89 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB)
90
91#define IS_G33 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \
92 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \
93 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q33_HB || \
94 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB || \
95 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_HB)
96
97#define IS_PINEVIEW (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB || \
98 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_PINEVIEW_HB)
99
100#define IS_SNB (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB || \
101 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB)
102
103#define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_EAGLELAKE_HB || \
104 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \
105 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB || \
106 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB || \
107 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G41_HB || \
108 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_B43_HB || \
109 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB || \
110 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB || \
111 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB || \
112 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB || \
113 IS_SNB)
114
115extern int agp_memory_reserved; 28extern int agp_memory_reserved;
116 29
117 30
118/* Intel 815 register */
119#define INTEL_815_APCONT 0x51
120#define INTEL_815_ATTBASE_MASK ~0x1FFFFFFF
121
122/* Intel i820 registers */
123#define INTEL_I820_RDCR 0x51
124#define INTEL_I820_ERRSTS 0xc8
125
126/* Intel i840 registers */
127#define INTEL_I840_MCHCFG 0x50
128#define INTEL_I840_ERRSTS 0xc8
129
130/* Intel i850 registers */
131#define INTEL_I850_MCHCFG 0x50
132#define INTEL_I850_ERRSTS 0xc8
133
134/* intel 915G registers */
135#define I915_GMADDR 0x18
136#define I915_MMADDR 0x10
137#define I915_PTEADDR 0x1C
138#define I915_GMCH_GMS_STOLEN_48M (0x6 << 4)
139#define I915_GMCH_GMS_STOLEN_64M (0x7 << 4)
140#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4)
141#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4)
142#define INTEL_GMCH_GMS_STOLEN_96M (0xa << 4)
143#define INTEL_GMCH_GMS_STOLEN_160M (0xb << 4)
144#define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4)
145#define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4)
146
147#define I915_IFPADDR 0x60
148
149/* Intel 965G registers */
150#define I965_MSAC 0x62
151#define I965_IFPADDR 0x70
152
153/* Intel 7505 registers */
154#define INTEL_I7505_APSIZE 0x74
155#define INTEL_I7505_NCAPID 0x60
156#define INTEL_I7505_NISTAT 0x6c
157#define INTEL_I7505_ATTBASE 0x78
158#define INTEL_I7505_ERRSTS 0x42
159#define INTEL_I7505_AGPCTRL 0x70
160#define INTEL_I7505_MCHCFG 0x50
161
162#define SNB_GMCH_CTRL 0x50
163#define SNB_GMCH_GMS_STOLEN_MASK 0xF8
164#define SNB_GMCH_GMS_STOLEN_32M (1 << 3)
165#define SNB_GMCH_GMS_STOLEN_64M (2 << 3)
166#define SNB_GMCH_GMS_STOLEN_96M (3 << 3)
167#define SNB_GMCH_GMS_STOLEN_128M (4 << 3)
168#define SNB_GMCH_GMS_STOLEN_160M (5 << 3)
169#define SNB_GMCH_GMS_STOLEN_192M (6 << 3)
170#define SNB_GMCH_GMS_STOLEN_224M (7 << 3)
171#define SNB_GMCH_GMS_STOLEN_256M (8 << 3)
172#define SNB_GMCH_GMS_STOLEN_288M (9 << 3)
173#define SNB_GMCH_GMS_STOLEN_320M (0xa << 3)
174#define SNB_GMCH_GMS_STOLEN_352M (0xb << 3)
175#define SNB_GMCH_GMS_STOLEN_384M (0xc << 3)
176#define SNB_GMCH_GMS_STOLEN_416M (0xd << 3)
177#define SNB_GMCH_GMS_STOLEN_448M (0xe << 3)
178#define SNB_GMCH_GMS_STOLEN_480M (0xf << 3)
179#define SNB_GMCH_GMS_STOLEN_512M (0x10 << 3)
180#define SNB_GTT_SIZE_0M (0 << 8)
181#define SNB_GTT_SIZE_1M (1 << 8)
182#define SNB_GTT_SIZE_2M (2 << 8)
183#define SNB_GTT_SIZE_MASK (3 << 8)
184
185static const struct aper_size_info_fixed intel_i810_sizes[] = 31static const struct aper_size_info_fixed intel_i810_sizes[] =
186{ 32{
187 {64, 16384, 4}, 33 {64, 16384, 4},
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-16 16:50:29 -0500