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author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2013-01-24 15:49:18 -0500 |
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committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2013-01-24 15:49:18 -0500 |
commit | a32f7d1ad3744914273c6907204c2ab3b5d496a0 (patch) | |
tree | 1c5ae321ee85665707177547c07810ff7e09e1ab /drivers/char/agp/amd64-agp.c | |
parent | 6b9e50c463efc5c361496ae6a895cc966ff8025b (diff) | |
parent | 68d6f84ba0c47e658beff3a4bf0c43acee4b4690 (diff) |
Merge branch 'v4l_for_linus' into staging/for_v3.9
* v4l_for_linus: (464 commits)
[media] uvcvideo: Set error_idx properly for S_EXT_CTRLS failures
[media] uvcvideo: Cleanup leftovers of partial revert
[media] uvcvideo: Return -EACCES when trying to set a read-only control
Linux 3.8-rc3
mm: reinstante dropped pmd_trans_splitting() check
cred: Remove tgcred pointer from struct cred
drm/ttm: fix fence locking in ttm_buffer_object_transfer
ARM: clps711x: Fix bad merge of clockevents setup
ARM: highbank: save and restore L2 cache and GIC on suspend
ARM: highbank: add a power request clear
ARM: highbank: fix secondary boot and hotplug
ARM: highbank: fix typos with hignbank in power request functions
ARM: dts: fix highbank cpu mpidr values
ARM: dts: add device_type prop to cpu nodes on Calxeda platforms
drm/prime: drop reference on imported dma-buf come from gem
xen/netfront: improve truesize tracking
ARM: mx5: Fix MX53 flexcan2 clock
ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array
sctp: fix Kconfig bug in default cookie hmac selection
EDAC: Cleanup device deregistering path
...
Conflicts:
drivers/media/pci/dm1105/dm1105.c
drivers/media/platform/soc_camera/mx2_camera.c
Diffstat (limited to 'drivers/char/agp/amd64-agp.c')
-rw-r--r-- | drivers/char/agp/amd64-agp.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c index 061d46209b1a..d79d692d05b8 100644 --- a/drivers/char/agp/amd64-agp.c +++ b/drivers/char/agp/amd64-agp.c | |||
@@ -240,7 +240,7 @@ static const struct agp_bridge_driver amd_8151_driver = { | |||
240 | }; | 240 | }; |
241 | 241 | ||
242 | /* Some basic sanity checks for the aperture. */ | 242 | /* Some basic sanity checks for the aperture. */ |
243 | static int __devinit agp_aperture_valid(u64 aper, u32 size) | 243 | static int agp_aperture_valid(u64 aper, u32 size) |
244 | { | 244 | { |
245 | if (!aperture_valid(aper, size, 32*1024*1024)) | 245 | if (!aperture_valid(aper, size, 32*1024*1024)) |
246 | return 0; | 246 | return 0; |
@@ -267,8 +267,7 @@ static int __devinit agp_aperture_valid(u64 aper, u32 size) | |||
267 | * to allocate that much memory. But at least error out cleanly instead of | 267 | * to allocate that much memory. But at least error out cleanly instead of |
268 | * crashing. | 268 | * crashing. |
269 | */ | 269 | */ |
270 | static __devinit int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp, | 270 | static int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp, u16 cap) |
271 | u16 cap) | ||
272 | { | 271 | { |
273 | u32 aper_low, aper_hi; | 272 | u32 aper_low, aper_hi; |
274 | u64 aper, nb_aper; | 273 | u64 aper, nb_aper; |
@@ -326,7 +325,7 @@ static __devinit int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp, | |||
326 | return 0; | 325 | return 0; |
327 | } | 326 | } |
328 | 327 | ||
329 | static __devinit int cache_nbs(struct pci_dev *pdev, u32 cap_ptr) | 328 | static int cache_nbs(struct pci_dev *pdev, u32 cap_ptr) |
330 | { | 329 | { |
331 | int i; | 330 | int i; |
332 | 331 | ||
@@ -352,7 +351,7 @@ static __devinit int cache_nbs(struct pci_dev *pdev, u32 cap_ptr) | |||
352 | } | 351 | } |
353 | 352 | ||
354 | /* Handle AMD 8151 quirks */ | 353 | /* Handle AMD 8151 quirks */ |
355 | static void __devinit amd8151_init(struct pci_dev *pdev, struct agp_bridge_data *bridge) | 354 | static void amd8151_init(struct pci_dev *pdev, struct agp_bridge_data *bridge) |
356 | { | 355 | { |
357 | char *revstring; | 356 | char *revstring; |
358 | 357 | ||
@@ -390,7 +389,7 @@ static const struct aper_size_info_32 uli_sizes[7] = | |||
390 | {8, 2048, 1, 4}, | 389 | {8, 2048, 1, 4}, |
391 | {4, 1024, 0, 3} | 390 | {4, 1024, 0, 3} |
392 | }; | 391 | }; |
393 | static int __devinit uli_agp_init(struct pci_dev *pdev) | 392 | static int uli_agp_init(struct pci_dev *pdev) |
394 | { | 393 | { |
395 | u32 httfea,baseaddr,enuscr; | 394 | u32 httfea,baseaddr,enuscr; |
396 | struct pci_dev *dev1; | 395 | struct pci_dev *dev1; |
@@ -513,8 +512,8 @@ put: | |||
513 | return ret; | 512 | return ret; |
514 | } | 513 | } |
515 | 514 | ||
516 | static int __devinit agp_amd64_probe(struct pci_dev *pdev, | 515 | static int agp_amd64_probe(struct pci_dev *pdev, |
517 | const struct pci_device_id *ent) | 516 | const struct pci_device_id *ent) |
518 | { | 517 | { |
519 | struct agp_bridge_data *bridge; | 518 | struct agp_bridge_data *bridge; |
520 | u8 cap_ptr; | 519 | u8 cap_ptr; |