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authorStephen M. Cameron <scameron@beardog.cce.hp.com>2010-07-19 14:46:12 -0400
committerJens Axboe <jaxboe@fusionio.com>2010-08-07 12:52:12 -0400
commit8e93bf6d6c9c6d864c17b7743f2cc5f2e052fe46 (patch)
tree71352d0d1f28ddd82fecc5e1684276c6e2602ab6 /drivers/block
parentb993313540de341e4c4df8f529d585e9400f43bd (diff)
cciss: factor out cciss_find_cfg_addrs.
Rationale for this is that I will also need to use this code in fixing kdump host reset code prior to having the hba structure. Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com> Signed-off-by: Jens Axboe <jaxboe@fusionio.com>
Diffstat (limited to 'drivers/block')
-rw-r--r--drivers/block/cciss.c35
1 files changed, 23 insertions, 12 deletions
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c
index 17e420c13b36..3cd8397f82bd 100644
--- a/drivers/block/cciss.c
+++ b/drivers/block/cciss.c
@@ -4064,29 +4064,40 @@ static int __devinit cciss_wait_for_board_ready(ctlr_info_t *h)
4064 return -ENODEV; 4064 return -ENODEV;
4065} 4065}
4066 4066
4067static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4068 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4069 u64 *cfg_offset)
4070{
4071 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4072 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4073 *cfg_base_addr &= (u32) 0x0000ffff;
4074 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4075 if (*cfg_base_addr_index == -1) {
4076 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4077 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4078 return -ENODEV;
4079 }
4080 return 0;
4081}
4082
4067static int __devinit cciss_find_cfgtables(ctlr_info_t *h) 4083static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4068{ 4084{
4069 u64 cfg_offset; 4085 u64 cfg_offset;
4070 u32 cfg_base_addr; 4086 u32 cfg_base_addr;
4071 u64 cfg_base_addr_index; 4087 u64 cfg_base_addr_index;
4072 u32 trans_offset; 4088 u32 trans_offset;
4089 int rc;
4073 4090
4074 /* get the address index number */ 4091 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4075 cfg_base_addr = readl(h->vaddr + SA5_CTCFG_OFFSET); 4092 &cfg_base_addr_index, &cfg_offset);
4076 cfg_base_addr &= (u32) 0x0000ffff; 4093 if (rc)
4077 cfg_base_addr_index = find_PCI_BAR_index(h->pdev, cfg_base_addr); 4094 return rc;
4078 if (cfg_base_addr_index == -1) {
4079 dev_warn(&h->pdev->dev, "cannot find cfg_base_addr_index\n");
4080 return -ENODEV;
4081 }
4082 cfg_offset = readl(h->vaddr + SA5_CTMEM_OFFSET);
4083 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 4095 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4084 cfg_base_addr_index) + cfg_offset, 4096 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4085 sizeof(h->cfgtable));
4086 if (!h->cfgtable) 4097 if (!h->cfgtable)
4087 return -ENOMEM; 4098 return -ENOMEM;
4088 /* Find performant mode table. */ 4099 /* Find performant mode table. */
4089 trans_offset = readl(&(h->cfgtable->TransMethodOffset)); 4100 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4090 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 4101 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4091 cfg_base_addr_index)+cfg_offset+trans_offset, 4102 cfg_base_addr_index)+cfg_offset+trans_offset,
4092 sizeof(*h->transtable)); 4103 sizeof(*h->transtable));