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authorPhilip J Kelleher <pjk1939@linux.vnet.ibm.com>2013-02-25 13:27:46 -0500
committerJens Axboe <axboe@kernel.dk>2013-03-11 14:53:55 -0400
commitf37912039eb04979f269de0a7dc1a601702df51a (patch)
treea9f52fbc05d2f616256d9ae1e323fb66f80b57aa /drivers/block
parentf6161aa153581da4a3867a2d1a7caf4be19b6ec9 (diff)
block: IBM RamSan 70/80 trivial changes.
This patch includes trivial changes that were recommended by different members of the Linux Community. Changes include: o Removing the redundant wmb(). o Formatting o Various other little things. Signed-off-by: Philip J Kelleher <pjk1939@linux.vnet.ibm.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
Diffstat (limited to 'drivers/block')
-rw-r--r--drivers/block/rsxx/config.c6
-rw-r--r--drivers/block/rsxx/core.c4
-rw-r--r--drivers/block/rsxx/cregs.c13
-rw-r--r--drivers/block/rsxx/dma.c12
-rw-r--r--drivers/block/rsxx/rsxx.h6
5 files changed, 11 insertions, 30 deletions
diff --git a/drivers/block/rsxx/config.c b/drivers/block/rsxx/config.c
index a295e7e9ee41..0d8cb18284eb 100644
--- a/drivers/block/rsxx/config.c
+++ b/drivers/block/rsxx/config.c
@@ -29,10 +29,8 @@
29#include "rsxx_priv.h" 29#include "rsxx_priv.h"
30#include "rsxx_cfg.h" 30#include "rsxx_cfg.h"
31 31
32static void initialize_config(void *config) 32static void initialize_config(struct rsxx_card_cfg *cfg)
33{ 33{
34 struct rsxx_card_cfg *cfg = config;
35
36 cfg->hdr.version = RSXX_CFG_VERSION; 34 cfg->hdr.version = RSXX_CFG_VERSION;
37 35
38 cfg->data.block_size = RSXX_HW_BLK_SIZE; 36 cfg->data.block_size = RSXX_HW_BLK_SIZE;
@@ -181,7 +179,7 @@ int rsxx_load_config(struct rsxx_cardinfo *card)
181 } else { 179 } else {
182 dev_info(CARD_TO_DEV(card), 180 dev_info(CARD_TO_DEV(card),
183 "Initializing card configuration.\n"); 181 "Initializing card configuration.\n");
184 initialize_config(card); 182 initialize_config(&card->config);
185 st = rsxx_save_config(card); 183 st = rsxx_save_config(card);
186 if (st) 184 if (st)
187 return st; 185 return st;
diff --git a/drivers/block/rsxx/core.c b/drivers/block/rsxx/core.c
index e5162487686a..edbae10e7f6f 100644
--- a/drivers/block/rsxx/core.c
+++ b/drivers/block/rsxx/core.c
@@ -161,9 +161,9 @@ static irqreturn_t rsxx_isr(int irq, void *pdata)
161} 161}
162 162
163/*----------------- Card Event Handler -------------------*/ 163/*----------------- Card Event Handler -------------------*/
164static char *rsxx_card_state_to_str(unsigned int state) 164static const char * const rsxx_card_state_to_str(unsigned int state)
165{ 165{
166 static char *state_strings[] = { 166 static const char * const state_strings[] = {
167 "Unknown", "Shutdown", "Starting", "Formatting", 167 "Unknown", "Shutdown", "Starting", "Formatting",
168 "Uninitialized", "Good", "Shutting Down", 168 "Uninitialized", "Good", "Shutting Down",
169 "Fault", "Read Only Fault", "dStroying" 169 "Fault", "Read Only Fault", "dStroying"
diff --git a/drivers/block/rsxx/cregs.c b/drivers/block/rsxx/cregs.c
index 80bbe639fccd..224156435261 100644
--- a/drivers/block/rsxx/cregs.c
+++ b/drivers/block/rsxx/cregs.c
@@ -126,13 +126,6 @@ static void creg_issue_cmd(struct rsxx_cardinfo *card, struct creg_cmd *cmd)
126 cmd->buf, cmd->stream); 126 cmd->buf, cmd->stream);
127 } 127 }
128 128
129 /*
130 * Data copy must complete before initiating the command. This is
131 * needed for weakly ordered processors (i.e. PowerPC), so that all
132 * neccessary registers are written before we kick the hardware.
133 */
134 wmb();
135
136 /* Setting the valid bit will kick off the command. */ 129 /* Setting the valid bit will kick off the command. */
137 iowrite32(cmd->op, card->regmap + CREG_CMD); 130 iowrite32(cmd->op, card->regmap + CREG_CMD);
138} 131}
@@ -399,12 +392,12 @@ static int __issue_creg_rw(struct rsxx_cardinfo *card,
399 return st; 392 return st;
400 393
401 /* 394 /*
402 * This timeout is neccessary for unresponsive hardware. The additional 395 * This timeout is necessary for unresponsive hardware. The additional
403 * 20 seconds to used to guarantee that each cregs requests has time to 396 * 20 seconds to used to guarantee that each cregs requests has time to
404 * complete. 397 * complete.
405 */ 398 */
406 timeout = msecs_to_jiffies((CREG_TIMEOUT_MSEC * 399 timeout = msecs_to_jiffies(CREG_TIMEOUT_MSEC *
407 card->creg_ctrl.q_depth) + 20000); 400 card->creg_ctrl.q_depth + 20000);
408 401
409 /* 402 /*
410 * The creg interface is guaranteed to complete. It has a timeout 403 * The creg interface is guaranteed to complete. It has a timeout
diff --git a/drivers/block/rsxx/dma.c b/drivers/block/rsxx/dma.c
index 63176e67662f..7c3a57bed2cd 100644
--- a/drivers/block/rsxx/dma.c
+++ b/drivers/block/rsxx/dma.c
@@ -432,16 +432,6 @@ static void rsxx_issue_dmas(struct work_struct *work)
432 432
433 /* Let HW know we've queued commands. */ 433 /* Let HW know we've queued commands. */
434 if (cmds_pending) { 434 if (cmds_pending) {
435 /*
436 * We must guarantee that the CPU writes to 'ctrl->cmd.buf'
437 * (which is in PCI-consistent system-memory) from the loop
438 * above make it into the coherency domain before the
439 * following PIO "trigger" updating the cmd.idx. A WMB is
440 * sufficient. We need not explicitly CPU cache-flush since
441 * the memory is a PCI-consistent (ie; coherent) mapping.
442 */
443 wmb();
444
445 atomic_add(cmds_pending, &ctrl->stats.hw_q_depth); 435 atomic_add(cmds_pending, &ctrl->stats.hw_q_depth);
446 mod_timer(&ctrl->activity_timer, 436 mod_timer(&ctrl->activity_timer,
447 jiffies + DMA_ACTIVITY_TIMEOUT); 437 jiffies + DMA_ACTIVITY_TIMEOUT);
@@ -798,8 +788,6 @@ static int rsxx_dma_ctrl_init(struct pci_dev *dev,
798 iowrite32(ctrl->cmd.idx, ctrl->regmap + HW_CMD_IDX); 788 iowrite32(ctrl->cmd.idx, ctrl->regmap + HW_CMD_IDX);
799 iowrite32(ctrl->cmd.idx, ctrl->regmap + SW_CMD_IDX); 789 iowrite32(ctrl->cmd.idx, ctrl->regmap + SW_CMD_IDX);
800 790
801 wmb();
802
803 return 0; 791 return 0;
804} 792}
805 793
diff --git a/drivers/block/rsxx/rsxx.h b/drivers/block/rsxx/rsxx.h
index 2e50b65902b7..24ba3642bd89 100644
--- a/drivers/block/rsxx/rsxx.h
+++ b/drivers/block/rsxx/rsxx.h
@@ -27,15 +27,17 @@
27 27
28/*----------------- IOCTL Definitions -------------------*/ 28/*----------------- IOCTL Definitions -------------------*/
29 29
30#define RSXX_MAX_DATA 8
31
30struct rsxx_reg_access { 32struct rsxx_reg_access {
31 __u32 addr; 33 __u32 addr;
32 __u32 cnt; 34 __u32 cnt;
33 __u32 stat; 35 __u32 stat;
34 __u32 stream; 36 __u32 stream;
35 __u32 data[8]; 37 __u32 data[RSXX_MAX_DATA];
36}; 38};
37 39
38#define RSXX_MAX_REG_CNT (8 * (sizeof(__u32))) 40#define RSXX_MAX_REG_CNT (RSXX_MAX_DATA * (sizeof(__u32)))
39 41
40#define RSXX_IOC_MAGIC 'r' 42#define RSXX_IOC_MAGIC 'r'
41 43