diff options
author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2009-04-28 00:06:17 -0400 |
---|---|---|
committer | Jens Axboe <jens.axboe@oracle.com> | 2009-04-28 02:14:52 -0400 |
commit | f68adec3c7155a8bbf32a90cb4c4d0737df045d9 (patch) | |
tree | 6fcdebf47e3ec5b39beaa20cbd4b919353cc0cff /drivers/block/mg_disk.c | |
parent | 8a11a789c39cd6f61de4243234cf44a46c23ffd0 (diff) |
mg_disk: use defines from <linux/ata.h>
While at it:
- remove MG_REG_HEAD_MUST_BE_ON define
- remove MG_REG_CTRL_INTR_ENABLE define
- remove MG_REG_HEAD_LBA_MODE define
- remove unused defines
Cc: unsik Kim <donari75@gmail.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
Diffstat (limited to 'drivers/block/mg_disk.c')
-rw-r--r-- | drivers/block/mg_disk.c | 144 |
1 files changed, 43 insertions, 101 deletions
diff --git a/drivers/block/mg_disk.c b/drivers/block/mg_disk.c index 8e53cae9fa90..71e56cc28cac 100644 --- a/drivers/block/mg_disk.c +++ b/drivers/block/mg_disk.c | |||
@@ -51,51 +51,10 @@ | |||
51 | #define MG_REG_DRV_CTRL (MG_REG_OFFSET + 0x10) | 51 | #define MG_REG_DRV_CTRL (MG_REG_OFFSET + 0x10) |
52 | #define MG_REG_BURST_CTRL (MG_REG_OFFSET + 0x12) | 52 | #define MG_REG_BURST_CTRL (MG_REG_OFFSET + 0x12) |
53 | 53 | ||
54 | /* "Drive Select/Head Register" bit values */ | ||
55 | #define MG_REG_HEAD_MUST_BE_ON 0xA0 /* These 2 bits are always on */ | ||
56 | #define MG_REG_HEAD_DRIVE_MASTER (0x00 | MG_REG_HEAD_MUST_BE_ON) | ||
57 | #define MG_REG_HEAD_DRIVE_SLAVE (0x10 | MG_REG_HEAD_MUST_BE_ON) | ||
58 | #define MG_REG_HEAD_LBA_MODE (0x40 | MG_REG_HEAD_MUST_BE_ON) | ||
59 | |||
60 | |||
61 | /* "Device Control Register" bit values */ | ||
62 | #define MG_REG_CTRL_INTR_ENABLE 0x0 | ||
63 | #define MG_REG_CTRL_INTR_DISABLE (0x1<<1) | ||
64 | #define MG_REG_CTRL_RESET (0x1<<2) | ||
65 | #define MG_REG_CTRL_INTR_POLA_ACTIVE_HIGH 0x0 | ||
66 | #define MG_REG_CTRL_INTR_POLA_ACTIVE_LOW (0x1<<4) | ||
67 | #define MG_REG_CTRL_DPD_POLA_ACTIVE_LOW 0x0 | ||
68 | #define MG_REG_CTRL_DPD_POLA_ACTIVE_HIGH (0x1<<5) | ||
69 | #define MG_REG_CTRL_DPD_DISABLE 0x0 | ||
70 | #define MG_REG_CTRL_DPD_ENABLE (0x1<<6) | ||
71 | |||
72 | /* Status register bit */ | ||
73 | /* error bit in status register */ | ||
74 | #define MG_REG_STATUS_BIT_ERROR 0x01 | ||
75 | /* corrected error in status register */ | ||
76 | #define MG_REG_STATUS_BIT_CORRECTED_ERROR 0x04 | ||
77 | /* data request bit in status register */ | ||
78 | #define MG_REG_STATUS_BIT_DATA_REQ 0x08 | ||
79 | /* DSC - Drive Seek Complete */ | ||
80 | #define MG_REG_STATUS_BIT_SEEK_DONE 0x10 | ||
81 | /* DWF - Drive Write Fault */ | ||
82 | #define MG_REG_STATUS_BIT_WRITE_FAULT 0x20 | ||
83 | #define MG_REG_STATUS_BIT_READY 0x40 | ||
84 | #define MG_REG_STATUS_BIT_BUSY 0x80 | ||
85 | |||
86 | /* handy status */ | 54 | /* handy status */ |
87 | #define MG_STAT_READY (MG_REG_STATUS_BIT_READY | MG_REG_STATUS_BIT_SEEK_DONE) | 55 | #define MG_STAT_READY (ATA_DRDY | ATA_DSC) |
88 | #define MG_READY_OK(s) (((s) & (MG_STAT_READY | \ | 56 | #define MG_READY_OK(s) (((s) & (MG_STAT_READY | (ATA_BUSY | ATA_DF | \ |
89 | (MG_REG_STATUS_BIT_BUSY | \ | 57 | ATA_ERR))) == MG_STAT_READY) |
90 | MG_REG_STATUS_BIT_WRITE_FAULT | \ | ||
91 | MG_REG_STATUS_BIT_ERROR))) == MG_STAT_READY) | ||
92 | |||
93 | /* Error register */ | ||
94 | #define MG_REG_ERR_AMNF 0x01 | ||
95 | #define MG_REG_ERR_ABRT 0x04 | ||
96 | #define MG_REG_ERR_IDNF 0x10 | ||
97 | #define MG_REG_ERR_UNC 0x40 | ||
98 | #define MG_REG_ERR_BBK 0x80 | ||
99 | 58 | ||
100 | /* error code for others */ | 59 | /* error code for others */ |
101 | #define MG_ERR_NONE 0 | 60 | #define MG_ERR_NONE 0 |
@@ -225,41 +184,39 @@ static void mg_dump_status(const char *msg, unsigned int stat, | |||
225 | } | 184 | } |
226 | 185 | ||
227 | printk(KERN_ERR "%s: %s: status=0x%02x { ", name, msg, stat & 0xff); | 186 | printk(KERN_ERR "%s: %s: status=0x%02x { ", name, msg, stat & 0xff); |
228 | if (stat & MG_REG_STATUS_BIT_BUSY) | 187 | if (stat & ATA_BUSY) |
229 | printk("Busy "); | 188 | printk("Busy "); |
230 | if (stat & MG_REG_STATUS_BIT_READY) | 189 | if (stat & ATA_DRDY) |
231 | printk("DriveReady "); | 190 | printk("DriveReady "); |
232 | if (stat & MG_REG_STATUS_BIT_WRITE_FAULT) | 191 | if (stat & ATA_DF) |
233 | printk("WriteFault "); | 192 | printk("WriteFault "); |
234 | if (stat & MG_REG_STATUS_BIT_SEEK_DONE) | 193 | if (stat & ATA_DSC) |
235 | printk("SeekComplete "); | 194 | printk("SeekComplete "); |
236 | if (stat & MG_REG_STATUS_BIT_DATA_REQ) | 195 | if (stat & ATA_DRQ) |
237 | printk("DataRequest "); | 196 | printk("DataRequest "); |
238 | if (stat & MG_REG_STATUS_BIT_CORRECTED_ERROR) | 197 | if (stat & ATA_CORR) |
239 | printk("CorrectedError "); | 198 | printk("CorrectedError "); |
240 | if (stat & MG_REG_STATUS_BIT_ERROR) | 199 | if (stat & ATA_ERR) |
241 | printk("Error "); | 200 | printk("Error "); |
242 | printk("}\n"); | 201 | printk("}\n"); |
243 | if ((stat & MG_REG_STATUS_BIT_ERROR) == 0) { | 202 | if ((stat & ATA_ERR) == 0) { |
244 | host->error = 0; | 203 | host->error = 0; |
245 | } else { | 204 | } else { |
246 | host->error = inb((unsigned long)host->dev_base + MG_REG_ERROR); | 205 | host->error = inb((unsigned long)host->dev_base + MG_REG_ERROR); |
247 | printk(KERN_ERR "%s: %s: error=0x%02x { ", name, msg, | 206 | printk(KERN_ERR "%s: %s: error=0x%02x { ", name, msg, |
248 | host->error & 0xff); | 207 | host->error & 0xff); |
249 | if (host->error & MG_REG_ERR_BBK) | 208 | if (host->error & ATA_BBK) |
250 | printk("BadSector "); | 209 | printk("BadSector "); |
251 | if (host->error & MG_REG_ERR_UNC) | 210 | if (host->error & ATA_UNC) |
252 | printk("UncorrectableError "); | 211 | printk("UncorrectableError "); |
253 | if (host->error & MG_REG_ERR_IDNF) | 212 | if (host->error & ATA_IDNF) |
254 | printk("SectorIdNotFound "); | 213 | printk("SectorIdNotFound "); |
255 | if (host->error & MG_REG_ERR_ABRT) | 214 | if (host->error & ATA_ABORTED) |
256 | printk("DriveStatusError "); | 215 | printk("DriveStatusError "); |
257 | if (host->error & MG_REG_ERR_AMNF) | 216 | if (host->error & ATA_AMNF) |
258 | printk("AddrMarkNotFound "); | 217 | printk("AddrMarkNotFound "); |
259 | printk("}"); | 218 | printk("}"); |
260 | if (host->error & | 219 | if (host->error & (ATA_BBK | ATA_UNC | ATA_IDNF | ATA_AMNF)) { |
261 | (MG_REG_ERR_BBK | MG_REG_ERR_UNC | | ||
262 | MG_REG_ERR_IDNF | MG_REG_ERR_AMNF)) { | ||
263 | if (host->breq) { | 220 | if (host->breq) { |
264 | req = elv_next_request(host->breq); | 221 | req = elv_next_request(host->breq); |
265 | if (req) | 222 | if (req) |
@@ -284,12 +241,12 @@ static unsigned int mg_wait(struct mg_host *host, u32 expect, u32 msec) | |||
284 | 241 | ||
285 | do { | 242 | do { |
286 | cur_jiffies = jiffies; | 243 | cur_jiffies = jiffies; |
287 | if (status & MG_REG_STATUS_BIT_BUSY) { | 244 | if (status & ATA_BUSY) { |
288 | if (expect == MG_REG_STATUS_BIT_BUSY) | 245 | if (expect == ATA_BUSY) |
289 | break; | 246 | break; |
290 | } else { | 247 | } else { |
291 | /* Check the error condition! */ | 248 | /* Check the error condition! */ |
292 | if (status & MG_REG_STATUS_BIT_ERROR) { | 249 | if (status & ATA_ERR) { |
293 | mg_dump_status("mg_wait", status, host); | 250 | mg_dump_status("mg_wait", status, host); |
294 | break; | 251 | break; |
295 | } | 252 | } |
@@ -298,8 +255,8 @@ static unsigned int mg_wait(struct mg_host *host, u32 expect, u32 msec) | |||
298 | if (MG_READY_OK(status)) | 255 | if (MG_READY_OK(status)) |
299 | break; | 256 | break; |
300 | 257 | ||
301 | if (expect == MG_REG_STATUS_BIT_DATA_REQ) | 258 | if (expect == ATA_DRQ) |
302 | if (status & MG_REG_STATUS_BIT_DATA_REQ) | 259 | if (status & ATA_DRQ) |
303 | break; | 260 | break; |
304 | } | 261 | } |
305 | if (!msec) { | 262 | if (!msec) { |
@@ -404,12 +361,10 @@ static int mg_get_disk_id(struct mg_host *host) | |||
404 | char serial[ATA_ID_SERNO_LEN + 1]; | 361 | char serial[ATA_ID_SERNO_LEN + 1]; |
405 | 362 | ||
406 | if (!prv_data->use_polling) | 363 | if (!prv_data->use_polling) |
407 | outb(MG_REG_CTRL_INTR_DISABLE, | 364 | outb(ATA_NIEN, (unsigned long)host->dev_base + MG_REG_DRV_CTRL); |
408 | (unsigned long)host->dev_base + | ||
409 | MG_REG_DRV_CTRL); | ||
410 | 365 | ||
411 | outb(MG_CMD_ID, (unsigned long)host->dev_base + MG_REG_COMMAND); | 366 | outb(MG_CMD_ID, (unsigned long)host->dev_base + MG_REG_COMMAND); |
412 | err = mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, MG_TMAX_WAIT_RD_DRQ); | 367 | err = mg_wait(host, ATA_DRQ, MG_TMAX_WAIT_RD_DRQ); |
413 | if (err) | 368 | if (err) |
414 | return err; | 369 | return err; |
415 | 370 | ||
@@ -449,8 +404,7 @@ static int mg_get_disk_id(struct mg_host *host) | |||
449 | host->n_sectors, host->nres_sectors); | 404 | host->n_sectors, host->nres_sectors); |
450 | 405 | ||
451 | if (!prv_data->use_polling) | 406 | if (!prv_data->use_polling) |
452 | outb(MG_REG_CTRL_INTR_ENABLE, (unsigned long)host->dev_base + | 407 | outb(0, (unsigned long)host->dev_base + MG_REG_DRV_CTRL); |
453 | MG_REG_DRV_CTRL); | ||
454 | 408 | ||
455 | return err; | 409 | return err; |
456 | } | 410 | } |
@@ -464,7 +418,7 @@ static int mg_disk_init(struct mg_host *host) | |||
464 | 418 | ||
465 | /* hdd rst low */ | 419 | /* hdd rst low */ |
466 | gpio_set_value(host->rst, 0); | 420 | gpio_set_value(host->rst, 0); |
467 | err = mg_wait(host, MG_REG_STATUS_BIT_BUSY, MG_TMAX_RST_TO_BUSY); | 421 | err = mg_wait(host, ATA_BUSY, MG_TMAX_RST_TO_BUSY); |
468 | if (err) | 422 | if (err) |
469 | return err; | 423 | return err; |
470 | 424 | ||
@@ -475,17 +429,14 @@ static int mg_disk_init(struct mg_host *host) | |||
475 | return err; | 429 | return err; |
476 | 430 | ||
477 | /* soft reset on */ | 431 | /* soft reset on */ |
478 | outb(MG_REG_CTRL_RESET | | 432 | outb(ATA_SRST | (prv_data->use_polling ? ATA_NIEN : 0), |
479 | (prv_data->use_polling ? MG_REG_CTRL_INTR_DISABLE : | ||
480 | MG_REG_CTRL_INTR_ENABLE), | ||
481 | (unsigned long)host->dev_base + MG_REG_DRV_CTRL); | 433 | (unsigned long)host->dev_base + MG_REG_DRV_CTRL); |
482 | err = mg_wait(host, MG_REG_STATUS_BIT_BUSY, MG_TMAX_RST_TO_BUSY); | 434 | err = mg_wait(host, ATA_BUSY, MG_TMAX_RST_TO_BUSY); |
483 | if (err) | 435 | if (err) |
484 | return err; | 436 | return err; |
485 | 437 | ||
486 | /* soft reset off */ | 438 | /* soft reset off */ |
487 | outb(prv_data->use_polling ? MG_REG_CTRL_INTR_DISABLE : | 439 | outb(prv_data->use_polling ? ATA_NIEN : 0, |
488 | MG_REG_CTRL_INTR_ENABLE, | ||
489 | (unsigned long)host->dev_base + MG_REG_DRV_CTRL); | 440 | (unsigned long)host->dev_base + MG_REG_DRV_CTRL); |
490 | err = mg_wait(host, MG_STAT_READY, MG_TMAX_SWRST_TO_RDY); | 441 | err = mg_wait(host, MG_STAT_READY, MG_TMAX_SWRST_TO_RDY); |
491 | if (err) | 442 | if (err) |
@@ -531,7 +482,7 @@ static unsigned int mg_out(struct mg_host *host, | |||
531 | MG_REG_CYL_LOW); | 482 | MG_REG_CYL_LOW); |
532 | outb((u8)(sect_num >> 16), (unsigned long)host->dev_base + | 483 | outb((u8)(sect_num >> 16), (unsigned long)host->dev_base + |
533 | MG_REG_CYL_HIGH); | 484 | MG_REG_CYL_HIGH); |
534 | outb((u8)((sect_num >> 24) | MG_REG_HEAD_LBA_MODE), | 485 | outb((u8)((sect_num >> 24) | ATA_LBA | ATA_DEVICE_OBS), |
535 | (unsigned long)host->dev_base + MG_REG_DRV_HEAD); | 486 | (unsigned long)host->dev_base + MG_REG_DRV_HEAD); |
536 | outb(cmd, (unsigned long)host->dev_base + MG_REG_COMMAND); | 487 | outb(cmd, (unsigned long)host->dev_base + MG_REG_COMMAND); |
537 | return MG_ERR_NONE; | 488 | return MG_ERR_NONE; |
@@ -552,8 +503,8 @@ static void mg_read(struct request *req) | |||
552 | do { | 503 | do { |
553 | u16 *buff = (u16 *)req->buffer; | 504 | u16 *buff = (u16 *)req->buffer; |
554 | 505 | ||
555 | if (mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, | 506 | if (mg_wait(host, ATA_DRQ, |
556 | MG_TMAX_WAIT_RD_DRQ) != MG_ERR_NONE) { | 507 | MG_TMAX_WAIT_RD_DRQ) != MG_ERR_NONE) { |
557 | mg_bad_rw_intr(host); | 508 | mg_bad_rw_intr(host); |
558 | return; | 509 | return; |
559 | } | 510 | } |
@@ -583,8 +534,7 @@ static void mg_write(struct request *req) | |||
583 | do { | 534 | do { |
584 | u16 *buff = (u16 *)req->buffer; | 535 | u16 *buff = (u16 *)req->buffer; |
585 | 536 | ||
586 | if (mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, | 537 | if (mg_wait(host, ATA_DRQ, MG_TMAX_WAIT_WR_DRQ) != MG_ERR_NONE) { |
587 | MG_TMAX_WAIT_WR_DRQ) != MG_ERR_NONE) { | ||
588 | mg_bad_rw_intr(host); | 538 | mg_bad_rw_intr(host); |
589 | return; | 539 | return; |
590 | } | 540 | } |
@@ -606,11 +556,11 @@ static void mg_read_intr(struct mg_host *host) | |||
606 | /* check status */ | 556 | /* check status */ |
607 | do { | 557 | do { |
608 | i = inb((unsigned long)host->dev_base + MG_REG_STATUS); | 558 | i = inb((unsigned long)host->dev_base + MG_REG_STATUS); |
609 | if (i & MG_REG_STATUS_BIT_BUSY) | 559 | if (i & ATA_BUSY) |
610 | break; | 560 | break; |
611 | if (!MG_READY_OK(i)) | 561 | if (!MG_READY_OK(i)) |
612 | break; | 562 | break; |
613 | if (i & MG_REG_STATUS_BIT_DATA_REQ) | 563 | if (i & ATA_DRQ) |
614 | goto ok_to_read; | 564 | goto ok_to_read; |
615 | } while (0); | 565 | } while (0); |
616 | mg_dump_status("mg_read_intr", i, host); | 566 | mg_dump_status("mg_read_intr", i, host); |
@@ -655,11 +605,11 @@ static void mg_write_intr(struct mg_host *host) | |||
655 | /* check status */ | 605 | /* check status */ |
656 | do { | 606 | do { |
657 | i = inb((unsigned long)host->dev_base + MG_REG_STATUS); | 607 | i = inb((unsigned long)host->dev_base + MG_REG_STATUS); |
658 | if (i & MG_REG_STATUS_BIT_BUSY) | 608 | if (i & ATA_BUSY) |
659 | break; | 609 | break; |
660 | if (!MG_READY_OK(i)) | 610 | if (!MG_READY_OK(i)) |
661 | break; | 611 | break; |
662 | if ((req->nr_sectors <= 1) || (i & MG_REG_STATUS_BIT_DATA_REQ)) | 612 | if ((req->nr_sectors <= 1) || (i & ATA_DRQ)) |
663 | goto ok_to_write; | 613 | goto ok_to_write; |
664 | } while (0); | 614 | } while (0); |
665 | mg_dump_status("mg_write_intr", i, host); | 615 | mg_dump_status("mg_write_intr", i, host); |
@@ -752,18 +702,15 @@ static unsigned int mg_issue_req(struct request *req, | |||
752 | break; | 702 | break; |
753 | case WRITE: | 703 | case WRITE: |
754 | /* TODO : handler */ | 704 | /* TODO : handler */ |
755 | outb(MG_REG_CTRL_INTR_DISABLE, | 705 | outb(ATA_NIEN, (unsigned long)host->dev_base + MG_REG_DRV_CTRL); |
756 | (unsigned long)host->dev_base + | ||
757 | MG_REG_DRV_CTRL); | ||
758 | if (mg_out(host, sect_num, sect_cnt, MG_CMD_WR, &mg_write_intr) | 706 | if (mg_out(host, sect_num, sect_cnt, MG_CMD_WR, &mg_write_intr) |
759 | != MG_ERR_NONE) { | 707 | != MG_ERR_NONE) { |
760 | mg_bad_rw_intr(host); | 708 | mg_bad_rw_intr(host); |
761 | return host->error; | 709 | return host->error; |
762 | } | 710 | } |
763 | del_timer(&host->timer); | 711 | del_timer(&host->timer); |
764 | mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, MG_TMAX_WAIT_WR_DRQ); | 712 | mg_wait(host, ATA_DRQ, MG_TMAX_WAIT_WR_DRQ); |
765 | outb(MG_REG_CTRL_INTR_ENABLE, (unsigned long)host->dev_base + | 713 | outb(0, (unsigned long)host->dev_base + MG_REG_DRV_CTRL); |
766 | MG_REG_DRV_CTRL); | ||
767 | if (host->error) { | 714 | if (host->error) { |
768 | mg_bad_rw_intr(host); | 715 | mg_bad_rw_intr(host); |
769 | return host->error; | 716 | return host->error; |
@@ -849,9 +796,7 @@ static int mg_suspend(struct platform_device *plat_dev, pm_message_t state) | |||
849 | return -EIO; | 796 | return -EIO; |
850 | 797 | ||
851 | if (!prv_data->use_polling) | 798 | if (!prv_data->use_polling) |
852 | outb(MG_REG_CTRL_INTR_DISABLE, | 799 | outb(ATA_NIEN, (unsigned long)host->dev_base + MG_REG_DRV_CTRL); |
853 | (unsigned long)host->dev_base + | ||
854 | MG_REG_DRV_CTRL); | ||
855 | 800 | ||
856 | outb(MG_CMD_SLEEP, (unsigned long)host->dev_base + MG_REG_COMMAND); | 801 | outb(MG_CMD_SLEEP, (unsigned long)host->dev_base + MG_REG_COMMAND); |
857 | /* wait until mflash deep sleep */ | 802 | /* wait until mflash deep sleep */ |
@@ -859,9 +804,7 @@ static int mg_suspend(struct platform_device *plat_dev, pm_message_t state) | |||
859 | 804 | ||
860 | if (mg_wait(host, MG_STAT_READY, MG_TMAX_CONF_TO_CMD)) { | 805 | if (mg_wait(host, MG_STAT_READY, MG_TMAX_CONF_TO_CMD)) { |
861 | if (!prv_data->use_polling) | 806 | if (!prv_data->use_polling) |
862 | outb(MG_REG_CTRL_INTR_ENABLE, | 807 | outb(0, (unsigned long)host->dev_base + MG_REG_DRV_CTRL); |
863 | (unsigned long)host->dev_base + | ||
864 | MG_REG_DRV_CTRL); | ||
865 | return -EIO; | 808 | return -EIO; |
866 | } | 809 | } |
867 | 810 | ||
@@ -884,8 +827,7 @@ static int mg_resume(struct platform_device *plat_dev) | |||
884 | return -EIO; | 827 | return -EIO; |
885 | 828 | ||
886 | if (!prv_data->use_polling) | 829 | if (!prv_data->use_polling) |
887 | outb(MG_REG_CTRL_INTR_ENABLE, (unsigned long)host->dev_base + | 830 | outb(0, (unsigned long)host->dev_base + MG_REG_DRV_CTRL); |
888 | MG_REG_DRV_CTRL); | ||
889 | 831 | ||
890 | return 0; | 832 | return 0; |
891 | } | 833 | } |