bcma: add serial console support

This adds support for serial console to bcma, when operating on an SoC.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

4 files changed, 83 insertions, 0 deletions

diff --git a/drivers/bcma/bcma_private.h b/drivers/bcma/bcma_private.h
index b97633d0d237..22d3052e1906 100644
--- a/drivers/bcma/bcma_private.h
+++ b/drivers/bcma/bcma_private.h
@@ -29,6 +29,14 @@ void bcma_init_bus(struct bcma_bus *bus);
 /* sprom.c */
 int bcma_sprom_get(struct bcma_bus *bus);
 
+/* driver_chipcommon.c */
+#ifdef CONFIG_BCMA_DRIVER_MIPS
+void bcma_chipco_serial_init(struct bcma_drv_cc *cc);
+#endif /* CONFIG_BCMA_DRIVER_MIPS */
+
+/* driver_chipcommon_pmu.c */
+u32 bcma_pmu_alp_clock(struct bcma_drv_cc *cc);
+
 #ifdef CONFIG_BCMA_HOST_PCI
 /* host_pci.c */
 extern int __init bcma_host_pci_init(void);
diff --git a/drivers/bcma/driver_chipcommon.c b/drivers/bcma/driver_chipcommon.c
index acca327db3de..47cce9d69630 100644
--- a/drivers/bcma/driver_chipcommon.c
+++ b/drivers/bcma/driver_chipcommon.c
@@ -106,3 +106,51 @@ u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value)
 {
         return bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value);
 }
+
+#ifdef CONFIG_BCMA_DRIVER_MIPS
+void bcma_chipco_serial_init(struct bcma_drv_cc *cc)
+{
+        unsigned int irq;
+        u32 baud_base;
+        u32 i;
+        unsigned int ccrev = cc->core->id.rev;
+        struct bcma_serial_port *ports = cc->serial_ports;
+
+        if (ccrev >= 11 && ccrev != 15) {
+                /* Fixed ALP clock */
+                baud_base = bcma_pmu_alp_clock(cc);
+                if (ccrev >= 21) {
+                        /* Turn off UART clock before switching clocksource. */
+                        bcma_cc_write32(cc, BCMA_CC_CORECTL,
+                                       bcma_cc_read32(cc, BCMA_CC_CORECTL)
+                                       & ~BCMA_CC_CORECTL_UARTCLKEN);
+                }
+                /* Set the override bit so we don't divide it */
+                bcma_cc_write32(cc, BCMA_CC_CORECTL,
+                               bcma_cc_read32(cc, BCMA_CC_CORECTL)
+                               | BCMA_CC_CORECTL_UARTCLK0);
+                if (ccrev >= 21) {
+                        /* Re-enable the UART clock. */
+                        bcma_cc_write32(cc, BCMA_CC_CORECTL,
+                                       bcma_cc_read32(cc, BCMA_CC_CORECTL)
+                                       | BCMA_CC_CORECTL_UARTCLKEN);
+                }
+        } else {
+                pr_err("serial not supported on this device ccrev: 0x%x\n",
+                       ccrev);
+                return;
+        }
+
+        irq = bcma_core_mips_irq(cc->core);
+
+        /* Determine the registers of the UARTs */
+        cc->nr_serial_ports = (cc->capabilities & BCMA_CC_CAP_NRUART);
+        for (i = 0; i < cc->nr_serial_ports; i++) {
+                ports[i].regs = cc->core->io_addr + BCMA_CC_UART0_DATA +
+                                (i * 256);
+                ports[i].irq = irq;
+                ports[i].baud_base = baud_base;
+                ports[i].reg_shift = 0;
+        }
+}
+#endif /* CONFIG_BCMA_DRIVER_MIPS */
diff --git a/drivers/bcma/driver_chipcommon_pmu.c b/drivers/bcma/driver_chipcommon_pmu.c
index fcc63db0ce75..354caeea6397 100644
--- a/drivers/bcma/driver_chipcommon_pmu.c
+++ b/drivers/bcma/driver_chipcommon_pmu.c
@@ -136,3 +136,29 @@ void bcma_pmu_init(struct bcma_drv_cc *cc)
         bcma_pmu_swreg_init(cc);
         bcma_pmu_workarounds(cc);
 }
+
+u32 bcma_pmu_alp_clock(struct bcma_drv_cc *cc)
+{
+        struct bcma_bus *bus = cc->core->bus;
+
+        switch (bus->chipinfo.id) {
+        case 0x4716:
+        case 0x4748:
+        case 47162:
+        case 0x4313:
+        case 0x5357:
+        case 0x4749:
+        case 53572:
+                /* always 20Mhz */
+                return 20000 * 1000;
+        case 0x5356:
+        case 0x5300:
+                /* always 25Mhz */
+                return 25000 * 1000;
+        default:
+                pr_warn("No ALP clock specified for %04X device, "
+                        "pmu rev. %d, using default %d Hz\n",
+                        bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_ALP_CLOCK);
+        }
+        return BCMA_CC_PMU_ALP_CLOCK;
+}
diff --git a/drivers/bcma/driver_mips.c b/drivers/bcma/driver_mips.c
index 4b60c9f95839..b17233cb75c6 100644
--- a/drivers/bcma/driver_mips.c
+++ b/drivers/bcma/driver_mips.c
@@ -238,6 +238,7 @@ void bcma_core_mips_init(struct bcma_drv_mips *mcore)
         if (mcore->setup_done)
                 return;
 
+        bcma_chipco_serial_init(&bus->drv_cc);
         bcma_core_mips_flash_detect(mcore);
         mcore->setup_done = true;
 }