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authorHauke Mehrtens <hauke@hauke-m.de>2013-01-26 15:39:44 -0500
committerJohn W. Linville <linville@tuxdriver.com>2013-01-30 15:07:06 -0500
commit8f1ca2683225afa21b827ff620a6225c390771a9 (patch)
treee3ce18950e47ce417323527f1bfba59b64ed80f5 /drivers/bcma
parenta6ca2e10f795111a90a4efabb07717258669e03d (diff)
bcma: add gpio_to_irq
The old bcm47xx gpio code had support for gpio_to_irq, but the new code did not provide this function, but returned -ENXIO all the time. This patch adds the missing function. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/bcma')
-rw-r--r--drivers/bcma/driver_gpio.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/bcma/driver_gpio.c b/drivers/bcma/driver_gpio.c
index 9a6f585da2d9..0b5df538dfd9 100644
--- a/drivers/bcma/driver_gpio.c
+++ b/drivers/bcma/driver_gpio.c
@@ -73,6 +73,16 @@ static void bcma_gpio_free(struct gpio_chip *chip, unsigned gpio)
73 bcma_chipco_gpio_pullup(cc, 1 << gpio, 0); 73 bcma_chipco_gpio_pullup(cc, 1 << gpio, 0);
74} 74}
75 75
76static int bcma_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
77{
78 struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
79
80 if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
81 return bcma_core_irq(cc->core);
82 else
83 return -EINVAL;
84}
85
76int bcma_gpio_init(struct bcma_drv_cc *cc) 86int bcma_gpio_init(struct bcma_drv_cc *cc)
77{ 87{
78 struct gpio_chip *chip = &cc->gpio; 88 struct gpio_chip *chip = &cc->gpio;
@@ -85,6 +95,7 @@ int bcma_gpio_init(struct bcma_drv_cc *cc)
85 chip->set = bcma_gpio_set_value; 95 chip->set = bcma_gpio_set_value;
86 chip->direction_input = bcma_gpio_direction_input; 96 chip->direction_input = bcma_gpio_direction_input;
87 chip->direction_output = bcma_gpio_direction_output; 97 chip->direction_output = bcma_gpio_direction_output;
98 chip->to_irq = bcma_gpio_to_irq;
88 chip->ngpio = 16; 99 chip->ngpio = 16;
89 /* There is just one SoC in one device and its GPIO addresses should be 100 /* There is just one SoC in one device and its GPIO addresses should be
90 * deterministic to address them more easily. The other buses could get 101 * deterministic to address them more easily. The other buses could get