diff options
author | Rafał Miłecki <zajec5@gmail.com> | 2012-09-25 04:17:22 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2012-09-28 13:54:02 -0400 |
commit | 1fd41a65f19bdabb31549af00ce23d4c5c14781a (patch) | |
tree | 7fcb424f7ca6c58aa886062ba4ea3a81f6efde54 /drivers/bcma/driver_pci.c | |
parent | f1b98bb367f672ee78800fa62880b522bef86eed (diff) |
bcma: change delays to follow timers-howto guide
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/bcma/driver_pci.c')
-rw-r--r-- | drivers/bcma/driver_pci.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/bcma/driver_pci.c b/drivers/bcma/driver_pci.c index c32ebd537abe..c39ee6d45850 100644 --- a/drivers/bcma/driver_pci.c +++ b/drivers/bcma/driver_pci.c | |||
@@ -51,7 +51,7 @@ static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy) | |||
51 | v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL); | 51 | v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL); |
52 | if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE) | 52 | if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE) |
53 | break; | 53 | break; |
54 | msleep(1); | 54 | usleep_range(1000, 2000); |
55 | } | 55 | } |
56 | } | 56 | } |
57 | 57 | ||
@@ -92,7 +92,7 @@ static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address) | |||
92 | ret = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_DATA); | 92 | ret = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_DATA); |
93 | break; | 93 | break; |
94 | } | 94 | } |
95 | msleep(1); | 95 | usleep_range(1000, 2000); |
96 | } | 96 | } |
97 | pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); | 97 | pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); |
98 | return ret; | 98 | return ret; |
@@ -132,7 +132,7 @@ static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device, | |||
132 | v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL); | 132 | v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL); |
133 | if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE) | 133 | if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE) |
134 | break; | 134 | break; |
135 | msleep(1); | 135 | usleep_range(1000, 2000); |
136 | } | 136 | } |
137 | pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); | 137 | pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); |
138 | } | 138 | } |