diff options
author | Hauke Mehrtens <hauke@hauke-m.de> | 2012-06-29 19:44:38 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2012-07-09 16:36:03 -0400 |
commit | 4b4f5be2e49a604de11dee0ee9b3f151de061724 (patch) | |
tree | 147dda1b47876ba586049dbea6f5e8eaae5dd069 /drivers/bcma/driver_chipcommon_pmu.c | |
parent | 00eeedcf084a21bf436ff3147f11f0923c811155 (diff) |
bcma: add constants for chip ids
The chip IDs are used all over bcma and no constants where defined.
This patch adds the constants and makes bcma use them.
Acked-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/bcma/driver_chipcommon_pmu.c')
-rw-r--r-- | drivers/bcma/driver_chipcommon_pmu.c | 81 |
1 files changed, 41 insertions, 40 deletions
diff --git a/drivers/bcma/driver_chipcommon_pmu.c b/drivers/bcma/driver_chipcommon_pmu.c index f18df1f392ec..89528cf4d145 100644 --- a/drivers/bcma/driver_chipcommon_pmu.c +++ b/drivers/bcma/driver_chipcommon_pmu.c | |||
@@ -59,10 +59,10 @@ static void bcma_pmu_pll_init(struct bcma_drv_cc *cc) | |||
59 | struct bcma_bus *bus = cc->core->bus; | 59 | struct bcma_bus *bus = cc->core->bus; |
60 | 60 | ||
61 | switch (bus->chipinfo.id) { | 61 | switch (bus->chipinfo.id) { |
62 | case 0x4313: | 62 | case BCMA_CHIP_ID_BCM4313: |
63 | case 0x4331: | 63 | case BCMA_CHIP_ID_BCM4331: |
64 | case 43224: | 64 | case BCMA_CHIP_ID_BCM43224: |
65 | case 43225: | 65 | case BCMA_CHIP_ID_BCM43225: |
66 | break; | 66 | break; |
67 | default: | 67 | default: |
68 | pr_err("PLL init unknown for device 0x%04X\n", | 68 | pr_err("PLL init unknown for device 0x%04X\n", |
@@ -76,13 +76,13 @@ static void bcma_pmu_resources_init(struct bcma_drv_cc *cc) | |||
76 | u32 min_msk = 0, max_msk = 0; | 76 | u32 min_msk = 0, max_msk = 0; |
77 | 77 | ||
78 | switch (bus->chipinfo.id) { | 78 | switch (bus->chipinfo.id) { |
79 | case 0x4313: | 79 | case BCMA_CHIP_ID_BCM4313: |
80 | min_msk = 0x200D; | 80 | min_msk = 0x200D; |
81 | max_msk = 0xFFFF; | 81 | max_msk = 0xFFFF; |
82 | break; | 82 | break; |
83 | case 0x4331: | 83 | case BCMA_CHIP_ID_BCM4331: |
84 | case 43224: | 84 | case BCMA_CHIP_ID_BCM43224: |
85 | case 43225: | 85 | case BCMA_CHIP_ID_BCM43225: |
86 | break; | 86 | break; |
87 | default: | 87 | default: |
88 | pr_err("PMU resource config unknown for device 0x%04X\n", | 88 | pr_err("PMU resource config unknown for device 0x%04X\n", |
@@ -101,10 +101,10 @@ void bcma_pmu_swreg_init(struct bcma_drv_cc *cc) | |||
101 | struct bcma_bus *bus = cc->core->bus; | 101 | struct bcma_bus *bus = cc->core->bus; |
102 | 102 | ||
103 | switch (bus->chipinfo.id) { | 103 | switch (bus->chipinfo.id) { |
104 | case 0x4313: | 104 | case BCMA_CHIP_ID_BCM4313: |
105 | case 0x4331: | 105 | case BCMA_CHIP_ID_BCM4331: |
106 | case 43224: | 106 | case BCMA_CHIP_ID_BCM43224: |
107 | case 43225: | 107 | case BCMA_CHIP_ID_BCM43225: |
108 | break; | 108 | break; |
109 | default: | 109 | default: |
110 | pr_err("PMU switch/regulators init unknown for device " | 110 | pr_err("PMU switch/regulators init unknown for device " |
@@ -138,15 +138,15 @@ void bcma_pmu_workarounds(struct bcma_drv_cc *cc) | |||
138 | struct bcma_bus *bus = cc->core->bus; | 138 | struct bcma_bus *bus = cc->core->bus; |
139 | 139 | ||
140 | switch (bus->chipinfo.id) { | 140 | switch (bus->chipinfo.id) { |
141 | case 0x4313: | 141 | case BCMA_CHIP_ID_BCM4313: |
142 | bcma_chipco_chipctl_maskset(cc, 0, ~0, 0x7); | 142 | bcma_chipco_chipctl_maskset(cc, 0, ~0, 0x7); |
143 | break; | 143 | break; |
144 | case 0x4331: | 144 | case BCMA_CHIP_ID_BCM4331: |
145 | case 43431: | 145 | case BCMA_CHIP_ID_BCM43431: |
146 | /* Ext PA lines must be enabled for tx on BCM4331 */ | 146 | /* Ext PA lines must be enabled for tx on BCM4331 */ |
147 | bcma_chipco_bcm4331_ext_pa_lines_ctl(cc, true); | 147 | bcma_chipco_bcm4331_ext_pa_lines_ctl(cc, true); |
148 | break; | 148 | break; |
149 | case 43224: | 149 | case BCMA_CHIP_ID_BCM43224: |
150 | if (bus->chipinfo.rev == 0) { | 150 | if (bus->chipinfo.rev == 0) { |
151 | pr_err("Workarounds for 43224 rev 0 not fully " | 151 | pr_err("Workarounds for 43224 rev 0 not fully " |
152 | "implemented\n"); | 152 | "implemented\n"); |
@@ -155,7 +155,7 @@ void bcma_pmu_workarounds(struct bcma_drv_cc *cc) | |||
155 | bcma_chipco_chipctl_maskset(cc, 0, ~0, 0xF0); | 155 | bcma_chipco_chipctl_maskset(cc, 0, ~0, 0xF0); |
156 | } | 156 | } |
157 | break; | 157 | break; |
158 | case 43225: | 158 | case BCMA_CHIP_ID_BCM43225: |
159 | break; | 159 | break; |
160 | default: | 160 | default: |
161 | pr_err("Workarounds unknown for device 0x%04X\n", | 161 | pr_err("Workarounds unknown for device 0x%04X\n", |
@@ -194,17 +194,17 @@ u32 bcma_pmu_alp_clock(struct bcma_drv_cc *cc) | |||
194 | struct bcma_bus *bus = cc->core->bus; | 194 | struct bcma_bus *bus = cc->core->bus; |
195 | 195 | ||
196 | switch (bus->chipinfo.id) { | 196 | switch (bus->chipinfo.id) { |
197 | case 0x4716: | 197 | case BCMA_CHIP_ID_BCM4716: |
198 | case 0x4748: | 198 | case BCMA_CHIP_ID_BCM4748: |
199 | case 47162: | 199 | case BCMA_CHIP_ID_BCM47162: |
200 | case 0x4313: | 200 | case BCMA_CHIP_ID_BCM4313: |
201 | case 0x5357: | 201 | case BCMA_CHIP_ID_BCM5357: |
202 | case 0x4749: | 202 | case BCMA_CHIP_ID_BCM4749: |
203 | case 53572: | 203 | case BCMA_CHIP_ID_BCM53572: |
204 | /* always 20Mhz */ | 204 | /* always 20Mhz */ |
205 | return 20000 * 1000; | 205 | return 20000 * 1000; |
206 | case 0x5356: | 206 | case BCMA_CHIP_ID_BCM5356: |
207 | case 0x5300: | 207 | case BCMA_CHIP_ID_BCM4706: |
208 | /* always 25Mhz */ | 208 | /* always 25Mhz */ |
209 | return 25000 * 1000; | 209 | return 25000 * 1000; |
210 | default: | 210 | default: |
@@ -227,7 +227,8 @@ static u32 bcma_pmu_clock(struct bcma_drv_cc *cc, u32 pll0, u32 m) | |||
227 | 227 | ||
228 | BUG_ON(!m || m > 4); | 228 | BUG_ON(!m || m > 4); |
229 | 229 | ||
230 | if (bus->chipinfo.id == 0x5357 || bus->chipinfo.id == 0x4749) { | 230 | if (bus->chipinfo.id == BCMA_CHIP_ID_BCM5357 || |
231 | bus->chipinfo.id == BCMA_CHIP_ID_BCM4749) { | ||
231 | /* Detect failure in clock setting */ | 232 | /* Detect failure in clock setting */ |
232 | tmp = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT); | 233 | tmp = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT); |
233 | if (tmp & 0x40000) | 234 | if (tmp & 0x40000) |
@@ -259,22 +260,22 @@ u32 bcma_pmu_get_clockcontrol(struct bcma_drv_cc *cc) | |||
259 | struct bcma_bus *bus = cc->core->bus; | 260 | struct bcma_bus *bus = cc->core->bus; |
260 | 261 | ||
261 | switch (bus->chipinfo.id) { | 262 | switch (bus->chipinfo.id) { |
262 | case 0x4716: | 263 | case BCMA_CHIP_ID_BCM4716: |
263 | case 0x4748: | 264 | case BCMA_CHIP_ID_BCM4748: |
264 | case 47162: | 265 | case BCMA_CHIP_ID_BCM47162: |
265 | return bcma_pmu_clock(cc, BCMA_CC_PMU4716_MAINPLL_PLL0, | 266 | return bcma_pmu_clock(cc, BCMA_CC_PMU4716_MAINPLL_PLL0, |
266 | BCMA_CC_PMU5_MAINPLL_SSB); | 267 | BCMA_CC_PMU5_MAINPLL_SSB); |
267 | case 0x5356: | 268 | case BCMA_CHIP_ID_BCM5356: |
268 | return bcma_pmu_clock(cc, BCMA_CC_PMU5356_MAINPLL_PLL0, | 269 | return bcma_pmu_clock(cc, BCMA_CC_PMU5356_MAINPLL_PLL0, |
269 | BCMA_CC_PMU5_MAINPLL_SSB); | 270 | BCMA_CC_PMU5_MAINPLL_SSB); |
270 | case 0x5357: | 271 | case BCMA_CHIP_ID_BCM5357: |
271 | case 0x4749: | 272 | case BCMA_CHIP_ID_BCM4749: |
272 | return bcma_pmu_clock(cc, BCMA_CC_PMU5357_MAINPLL_PLL0, | 273 | return bcma_pmu_clock(cc, BCMA_CC_PMU5357_MAINPLL_PLL0, |
273 | BCMA_CC_PMU5_MAINPLL_SSB); | 274 | BCMA_CC_PMU5_MAINPLL_SSB); |
274 | case 0x5300: | 275 | case BCMA_CHIP_ID_BCM4706: |
275 | return bcma_pmu_clock(cc, BCMA_CC_PMU4706_MAINPLL_PLL0, | 276 | return bcma_pmu_clock(cc, BCMA_CC_PMU4706_MAINPLL_PLL0, |
276 | BCMA_CC_PMU5_MAINPLL_SSB); | 277 | BCMA_CC_PMU5_MAINPLL_SSB); |
277 | case 53572: | 278 | case BCMA_CHIP_ID_BCM53572: |
278 | return 75000000; | 279 | return 75000000; |
279 | default: | 280 | default: |
280 | pr_warn("No backplane clock specified for %04X device, " | 281 | pr_warn("No backplane clock specified for %04X device, " |
@@ -289,17 +290,17 @@ u32 bcma_pmu_get_clockcpu(struct bcma_drv_cc *cc) | |||
289 | { | 290 | { |
290 | struct bcma_bus *bus = cc->core->bus; | 291 | struct bcma_bus *bus = cc->core->bus; |
291 | 292 | ||
292 | if (bus->chipinfo.id == 53572) | 293 | if (bus->chipinfo.id == BCMA_CHIP_ID_BCM53572) |
293 | return 300000000; | 294 | return 300000000; |
294 | 295 | ||
295 | if (cc->pmu.rev >= 5) { | 296 | if (cc->pmu.rev >= 5) { |
296 | u32 pll; | 297 | u32 pll; |
297 | switch (bus->chipinfo.id) { | 298 | switch (bus->chipinfo.id) { |
298 | case 0x5356: | 299 | case BCMA_CHIP_ID_BCM5356: |
299 | pll = BCMA_CC_PMU5356_MAINPLL_PLL0; | 300 | pll = BCMA_CC_PMU5356_MAINPLL_PLL0; |
300 | break; | 301 | break; |
301 | case 0x5357: | 302 | case BCMA_CHIP_ID_BCM5357: |
302 | case 0x4749: | 303 | case BCMA_CHIP_ID_BCM4749: |
303 | pll = BCMA_CC_PMU5357_MAINPLL_PLL0; | 304 | pll = BCMA_CC_PMU5357_MAINPLL_PLL0; |
304 | break; | 305 | break; |
305 | default: | 306 | default: |
@@ -307,7 +308,7 @@ u32 bcma_pmu_get_clockcpu(struct bcma_drv_cc *cc) | |||
307 | break; | 308 | break; |
308 | } | 309 | } |
309 | 310 | ||
310 | /* TODO: if (bus->chipinfo.id == 0x5300) | 311 | /* TODO: if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) |
311 | return si_4706_pmu_clock(sih, osh, cc, PMU4706_MAINPLL_PLL0, PMU5_MAINPLL_CPU); */ | 312 | return si_4706_pmu_clock(sih, osh, cc, PMU4706_MAINPLL_PLL0, PMU5_MAINPLL_CPU); */ |
312 | return bcma_pmu_clock(cc, pll, BCMA_CC_PMU5_MAINPLL_CPU); | 313 | return bcma_pmu_clock(cc, pll, BCMA_CC_PMU5_MAINPLL_CPU); |
313 | } | 314 | } |