diff options
author | Hauke Mehrtens <hauke@hauke-m.de> | 2012-07-09 16:03:10 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2012-07-11 15:40:22 -0400 |
commit | 650cef38263c0f4c8970265354432be154eef425 (patch) | |
tree | 667a1f5d8837a2a8fc86110e6abe3d78f1b43ad1 /drivers/bcma/driver_chipcommon_pmu.c | |
parent | 9a89c3a856236ee6b68987dd0a0195010c3b801c (diff) |
bcma: add PMU clock support for BCM4706
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Tested-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/bcma/driver_chipcommon_pmu.c')
-rw-r--r-- | drivers/bcma/driver_chipcommon_pmu.c | 40 |
1 files changed, 36 insertions, 4 deletions
diff --git a/drivers/bcma/driver_chipcommon_pmu.c b/drivers/bcma/driver_chipcommon_pmu.c index 74a87d530424..44326178db29 100644 --- a/drivers/bcma/driver_chipcommon_pmu.c +++ b/drivers/bcma/driver_chipcommon_pmu.c | |||
@@ -226,6 +226,36 @@ static u32 bcma_pmu_clock(struct bcma_drv_cc *cc, u32 pll0, u32 m) | |||
226 | return (fc / div) * 1000000; | 226 | return (fc / div) * 1000000; |
227 | } | 227 | } |
228 | 228 | ||
229 | static u32 bcma_pmu_clock_bcm4706(struct bcma_drv_cc *cc, u32 pll0, u32 m) | ||
230 | { | ||
231 | u32 tmp, ndiv, p1div, p2div; | ||
232 | u32 clock; | ||
233 | |||
234 | BUG_ON(!m || m > 4); | ||
235 | |||
236 | /* Get N, P1 and P2 dividers to determine CPU clock */ | ||
237 | tmp = bcma_chipco_pll_read(cc, pll0 + BCMA_CC_PMU6_4706_PROCPLL_OFF); | ||
238 | ndiv = (tmp & BCMA_CC_PMU6_4706_PROC_NDIV_INT_MASK) | ||
239 | >> BCMA_CC_PMU6_4706_PROC_NDIV_INT_SHIFT; | ||
240 | p1div = (tmp & BCMA_CC_PMU6_4706_PROC_P1DIV_MASK) | ||
241 | >> BCMA_CC_PMU6_4706_PROC_P1DIV_SHIFT; | ||
242 | p2div = (tmp & BCMA_CC_PMU6_4706_PROC_P2DIV_MASK) | ||
243 | >> BCMA_CC_PMU6_4706_PROC_P2DIV_SHIFT; | ||
244 | |||
245 | tmp = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT); | ||
246 | if (tmp & BCMA_CC_CHIPST_4706_PKG_OPTION) | ||
247 | /* Low cost bonding: Fixed reference clock 25MHz and m = 4 */ | ||
248 | clock = (25000000 / 4) * ndiv * p2div / p1div; | ||
249 | else | ||
250 | /* Fixed reference clock 25MHz and m = 2 */ | ||
251 | clock = (25000000 / 2) * ndiv * p2div / p1div; | ||
252 | |||
253 | if (m == BCMA_CC_PMU5_MAINPLL_SSB) | ||
254 | clock = clock / 4; | ||
255 | |||
256 | return clock; | ||
257 | } | ||
258 | |||
229 | /* query bus clock frequency for PMU-enabled chipcommon */ | 259 | /* query bus clock frequency for PMU-enabled chipcommon */ |
230 | u32 bcma_pmu_get_clockcontrol(struct bcma_drv_cc *cc) | 260 | u32 bcma_pmu_get_clockcontrol(struct bcma_drv_cc *cc) |
231 | { | 261 | { |
@@ -245,8 +275,8 @@ u32 bcma_pmu_get_clockcontrol(struct bcma_drv_cc *cc) | |||
245 | return bcma_pmu_clock(cc, BCMA_CC_PMU5357_MAINPLL_PLL0, | 275 | return bcma_pmu_clock(cc, BCMA_CC_PMU5357_MAINPLL_PLL0, |
246 | BCMA_CC_PMU5_MAINPLL_SSB); | 276 | BCMA_CC_PMU5_MAINPLL_SSB); |
247 | case BCMA_CHIP_ID_BCM4706: | 277 | case BCMA_CHIP_ID_BCM4706: |
248 | return bcma_pmu_clock(cc, BCMA_CC_PMU4706_MAINPLL_PLL0, | 278 | return bcma_pmu_clock_bcm4706(cc, BCMA_CC_PMU4706_MAINPLL_PLL0, |
249 | BCMA_CC_PMU5_MAINPLL_SSB); | 279 | BCMA_CC_PMU5_MAINPLL_SSB); |
250 | case BCMA_CHIP_ID_BCM53572: | 280 | case BCMA_CHIP_ID_BCM53572: |
251 | return 75000000; | 281 | return 75000000; |
252 | default: | 282 | default: |
@@ -267,6 +297,10 @@ u32 bcma_pmu_get_clockcpu(struct bcma_drv_cc *cc) | |||
267 | if (cc->pmu.rev >= 5) { | 297 | if (cc->pmu.rev >= 5) { |
268 | u32 pll; | 298 | u32 pll; |
269 | switch (bus->chipinfo.id) { | 299 | switch (bus->chipinfo.id) { |
300 | case BCMA_CHIP_ID_BCM4706: | ||
301 | return bcma_pmu_clock_bcm4706(cc, | ||
302 | BCMA_CC_PMU4706_MAINPLL_PLL0, | ||
303 | BCMA_CC_PMU5_MAINPLL_CPU); | ||
270 | case BCMA_CHIP_ID_BCM5356: | 304 | case BCMA_CHIP_ID_BCM5356: |
271 | pll = BCMA_CC_PMU5356_MAINPLL_PLL0; | 305 | pll = BCMA_CC_PMU5356_MAINPLL_PLL0; |
272 | break; | 306 | break; |
@@ -279,8 +313,6 @@ u32 bcma_pmu_get_clockcpu(struct bcma_drv_cc *cc) | |||
279 | break; | 313 | break; |
280 | } | 314 | } |
281 | 315 | ||
282 | /* TODO: if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) | ||
283 | return si_4706_pmu_clock(sih, osh, cc, PMU4706_MAINPLL_PLL0, PMU5_MAINPLL_CPU); */ | ||
284 | return bcma_pmu_clock(cc, pll, BCMA_CC_PMU5_MAINPLL_CPU); | 316 | return bcma_pmu_clock(cc, pll, BCMA_CC_PMU5_MAINPLL_CPU); |
285 | } | 317 | } |
286 | 318 | ||