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authorDavid S. Miller <davem@davemloft.net>2011-01-24 16:17:06 -0500
committerDavid S. Miller <davem@davemloft.net>2011-01-24 16:17:06 -0500
commite92427b289d252cfbd4cb5282d92f4ce1a5bb1fb (patch)
tree6d30e5e7b7f8e9aaa51d43b7128ac56860fa03bb /drivers/atm
parentc506653d35249bb4738bb139c24362e1ae724bc1 (diff)
parentec30f343d61391ab23705e50a525da1d55395780 (diff)
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'drivers/atm')
-rw-r--r--drivers/atm/idt77252.h2
-rw-r--r--drivers/atm/iphase.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/atm/idt77252.h b/drivers/atm/idt77252.h
index 5042bb2dab15..f53a43ae2bbe 100644
--- a/drivers/atm/idt77252.h
+++ b/drivers/atm/idt77252.h
@@ -572,7 +572,7 @@ struct idt77252_dev
572#define SAR_STAT_TSQF 0x00001000 /* Transmit Status Queue full */ 572#define SAR_STAT_TSQF 0x00001000 /* Transmit Status Queue full */
573#define SAR_STAT_TMROF 0x00000800 /* Timer overflow */ 573#define SAR_STAT_TMROF 0x00000800 /* Timer overflow */
574#define SAR_STAT_PHYI 0x00000400 /* PHY device Interrupt flag */ 574#define SAR_STAT_PHYI 0x00000400 /* PHY device Interrupt flag */
575#define SAR_STAT_CMDBZ 0x00000200 /* ABR SAR Comand Busy Flag */ 575#define SAR_STAT_CMDBZ 0x00000200 /* ABR SAR Command Busy Flag */
576#define SAR_STAT_FBQ3A 0x00000100 /* Free Buffer Queue 3 Attention */ 576#define SAR_STAT_FBQ3A 0x00000100 /* Free Buffer Queue 3 Attention */
577#define SAR_STAT_FBQ2A 0x00000080 /* Free Buffer Queue 2 Attention */ 577#define SAR_STAT_FBQ2A 0x00000080 /* Free Buffer Queue 2 Attention */
578#define SAR_STAT_RSQF 0x00000040 /* Receive Status Queue full */ 578#define SAR_STAT_RSQF 0x00000040 /* Receive Status Queue full */
diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c
index 729254053758..d80d51b62a1a 100644
--- a/drivers/atm/iphase.c
+++ b/drivers/atm/iphase.c
@@ -2063,7 +2063,7 @@ static int tx_init(struct atm_dev *dev)
2063 - UBR Table size is 4K 2063 - UBR Table size is 4K
2064 - UBR wait queue is 4K 2064 - UBR wait queue is 4K
2065 since the table and wait queues are contiguous, all the bytes 2065 since the table and wait queues are contiguous, all the bytes
2066 can be initialized by one memeset. 2066 can be initialized by one memeset.
2067 */ 2067 */
2068 2068
2069 vcsize_sel = 0; 2069 vcsize_sel = 0;
@@ -2089,7 +2089,7 @@ static int tx_init(struct atm_dev *dev)
2089 - ABR Table size is 2K 2089 - ABR Table size is 2K
2090 - ABR wait queue is 2K 2090 - ABR wait queue is 2K
2091 since the table and wait queues are contiguous, all the bytes 2091 since the table and wait queues are contiguous, all the bytes
2092 can be intialized by one memeset. 2092 can be initialized by one memeset.
2093 */ 2093 */
2094 i = ABR_SCHED_TABLE * iadev->memSize; 2094 i = ABR_SCHED_TABLE * iadev->memSize;
2095 writew((i >> 11) & 0xffff, iadev->seg_reg+ABR_SBPTR_BASE); 2095 writew((i >> 11) & 0xffff, iadev->seg_reg+ABR_SBPTR_BASE);