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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/atm/ambassador.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/atm/ambassador.c')
-rw-r--r--drivers/atm/ambassador.c2463
1 files changed, 2463 insertions, 0 deletions
diff --git a/drivers/atm/ambassador.c b/drivers/atm/ambassador.c
new file mode 100644
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1/*
2 Madge Ambassador ATM Adapter driver.
3 Copyright (C) 1995-1999 Madge Networks Ltd.
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18
19 The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian
20 system and in the file COPYING in the Linux kernel source.
21*/
22
23/* * dedicated to the memory of Graham Gordon 1971-1998 * */
24
25#include <linux/module.h>
26#include <linux/types.h>
27#include <linux/pci.h>
28#include <linux/kernel.h>
29#include <linux/init.h>
30#include <linux/ioport.h>
31#include <linux/atmdev.h>
32#include <linux/delay.h>
33#include <linux/interrupt.h>
34
35#include <asm/atomic.h>
36#include <asm/io.h>
37#include <asm/byteorder.h>
38
39#include "ambassador.h"
40
41#define maintainer_string "Giuliano Procida at Madge Networks <gprocida@madge.com>"
42#define description_string "Madge ATM Ambassador driver"
43#define version_string "1.2.4"
44
45static inline void __init show_version (void) {
46 printk ("%s version %s\n", description_string, version_string);
47}
48
49/*
50
51 Theory of Operation
52
53 I Hardware, detection, initialisation and shutdown.
54
55 1. Supported Hardware
56
57 This driver is for the PCI ATMizer-based Ambassador card (except
58 very early versions). It is not suitable for the similar EISA "TR7"
59 card. Commercially, both cards are known as Collage Server ATM
60 adapters.
61
62 The loader supports image transfer to the card, image start and few
63 other miscellaneous commands.
64
65 Only AAL5 is supported with vpi = 0 and vci in the range 0 to 1023.
66
67 The cards are big-endian.
68
69 2. Detection
70
71 Standard PCI stuff, the early cards are detected and rejected.
72
73 3. Initialisation
74
75 The cards are reset and the self-test results are checked. The
76 microcode image is then transferred and started. This waits for a
77 pointer to a descriptor containing details of the host-based queues
78 and buffers and various parameters etc. Once they are processed
79 normal operations may begin. The BIA is read using a microcode
80 command.
81
82 4. Shutdown
83
84 This may be accomplished either by a card reset or via the microcode
85 shutdown command. Further investigation required.
86
87 5. Persistent state
88
89 The card reset does not affect PCI configuration (good) or the
90 contents of several other "shared run-time registers" (bad) which
91 include doorbell and interrupt control as well as EEPROM and PCI
92 control. The driver must be careful when modifying these registers
93 not to touch bits it does not use and to undo any changes at exit.
94
95 II Driver software
96
97 0. Generalities
98
99 The adapter is quite intelligent (fast) and has a simple interface
100 (few features). VPI is always zero, 1024 VCIs are supported. There
101 is limited cell rate support. UBR channels can be capped and ABR
102 (explicit rate, but not EFCI) is supported. There is no CBR or VBR
103 support.
104
105 1. Driver <-> Adapter Communication
106
107 Apart from the basic loader commands, the driver communicates
108 through three entities: the command queue (CQ), the transmit queue
109 pair (TXQ) and the receive queue pairs (RXQ). These three entities
110 are set up by the host and passed to the microcode just after it has
111 been started.
112
113 All queues are host-based circular queues. They are contiguous and
114 (due to hardware limitations) have some restrictions as to their
115 locations in (bus) memory. They are of the "full means the same as
116 empty so don't do that" variety since the adapter uses pointers
117 internally.
118
119 The queue pairs work as follows: one queue is for supply to the
120 adapter, items in it are pending and are owned by the adapter; the
121 other is the queue for return from the adapter, items in it have
122 been dealt with by the adapter. The host adds items to the supply
123 (TX descriptors and free RX buffer descriptors) and removes items
124 from the return (TX and RX completions). The adapter deals with out
125 of order completions.
126
127 Interrupts (card to host) and the doorbell (host to card) are used
128 for signalling.
129
130 1. CQ
131
132 This is to communicate "open VC", "close VC", "get stats" etc. to
133 the adapter. At most one command is retired every millisecond by the
134 card. There is no out of order completion or notification. The
135 driver needs to check the return code of the command, waiting as
136 appropriate.
137
138 2. TXQ
139
140 TX supply items are of variable length (scatter gather support) and
141 so the queue items are (more or less) pointers to the real thing.
142 Each TX supply item contains a unique, host-supplied handle (the skb
143 bus address seems most sensible as this works for Alphas as well,
144 there is no need to do any endian conversions on the handles).
145
146 TX return items consist of just the handles above.
147
148 3. RXQ (up to 4 of these with different lengths and buffer sizes)
149
150 RX supply items consist of a unique, host-supplied handle (the skb
151 bus address again) and a pointer to the buffer data area.
152
153 RX return items consist of the handle above, the VC, length and a
154 status word. This just screams "oh so easy" doesn't it?
155
156 Note on RX pool sizes:
157
158 Each pool should have enough buffers to handle a back-to-back stream
159 of minimum sized frames on a single VC. For example:
160
161 frame spacing = 3us (about right)
162
163 delay = IRQ lat + RX handling + RX buffer replenish = 20 (us) (a guess)
164
165 min number of buffers for one VC = 1 + delay/spacing (buffers)
166
167 delay/spacing = latency = (20+2)/3 = 7 (buffers) (rounding up)
168
169 The 20us delay assumes that there is no need to sleep; if we need to
170 sleep to get buffers we are going to drop frames anyway.
171
172 In fact, each pool should have enough buffers to support the
173 simultaneous reassembly of a separate frame on each VC and cope with
174 the case in which frames complete in round robin cell fashion on
175 each VC.
176
177 Only one frame can complete at each cell arrival, so if "n" VCs are
178 open, the worst case is to have them all complete frames together
179 followed by all starting new frames together.
180
181 desired number of buffers = n + delay/spacing
182
183 These are the extreme requirements, however, they are "n+k" for some
184 "k" so we have only the constant to choose. This is the argument
185 rx_lats which current defaults to 7.
186
187 Actually, "n ? n+k : 0" is better and this is what is implemented,
188 subject to the limit given by the pool size.
189
190 4. Driver locking
191
192 Simple spinlocks are used around the TX and RX queue mechanisms.
193 Anyone with a faster, working method is welcome to implement it.
194
195 The adapter command queue is protected with a spinlock. We always
196 wait for commands to complete.
197
198 A more complex form of locking is used around parts of the VC open
199 and close functions. There are three reasons for a lock: 1. we need
200 to do atomic rate reservation and release (not used yet), 2. Opening
201 sometimes involves two adapter commands which must not be separated
202 by another command on the same VC, 3. the changes to RX pool size
203 must be atomic. The lock needs to work over context switches, so we
204 use a semaphore.
205
206 III Hardware Features and Microcode Bugs
207
208 1. Byte Ordering
209
210 *%^"$&%^$*&^"$(%^$#&^%$(&#%$*(&^#%!"!"!*!
211
212 2. Memory access
213
214 All structures that are not accessed using DMA must be 4-byte
215 aligned (not a problem) and must not cross 4MB boundaries.
216
217 There is a DMA memory hole at E0000000-E00000FF (groan).
218
219 TX fragments (DMA read) must not cross 4MB boundaries (would be 16MB
220 but for a hardware bug).
221
222 RX buffers (DMA write) must not cross 16MB boundaries and must
223 include spare trailing bytes up to the next 4-byte boundary; they
224 will be written with rubbish.
225
226 The PLX likes to prefetch; if reading up to 4 u32 past the end of
227 each TX fragment is not a problem, then TX can be made to go a
228 little faster by passing a flag at init that disables a prefetch
229 workaround. We do not pass this flag. (new microcode only)
230
231 Now we:
232 . Note that alloc_skb rounds up size to a 16byte boundary.
233 . Ensure all areas do not traverse 4MB boundaries.
234 . Ensure all areas do not start at a E00000xx bus address.
235 (I cannot be certain, but this may always hold with Linux)
236 . Make all failures cause a loud message.
237 . Discard non-conforming SKBs (causes TX failure or RX fill delay).
238 . Discard non-conforming TX fragment descriptors (the TX fails).
239 In the future we could:
240 . Allow RX areas that traverse 4MB (but not 16MB) boundaries.
241 . Segment TX areas into some/more fragments, when necessary.
242 . Relax checks for non-DMA items (ignore hole).
243 . Give scatter-gather (iovec) requirements using ???. (?)
244
245 3. VC close is broken (only for new microcode)
246
247 The VC close adapter microcode command fails to do anything if any
248 frames have been received on the VC but none have been transmitted.
249 Frames continue to be reassembled and passed (with IRQ) to the
250 driver.
251
252 IV To Do List
253
254 . Fix bugs!
255
256 . Timer code may be broken.
257
258 . Deal with buggy VC close (somehow) in microcode 12.
259
260 . Handle interrupted and/or non-blocking writes - is this a job for
261 the protocol layer?
262
263 . Add code to break up TX fragments when they span 4MB boundaries.
264
265 . Add SUNI phy layer (need to know where SUNI lives on card).
266
267 . Implement a tx_alloc fn to (a) satisfy TX alignment etc. and (b)
268 leave extra headroom space for Ambassador TX descriptors.
269
270 . Understand these elements of struct atm_vcc: recvq (proto?),
271 sleep, callback, listenq, backlog_quota, reply and user_back.
272
273 . Adjust TX/RX skb allocation to favour IP with LANE/CLIP (configurable).
274
275 . Impose a TX-pending limit (2?) on each VC, help avoid TX q overflow.
276
277 . Decide whether RX buffer recycling is or can be made completely safe;
278 turn it back on. It looks like Werner is going to axe this.
279
280 . Implement QoS changes on open VCs (involves extracting parts of VC open
281 and close into separate functions and using them to make changes).
282
283 . Hack on command queue so that someone can issue multiple commands and wait
284 on the last one (OR only "no-op" or "wait" commands are waited for).
285
286 . Eliminate need for while-schedule around do_command.
287
288*/
289
290/********** microcode **********/
291
292#ifdef AMB_NEW_MICROCODE
293#define UCODE(x) UCODE2(atmsar12.x)
294#else
295#define UCODE(x) UCODE2(atmsar11.x)
296#endif
297#define UCODE2(x) #x
298
299static u32 __devinitdata ucode_start =
300#include UCODE(start)
301;
302
303static region __devinitdata ucode_regions[] = {
304#include UCODE(regions)
305 { 0, 0 }
306};
307
308static u32 __devinitdata ucode_data[] = {
309#include UCODE(data)
310 0xdeadbeef
311};
312
313static void do_housekeeping (unsigned long arg);
314/********** globals **********/
315
316static unsigned short debug = 0;
317static unsigned int cmds = 8;
318static unsigned int txs = 32;
319static unsigned int rxs[NUM_RX_POOLS] = { 64, 64, 64, 64 };
320static unsigned int rxs_bs[NUM_RX_POOLS] = { 4080, 12240, 36720, 65535 };
321static unsigned int rx_lats = 7;
322static unsigned char pci_lat = 0;
323
324static const unsigned long onegigmask = -1 << 30;
325
326/********** access to adapter **********/
327
328static inline void wr_plain (const amb_dev * dev, size_t addr, u32 data) {
329 PRINTD (DBG_FLOW|DBG_REGS, "wr: %08zx <- %08x", addr, data);
330#ifdef AMB_MMIO
331 dev->membase[addr / sizeof(u32)] = data;
332#else
333 outl (data, dev->iobase + addr);
334#endif
335}
336
337static inline u32 rd_plain (const amb_dev * dev, size_t addr) {
338#ifdef AMB_MMIO
339 u32 data = dev->membase[addr / sizeof(u32)];
340#else
341 u32 data = inl (dev->iobase + addr);
342#endif
343 PRINTD (DBG_FLOW|DBG_REGS, "rd: %08zx -> %08x", addr, data);
344 return data;
345}
346
347static inline void wr_mem (const amb_dev * dev, size_t addr, u32 data) {
348 __be32 be = cpu_to_be32 (data);
349 PRINTD (DBG_FLOW|DBG_REGS, "wr: %08zx <- %08x b[%08x]", addr, data, be);
350#ifdef AMB_MMIO
351 dev->membase[addr / sizeof(u32)] = be;
352#else
353 outl (be, dev->iobase + addr);
354#endif
355}
356
357static inline u32 rd_mem (const amb_dev * dev, size_t addr) {
358#ifdef AMB_MMIO
359 __be32 be = dev->membase[addr / sizeof(u32)];
360#else
361 __be32 be = inl (dev->iobase + addr);
362#endif
363 u32 data = be32_to_cpu (be);
364 PRINTD (DBG_FLOW|DBG_REGS, "rd: %08zx -> %08x b[%08x]", addr, data, be);
365 return data;
366}
367
368/********** dump routines **********/
369
370static inline void dump_registers (const amb_dev * dev) {
371#ifdef DEBUG_AMBASSADOR
372 if (debug & DBG_REGS) {
373 size_t i;
374 PRINTD (DBG_REGS, "reading PLX control: ");
375 for (i = 0x00; i < 0x30; i += sizeof(u32))
376 rd_mem (dev, i);
377 PRINTD (DBG_REGS, "reading mailboxes: ");
378 for (i = 0x40; i < 0x60; i += sizeof(u32))
379 rd_mem (dev, i);
380 PRINTD (DBG_REGS, "reading doorb irqev irqen reset:");
381 for (i = 0x60; i < 0x70; i += sizeof(u32))
382 rd_mem (dev, i);
383 }
384#else
385 (void) dev;
386#endif
387 return;
388}
389
390static inline void dump_loader_block (volatile loader_block * lb) {
391#ifdef DEBUG_AMBASSADOR
392 unsigned int i;
393 PRINTDB (DBG_LOAD, "lb @ %p; res: %d, cmd: %d, pay:",
394 lb, be32_to_cpu (lb->result), be32_to_cpu (lb->command));
395 for (i = 0; i < MAX_COMMAND_DATA; ++i)
396 PRINTDM (DBG_LOAD, " %08x", be32_to_cpu (lb->payload.data[i]));
397 PRINTDE (DBG_LOAD, ", vld: %08x", be32_to_cpu (lb->valid));
398#else
399 (void) lb;
400#endif
401 return;
402}
403
404static inline void dump_command (command * cmd) {
405#ifdef DEBUG_AMBASSADOR
406 unsigned int i;
407 PRINTDB (DBG_CMD, "cmd @ %p, req: %08x, pars:",
408 cmd, /*be32_to_cpu*/ (cmd->request));
409 for (i = 0; i < 3; ++i)
410 PRINTDM (DBG_CMD, " %08x", /*be32_to_cpu*/ (cmd->args.par[i]));
411 PRINTDE (DBG_CMD, "");
412#else
413 (void) cmd;
414#endif
415 return;
416}
417
418static inline void dump_skb (char * prefix, unsigned int vc, struct sk_buff * skb) {
419#ifdef DEBUG_AMBASSADOR
420 unsigned int i;
421 unsigned char * data = skb->data;
422 PRINTDB (DBG_DATA, "%s(%u) ", prefix, vc);
423 for (i=0; i<skb->len && i < 256;i++)
424 PRINTDM (DBG_DATA, "%02x ", data[i]);
425 PRINTDE (DBG_DATA,"");
426#else
427 (void) prefix;
428 (void) vc;
429 (void) skb;
430#endif
431 return;
432}
433
434/********** check memory areas for use by Ambassador **********/
435
436/* see limitations under Hardware Features */
437
438static inline int check_area (void * start, size_t length) {
439 // assumes length > 0
440 const u32 fourmegmask = -1 << 22;
441 const u32 twofivesixmask = -1 << 8;
442 const u32 starthole = 0xE0000000;
443 u32 startaddress = virt_to_bus (start);
444 u32 lastaddress = startaddress+length-1;
445 if ((startaddress ^ lastaddress) & fourmegmask ||
446 (startaddress & twofivesixmask) == starthole) {
447 PRINTK (KERN_ERR, "check_area failure: [%x,%x] - mail maintainer!",
448 startaddress, lastaddress);
449 return -1;
450 } else {
451 return 0;
452 }
453}
454
455/********** free an skb (as per ATM device driver documentation) **********/
456
457static inline void amb_kfree_skb (struct sk_buff * skb) {
458 if (ATM_SKB(skb)->vcc->pop) {
459 ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb);
460 } else {
461 dev_kfree_skb_any (skb);
462 }
463}
464
465/********** TX completion **********/
466
467static inline void tx_complete (amb_dev * dev, tx_out * tx) {
468 tx_simple * tx_descr = bus_to_virt (tx->handle);
469 struct sk_buff * skb = tx_descr->skb;
470
471 PRINTD (DBG_FLOW|DBG_TX, "tx_complete %p %p", dev, tx);
472
473 // VC layer stats
474 atomic_inc(&ATM_SKB(skb)->vcc->stats->tx);
475
476 // free the descriptor
477 kfree (tx_descr);
478
479 // free the skb
480 amb_kfree_skb (skb);
481
482 dev->stats.tx_ok++;
483 return;
484}
485
486/********** RX completion **********/
487
488static void rx_complete (amb_dev * dev, rx_out * rx) {
489 struct sk_buff * skb = bus_to_virt (rx->handle);
490 u16 vc = be16_to_cpu (rx->vc);
491 // unused: u16 lec_id = be16_to_cpu (rx->lec_id);
492 u16 status = be16_to_cpu (rx->status);
493 u16 rx_len = be16_to_cpu (rx->length);
494
495 PRINTD (DBG_FLOW|DBG_RX, "rx_complete %p %p (len=%hu)", dev, rx, rx_len);
496
497 // XXX move this in and add to VC stats ???
498 if (!status) {
499 struct atm_vcc * atm_vcc = dev->rxer[vc];
500 dev->stats.rx.ok++;
501
502 if (atm_vcc) {
503
504 if (rx_len <= atm_vcc->qos.rxtp.max_sdu) {
505
506 if (atm_charge (atm_vcc, skb->truesize)) {
507
508 // prepare socket buffer
509 ATM_SKB(skb)->vcc = atm_vcc;
510 skb_put (skb, rx_len);
511
512 dump_skb ("<<<", vc, skb);
513
514 // VC layer stats
515 atomic_inc(&atm_vcc->stats->rx);
516 do_gettimeofday(&skb->stamp);
517 // end of our responsability
518 atm_vcc->push (atm_vcc, skb);
519 return;
520
521 } else {
522 // someone fix this (message), please!
523 PRINTD (DBG_INFO|DBG_RX, "dropped thanks to atm_charge (vc %hu, truesize %u)", vc, skb->truesize);
524 // drop stats incremented in atm_charge
525 }
526
527 } else {
528 PRINTK (KERN_INFO, "dropped over-size frame");
529 // should we count this?
530 atomic_inc(&atm_vcc->stats->rx_drop);
531 }
532
533 } else {
534 PRINTD (DBG_WARN|DBG_RX, "got frame but RX closed for channel %hu", vc);
535 // this is an adapter bug, only in new version of microcode
536 }
537
538 } else {
539 dev->stats.rx.error++;
540 if (status & CRC_ERR)
541 dev->stats.rx.badcrc++;
542 if (status & LEN_ERR)
543 dev->stats.rx.toolong++;
544 if (status & ABORT_ERR)
545 dev->stats.rx.aborted++;
546 if (status & UNUSED_ERR)
547 dev->stats.rx.unused++;
548 }
549
550 dev_kfree_skb_any (skb);
551 return;
552}
553
554/*
555
556 Note on queue handling.
557
558 Here "give" and "take" refer to queue entries and a queue (pair)
559 rather than frames to or from the host or adapter. Empty frame
560 buffers are given to the RX queue pair and returned unused or
561 containing RX frames. TX frames (well, pointers to TX fragment
562 lists) are given to the TX queue pair, completions are returned.
563
564*/
565
566/********** command queue **********/
567
568// I really don't like this, but it's the best I can do at the moment
569
570// also, the callers are responsible for byte order as the microcode
571// sometimes does 16-bit accesses (yuk yuk yuk)
572
573static int command_do (amb_dev * dev, command * cmd) {
574 amb_cq * cq = &dev->cq;
575 volatile amb_cq_ptrs * ptrs = &cq->ptrs;
576 command * my_slot;
577
578 PRINTD (DBG_FLOW|DBG_CMD, "command_do %p", dev);
579
580 if (test_bit (dead, &dev->flags))
581 return 0;
582
583 spin_lock (&cq->lock);
584
585 // if not full...
586 if (cq->pending < cq->maximum) {
587 // remember my slot for later
588 my_slot = ptrs->in;
589 PRINTD (DBG_CMD, "command in slot %p", my_slot);
590
591 dump_command (cmd);
592
593 // copy command in
594 *ptrs->in = *cmd;
595 cq->pending++;
596 ptrs->in = NEXTQ (ptrs->in, ptrs->start, ptrs->limit);
597
598 // mail the command
599 wr_mem (dev, offsetof(amb_mem, mb.adapter.cmd_address), virt_to_bus (ptrs->in));
600
601 if (cq->pending > cq->high)
602 cq->high = cq->pending;
603 spin_unlock (&cq->lock);
604
605 // these comments were in a while-loop before, msleep removes the loop
606 // go to sleep
607 // PRINTD (DBG_CMD, "wait: sleeping %lu for command", timeout);
608 msleep(cq->pending);
609
610 // wait for my slot to be reached (all waiters are here or above, until...)
611 while (ptrs->out != my_slot) {
612 PRINTD (DBG_CMD, "wait: command slot (now at %p)", ptrs->out);
613 set_current_state(TASK_UNINTERRUPTIBLE);
614 schedule();
615 }
616
617 // wait on my slot (... one gets to its slot, and... )
618 while (ptrs->out->request != cpu_to_be32 (SRB_COMPLETE)) {
619 PRINTD (DBG_CMD, "wait: command slot completion");
620 set_current_state(TASK_UNINTERRUPTIBLE);
621 schedule();
622 }
623
624 PRINTD (DBG_CMD, "command complete");
625 // update queue (... moves the queue along to the next slot)
626 spin_lock (&cq->lock);
627 cq->pending--;
628 // copy command out
629 *cmd = *ptrs->out;
630 ptrs->out = NEXTQ (ptrs->out, ptrs->start, ptrs->limit);
631 spin_unlock (&cq->lock);
632
633 return 0;
634 } else {
635 cq->filled++;
636 spin_unlock (&cq->lock);
637 return -EAGAIN;
638 }
639
640}
641
642/********** TX queue pair **********/
643
644static inline int tx_give (amb_dev * dev, tx_in * tx) {
645 amb_txq * txq = &dev->txq;
646 unsigned long flags;
647
648 PRINTD (DBG_FLOW|DBG_TX, "tx_give %p", dev);
649
650 if (test_bit (dead, &dev->flags))
651 return 0;
652
653 spin_lock_irqsave (&txq->lock, flags);
654
655 if (txq->pending < txq->maximum) {
656 PRINTD (DBG_TX, "TX in slot %p", txq->in.ptr);
657
658 *txq->in.ptr = *tx;
659 txq->pending++;
660 txq->in.ptr = NEXTQ (txq->in.ptr, txq->in.start, txq->in.limit);
661 // hand over the TX and ring the bell
662 wr_mem (dev, offsetof(amb_mem, mb.adapter.tx_address), virt_to_bus (txq->in.ptr));
663 wr_mem (dev, offsetof(amb_mem, doorbell), TX_FRAME);
664
665 if (txq->pending > txq->high)
666 txq->high = txq->pending;
667 spin_unlock_irqrestore (&txq->lock, flags);
668 return 0;
669 } else {
670 txq->filled++;
671 spin_unlock_irqrestore (&txq->lock, flags);
672 return -EAGAIN;
673 }
674}
675
676static inline int tx_take (amb_dev * dev) {
677 amb_txq * txq = &dev->txq;
678 unsigned long flags;
679
680 PRINTD (DBG_FLOW|DBG_TX, "tx_take %p", dev);
681
682 spin_lock_irqsave (&txq->lock, flags);
683
684 if (txq->pending && txq->out.ptr->handle) {
685 // deal with TX completion
686 tx_complete (dev, txq->out.ptr);
687 // mark unused again
688 txq->out.ptr->handle = 0;
689 // remove item
690 txq->pending--;
691 txq->out.ptr = NEXTQ (txq->out.ptr, txq->out.start, txq->out.limit);
692
693 spin_unlock_irqrestore (&txq->lock, flags);
694 return 0;
695 } else {
696
697 spin_unlock_irqrestore (&txq->lock, flags);
698 return -1;
699 }
700}
701
702/********** RX queue pairs **********/
703
704static inline int rx_give (amb_dev * dev, rx_in * rx, unsigned char pool) {
705 amb_rxq * rxq = &dev->rxq[pool];
706 unsigned long flags;
707
708 PRINTD (DBG_FLOW|DBG_RX, "rx_give %p[%hu]", dev, pool);
709
710 spin_lock_irqsave (&rxq->lock, flags);
711
712 if (rxq->pending < rxq->maximum) {
713 PRINTD (DBG_RX, "RX in slot %p", rxq->in.ptr);
714
715 *rxq->in.ptr = *rx;
716 rxq->pending++;
717 rxq->in.ptr = NEXTQ (rxq->in.ptr, rxq->in.start, rxq->in.limit);
718 // hand over the RX buffer
719 wr_mem (dev, offsetof(amb_mem, mb.adapter.rx_address[pool]), virt_to_bus (rxq->in.ptr));
720
721 spin_unlock_irqrestore (&rxq->lock, flags);
722 return 0;
723 } else {
724 spin_unlock_irqrestore (&rxq->lock, flags);
725 return -1;
726 }
727}
728
729static inline int rx_take (amb_dev * dev, unsigned char pool) {
730 amb_rxq * rxq = &dev->rxq[pool];
731 unsigned long flags;
732
733 PRINTD (DBG_FLOW|DBG_RX, "rx_take %p[%hu]", dev, pool);
734
735 spin_lock_irqsave (&rxq->lock, flags);
736
737 if (rxq->pending && (rxq->out.ptr->status || rxq->out.ptr->length)) {
738 // deal with RX completion
739 rx_complete (dev, rxq->out.ptr);
740 // mark unused again
741 rxq->out.ptr->status = 0;
742 rxq->out.ptr->length = 0;
743 // remove item
744 rxq->pending--;
745 rxq->out.ptr = NEXTQ (rxq->out.ptr, rxq->out.start, rxq->out.limit);
746
747 if (rxq->pending < rxq->low)
748 rxq->low = rxq->pending;
749 spin_unlock_irqrestore (&rxq->lock, flags);
750 return 0;
751 } else {
752 if (!rxq->pending && rxq->buffers_wanted)
753 rxq->emptied++;
754 spin_unlock_irqrestore (&rxq->lock, flags);
755 return -1;
756 }
757}
758
759/********** RX Pool handling **********/
760
761/* pre: buffers_wanted = 0, post: pending = 0 */
762static inline void drain_rx_pool (amb_dev * dev, unsigned char pool) {
763 amb_rxq * rxq = &dev->rxq[pool];
764
765 PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pool %p %hu", dev, pool);
766
767 if (test_bit (dead, &dev->flags))
768 return;
769
770 /* we are not quite like the fill pool routines as we cannot just
771 remove one buffer, we have to remove all of them, but we might as
772 well pretend... */
773 if (rxq->pending > rxq->buffers_wanted) {
774 command cmd;
775 cmd.request = cpu_to_be32 (SRB_FLUSH_BUFFER_Q);
776 cmd.args.flush.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT);
777 while (command_do (dev, &cmd))
778 schedule();
779 /* the pool may also be emptied via the interrupt handler */
780 while (rxq->pending > rxq->buffers_wanted)
781 if (rx_take (dev, pool))
782 schedule();
783 }
784
785 return;
786}
787
788static void drain_rx_pools (amb_dev * dev) {
789 unsigned char pool;
790
791 PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pools %p", dev);
792
793 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
794 drain_rx_pool (dev, pool);
795}
796
797static inline void fill_rx_pool (amb_dev * dev, unsigned char pool, int priority) {
798 rx_in rx;
799 amb_rxq * rxq;
800
801 PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pool %p %hu %x", dev, pool, priority);
802
803 if (test_bit (dead, &dev->flags))
804 return;
805
806 rxq = &dev->rxq[pool];
807 while (rxq->pending < rxq->maximum && rxq->pending < rxq->buffers_wanted) {
808
809 struct sk_buff * skb = alloc_skb (rxq->buffer_size, priority);
810 if (!skb) {
811 PRINTD (DBG_SKB|DBG_POOL, "failed to allocate skb for RX pool %hu", pool);
812 return;
813 }
814 if (check_area (skb->data, skb->truesize)) {
815 dev_kfree_skb_any (skb);
816 return;
817 }
818 // cast needed as there is no %? for pointer differences
819 PRINTD (DBG_SKB, "allocated skb at %p, head %p, area %li",
820 skb, skb->head, (long) (skb->end - skb->head));
821 rx.handle = virt_to_bus (skb);
822 rx.host_address = cpu_to_be32 (virt_to_bus (skb->data));
823 if (rx_give (dev, &rx, pool))
824 dev_kfree_skb_any (skb);
825
826 }
827
828 return;
829}
830
831// top up all RX pools (can also be called as a bottom half)
832static void fill_rx_pools (amb_dev * dev) {
833 unsigned char pool;
834
835 PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pools %p", dev);
836
837 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
838 fill_rx_pool (dev, pool, GFP_ATOMIC);
839
840 return;
841}
842
843/********** enable host interrupts **********/
844
845static inline void interrupts_on (amb_dev * dev) {
846 wr_plain (dev, offsetof(amb_mem, interrupt_control),
847 rd_plain (dev, offsetof(amb_mem, interrupt_control))
848 | AMB_INTERRUPT_BITS);
849}
850
851/********** disable host interrupts **********/
852
853static inline void interrupts_off (amb_dev * dev) {
854 wr_plain (dev, offsetof(amb_mem, interrupt_control),
855 rd_plain (dev, offsetof(amb_mem, interrupt_control))
856 &~ AMB_INTERRUPT_BITS);
857}
858
859/********** interrupt handling **********/
860
861static irqreturn_t interrupt_handler(int irq, void *dev_id,
862 struct pt_regs *pt_regs) {
863 amb_dev * dev = (amb_dev *) dev_id;
864 (void) pt_regs;
865
866 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler: %p", dev_id);
867
868 if (!dev_id) {
869 PRINTD (DBG_IRQ|DBG_ERR, "irq with NULL dev_id: %d", irq);
870 return IRQ_NONE;
871 }
872
873 {
874 u32 interrupt = rd_plain (dev, offsetof(amb_mem, interrupt));
875
876 // for us or someone else sharing the same interrupt
877 if (!interrupt) {
878 PRINTD (DBG_IRQ, "irq not for me: %d", irq);
879 return IRQ_NONE;
880 }
881
882 // definitely for us
883 PRINTD (DBG_IRQ, "FYI: interrupt was %08x", interrupt);
884 wr_plain (dev, offsetof(amb_mem, interrupt), -1);
885 }
886
887 {
888 unsigned int irq_work = 0;
889 unsigned char pool;
890 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
891 while (!rx_take (dev, pool))
892 ++irq_work;
893 while (!tx_take (dev))
894 ++irq_work;
895
896 if (irq_work) {
897#ifdef FILL_RX_POOLS_IN_BH
898 schedule_work (&dev->bh);
899#else
900 fill_rx_pools (dev);
901#endif
902
903 PRINTD (DBG_IRQ, "work done: %u", irq_work);
904 } else {
905 PRINTD (DBG_IRQ|DBG_WARN, "no work done");
906 }
907 }
908
909 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler done: %p", dev_id);
910 return IRQ_HANDLED;
911}
912
913/********** make rate (not quite as much fun as Horizon) **********/
914
915static unsigned int make_rate (unsigned int rate, rounding r,
916 u16 * bits, unsigned int * actual) {
917 unsigned char exp = -1; // hush gcc
918 unsigned int man = -1; // hush gcc
919
920 PRINTD (DBG_FLOW|DBG_QOS, "make_rate %u", rate);
921
922 // rates in cells per second, ITU format (nasty 16-bit floating-point)
923 // given 5-bit e and 9-bit m:
924 // rate = EITHER (1+m/2^9)*2^e OR 0
925 // bits = EITHER 1<<14 | e<<9 | m OR 0
926 // (bit 15 is "reserved", bit 14 "non-zero")
927 // smallest rate is 0 (special representation)
928 // largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
929 // smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
930 // simple algorithm:
931 // find position of top bit, this gives e
932 // remove top bit and shift (rounding if feeling clever) by 9-e
933
934 // ucode bug: please don't set bit 14! so 0 rate not representable
935
936 if (rate > 0xffc00000U) {
937 // larger than largest representable rate
938
939 if (r == round_up) {
940 return -EINVAL;
941 } else {
942 exp = 31;
943 man = 511;
944 }
945
946 } else if (rate) {
947 // representable rate
948
949 exp = 31;
950 man = rate;
951
952 // invariant: rate = man*2^(exp-31)
953 while (!(man & (1<<31))) {
954 exp = exp - 1;
955 man = man<<1;
956 }
957
958 // man has top bit set
959 // rate = (2^31+(man-2^31))*2^(exp-31)
960 // rate = (1+(man-2^31)/2^31)*2^exp
961 man = man<<1;
962 man &= 0xffffffffU; // a nop on 32-bit systems
963 // rate = (1+man/2^32)*2^exp
964
965 // exp is in the range 0 to 31, man is in the range 0 to 2^32-1
966 // time to lose significance... we want m in the range 0 to 2^9-1
967 // rounding presents a minor problem... we first decide which way
968 // we are rounding (based on given rounding direction and possibly
969 // the bits of the mantissa that are to be discarded).
970
971 switch (r) {
972 case round_down: {
973 // just truncate
974 man = man>>(32-9);
975 break;
976 }
977 case round_up: {
978 // check all bits that we are discarding
979 if (man & (-1>>9)) {
980 man = (man>>(32-9)) + 1;
981 if (man == (1<<9)) {
982 // no need to check for round up outside of range
983 man = 0;
984 exp += 1;
985 }
986 } else {
987 man = (man>>(32-9));
988 }
989 break;
990 }
991 case round_nearest: {
992 // check msb that we are discarding
993 if (man & (1<<(32-9-1))) {
994 man = (man>>(32-9)) + 1;
995 if (man == (1<<9)) {
996 // no need to check for round up outside of range
997 man = 0;
998 exp += 1;
999 }
1000 } else {
1001 man = (man>>(32-9));
1002 }
1003 break;
1004 }
1005 }
1006
1007 } else {
1008 // zero rate - not representable
1009
1010 if (r == round_down) {
1011 return -EINVAL;
1012 } else {
1013 exp = 0;
1014 man = 0;
1015 }
1016
1017 }
1018
1019 PRINTD (DBG_QOS, "rate: man=%u, exp=%hu", man, exp);
1020
1021 if (bits)
1022 *bits = /* (1<<14) | */ (exp<<9) | man;
1023
1024 if (actual)
1025 *actual = (exp >= 9)
1026 ? (1 << exp) + (man << (exp-9))
1027 : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp));
1028
1029 return 0;
1030}
1031
1032/********** Linux ATM Operations **********/
1033
1034// some are not yet implemented while others do not make sense for
1035// this device
1036
1037/********** Open a VC **********/
1038
1039static int amb_open (struct atm_vcc * atm_vcc)
1040{
1041 int error;
1042
1043 struct atm_qos * qos;
1044 struct atm_trafprm * txtp;
1045 struct atm_trafprm * rxtp;
1046 u16 tx_rate_bits;
1047 u16 tx_vc_bits = -1; // hush gcc
1048 u16 tx_frame_bits = -1; // hush gcc
1049
1050 amb_dev * dev = AMB_DEV(atm_vcc->dev);
1051 amb_vcc * vcc;
1052 unsigned char pool = -1; // hush gcc
1053 short vpi = atm_vcc->vpi;
1054 int vci = atm_vcc->vci;
1055
1056 PRINTD (DBG_FLOW|DBG_VCC, "amb_open %x %x", vpi, vci);
1057
1058#ifdef ATM_VPI_UNSPEC
1059 // UNSPEC is deprecated, remove this code eventually
1060 if (vpi == ATM_VPI_UNSPEC || vci == ATM_VCI_UNSPEC) {
1061 PRINTK (KERN_WARNING, "rejecting open with unspecified VPI/VCI (deprecated)");
1062 return -EINVAL;
1063 }
1064#endif
1065
1066 if (!(0 <= vpi && vpi < (1<<NUM_VPI_BITS) &&
1067 0 <= vci && vci < (1<<NUM_VCI_BITS))) {
1068 PRINTD (DBG_WARN|DBG_VCC, "VPI/VCI out of range: %hd/%d", vpi, vci);
1069 return -EINVAL;
1070 }
1071
1072 qos = &atm_vcc->qos;
1073
1074 if (qos->aal != ATM_AAL5) {
1075 PRINTD (DBG_QOS, "AAL not supported");
1076 return -EINVAL;
1077 }
1078
1079 // traffic parameters
1080
1081 PRINTD (DBG_QOS, "TX:");
1082 txtp = &qos->txtp;
1083 if (txtp->traffic_class != ATM_NONE) {
1084 switch (txtp->traffic_class) {
1085 case ATM_UBR: {
1086 // we take "the PCR" as a rate-cap
1087 int pcr = atm_pcr_goal (txtp);
1088 if (!pcr) {
1089 // no rate cap
1090 tx_rate_bits = 0;
1091 tx_vc_bits = TX_UBR;
1092 tx_frame_bits = TX_FRAME_NOTCAP;
1093 } else {
1094 rounding r;
1095 if (pcr < 0) {
1096 r = round_down;
1097 pcr = -pcr;
1098 } else {
1099 r = round_up;
1100 }
1101 error = make_rate (pcr, r, &tx_rate_bits, NULL);
1102 tx_vc_bits = TX_UBR_CAPPED;
1103 tx_frame_bits = TX_FRAME_CAPPED;
1104 }
1105 break;
1106 }
1107#if 0
1108 case ATM_ABR: {
1109 pcr = atm_pcr_goal (txtp);
1110 PRINTD (DBG_QOS, "pcr goal = %d", pcr);
1111 break;
1112 }
1113#endif
1114 default: {
1115 // PRINTD (DBG_QOS, "request for non-UBR/ABR denied");
1116 PRINTD (DBG_QOS, "request for non-UBR denied");
1117 return -EINVAL;
1118 }
1119 }
1120 PRINTD (DBG_QOS, "tx_rate_bits=%hx, tx_vc_bits=%hx",
1121 tx_rate_bits, tx_vc_bits);
1122 }
1123
1124 PRINTD (DBG_QOS, "RX:");
1125 rxtp = &qos->rxtp;
1126 if (rxtp->traffic_class == ATM_NONE) {
1127 // do nothing
1128 } else {
1129 // choose an RX pool (arranged in increasing size)
1130 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
1131 if ((unsigned int) rxtp->max_sdu <= dev->rxq[pool].buffer_size) {
1132 PRINTD (DBG_VCC|DBG_QOS|DBG_POOL, "chose pool %hu (max_sdu %u <= %u)",
1133 pool, rxtp->max_sdu, dev->rxq[pool].buffer_size);
1134 break;
1135 }
1136 if (pool == NUM_RX_POOLS) {
1137 PRINTD (DBG_WARN|DBG_VCC|DBG_QOS|DBG_POOL,
1138 "no pool suitable for VC (RX max_sdu %d is too large)",
1139 rxtp->max_sdu);
1140 return -EINVAL;
1141 }
1142
1143 switch (rxtp->traffic_class) {
1144 case ATM_UBR: {
1145 break;
1146 }
1147#if 0
1148 case ATM_ABR: {
1149 pcr = atm_pcr_goal (rxtp);
1150 PRINTD (DBG_QOS, "pcr goal = %d", pcr);
1151 break;
1152 }
1153#endif
1154 default: {
1155 // PRINTD (DBG_QOS, "request for non-UBR/ABR denied");
1156 PRINTD (DBG_QOS, "request for non-UBR denied");
1157 return -EINVAL;
1158 }
1159 }
1160 }
1161
1162 // get space for our vcc stuff
1163 vcc = kmalloc (sizeof(amb_vcc), GFP_KERNEL);
1164 if (!vcc) {
1165 PRINTK (KERN_ERR, "out of memory!");
1166 return -ENOMEM;
1167 }
1168 atm_vcc->dev_data = (void *) vcc;
1169
1170 // no failures beyond this point
1171
1172 // we are not really "immediately before allocating the connection
1173 // identifier in hardware", but it will just have to do!
1174 set_bit(ATM_VF_ADDR,&atm_vcc->flags);
1175
1176 if (txtp->traffic_class != ATM_NONE) {
1177 command cmd;
1178
1179 vcc->tx_frame_bits = tx_frame_bits;
1180
1181 down (&dev->vcc_sf);
1182 if (dev->rxer[vci]) {
1183 // RXer on the channel already, just modify rate...
1184 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE);
1185 cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0
1186 cmd.args.modify_rate.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT);
1187 while (command_do (dev, &cmd))
1188 schedule();
1189 // ... and TX flags, preserving the RX pool
1190 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1191 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1192 cmd.args.modify_flags.flags = cpu_to_be32
1193 ( (AMB_VCC(dev->rxer[vci])->rx_info.pool << SRB_POOL_SHIFT)
1194 | (tx_vc_bits << SRB_FLAGS_SHIFT) );
1195 while (command_do (dev, &cmd))
1196 schedule();
1197 } else {
1198 // no RXer on the channel, just open (with pool zero)
1199 cmd.request = cpu_to_be32 (SRB_OPEN_VC);
1200 cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0
1201 cmd.args.open.flags = cpu_to_be32 (tx_vc_bits << SRB_FLAGS_SHIFT);
1202 cmd.args.open.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT);
1203 while (command_do (dev, &cmd))
1204 schedule();
1205 }
1206 dev->txer[vci].tx_present = 1;
1207 up (&dev->vcc_sf);
1208 }
1209
1210 if (rxtp->traffic_class != ATM_NONE) {
1211 command cmd;
1212
1213 vcc->rx_info.pool = pool;
1214
1215 down (&dev->vcc_sf);
1216 /* grow RX buffer pool */
1217 if (!dev->rxq[pool].buffers_wanted)
1218 dev->rxq[pool].buffers_wanted = rx_lats;
1219 dev->rxq[pool].buffers_wanted += 1;
1220 fill_rx_pool (dev, pool, GFP_KERNEL);
1221
1222 if (dev->txer[vci].tx_present) {
1223 // TXer on the channel already
1224 // switch (from pool zero) to this pool, preserving the TX bits
1225 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1226 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1227 cmd.args.modify_flags.flags = cpu_to_be32
1228 ( (pool << SRB_POOL_SHIFT)
1229 | (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT) );
1230 } else {
1231 // no TXer on the channel, open the VC (with no rate info)
1232 cmd.request = cpu_to_be32 (SRB_OPEN_VC);
1233 cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0
1234 cmd.args.open.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT);
1235 cmd.args.open.rate = cpu_to_be32 (0);
1236 }
1237 while (command_do (dev, &cmd))
1238 schedule();
1239 // this link allows RX frames through
1240 dev->rxer[vci] = atm_vcc;
1241 up (&dev->vcc_sf);
1242 }
1243
1244 // indicate readiness
1245 set_bit(ATM_VF_READY,&atm_vcc->flags);
1246
1247 return 0;
1248}
1249
1250/********** Close a VC **********/
1251
1252static void amb_close (struct atm_vcc * atm_vcc) {
1253 amb_dev * dev = AMB_DEV (atm_vcc->dev);
1254 amb_vcc * vcc = AMB_VCC (atm_vcc);
1255 u16 vci = atm_vcc->vci;
1256
1257 PRINTD (DBG_VCC|DBG_FLOW, "amb_close");
1258
1259 // indicate unreadiness
1260 clear_bit(ATM_VF_READY,&atm_vcc->flags);
1261
1262 // disable TXing
1263 if (atm_vcc->qos.txtp.traffic_class != ATM_NONE) {
1264 command cmd;
1265
1266 down (&dev->vcc_sf);
1267 if (dev->rxer[vci]) {
1268 // RXer still on the channel, just modify rate... XXX not really needed
1269 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE);
1270 cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0
1271 cmd.args.modify_rate.rate = cpu_to_be32 (0);
1272 // ... and clear TX rate flags (XXX to stop RM cell output?), preserving RX pool
1273 } else {
1274 // no RXer on the channel, close channel
1275 cmd.request = cpu_to_be32 (SRB_CLOSE_VC);
1276 cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0
1277 }
1278 dev->txer[vci].tx_present = 0;
1279 while (command_do (dev, &cmd))
1280 schedule();
1281 up (&dev->vcc_sf);
1282 }
1283
1284 // disable RXing
1285 if (atm_vcc->qos.rxtp.traffic_class != ATM_NONE) {
1286 command cmd;
1287
1288 // this is (the?) one reason why we need the amb_vcc struct
1289 unsigned char pool = vcc->rx_info.pool;
1290
1291 down (&dev->vcc_sf);
1292 if (dev->txer[vci].tx_present) {
1293 // TXer still on the channel, just go to pool zero XXX not really needed
1294 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1295 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1296 cmd.args.modify_flags.flags = cpu_to_be32
1297 (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT);
1298 } else {
1299 // no TXer on the channel, close the VC
1300 cmd.request = cpu_to_be32 (SRB_CLOSE_VC);
1301 cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0
1302 }
1303 // forget the rxer - no more skbs will be pushed
1304 if (atm_vcc != dev->rxer[vci])
1305 PRINTK (KERN_ERR, "%s vcc=%p rxer[vci]=%p",
1306 "arghhh! we're going to die!",
1307 vcc, dev->rxer[vci]);
1308 dev->rxer[vci] = NULL;
1309 while (command_do (dev, &cmd))
1310 schedule();
1311
1312 /* shrink RX buffer pool */
1313 dev->rxq[pool].buffers_wanted -= 1;
1314 if (dev->rxq[pool].buffers_wanted == rx_lats) {
1315 dev->rxq[pool].buffers_wanted = 0;
1316 drain_rx_pool (dev, pool);
1317 }
1318 up (&dev->vcc_sf);
1319 }
1320
1321 // free our structure
1322 kfree (vcc);
1323
1324 // say the VPI/VCI is free again
1325 clear_bit(ATM_VF_ADDR,&atm_vcc->flags);
1326
1327 return;
1328}
1329
1330/********** Set socket options for a VC **********/
1331
1332// int amb_getsockopt (struct atm_vcc * atm_vcc, int level, int optname, void * optval, int optlen);
1333
1334/********** Set socket options for a VC **********/
1335
1336// int amb_setsockopt (struct atm_vcc * atm_vcc, int level, int optname, void * optval, int optlen);
1337
1338/********** Send **********/
1339
1340static int amb_send (struct atm_vcc * atm_vcc, struct sk_buff * skb) {
1341 amb_dev * dev = AMB_DEV(atm_vcc->dev);
1342 amb_vcc * vcc = AMB_VCC(atm_vcc);
1343 u16 vc = atm_vcc->vci;
1344 unsigned int tx_len = skb->len;
1345 unsigned char * tx_data = skb->data;
1346 tx_simple * tx_descr;
1347 tx_in tx;
1348
1349 if (test_bit (dead, &dev->flags))
1350 return -EIO;
1351
1352 PRINTD (DBG_FLOW|DBG_TX, "amb_send vc %x data %p len %u",
1353 vc, tx_data, tx_len);
1354
1355 dump_skb (">>>", vc, skb);
1356
1357 if (!dev->txer[vc].tx_present) {
1358 PRINTK (KERN_ERR, "attempt to send on RX-only VC %x", vc);
1359 return -EBADFD;
1360 }
1361
1362 // this is a driver private field so we have to set it ourselves,
1363 // despite the fact that we are _required_ to use it to check for a
1364 // pop function
1365 ATM_SKB(skb)->vcc = atm_vcc;
1366
1367 if (skb->len > (size_t) atm_vcc->qos.txtp.max_sdu) {
1368 PRINTK (KERN_ERR, "sk_buff length greater than agreed max_sdu, dropping...");
1369 return -EIO;
1370 }
1371
1372 if (check_area (skb->data, skb->len)) {
1373 atomic_inc(&atm_vcc->stats->tx_err);
1374 return -ENOMEM; // ?
1375 }
1376
1377 // allocate memory for fragments
1378 tx_descr = kmalloc (sizeof(tx_simple), GFP_KERNEL);
1379 if (!tx_descr) {
1380 PRINTK (KERN_ERR, "could not allocate TX descriptor");
1381 return -ENOMEM;
1382 }
1383 if (check_area (tx_descr, sizeof(tx_simple))) {
1384 kfree (tx_descr);
1385 return -ENOMEM;
1386 }
1387 PRINTD (DBG_TX, "fragment list allocated at %p", tx_descr);
1388
1389 tx_descr->skb = skb;
1390
1391 tx_descr->tx_frag.bytes = cpu_to_be32 (tx_len);
1392 tx_descr->tx_frag.address = cpu_to_be32 (virt_to_bus (tx_data));
1393
1394 tx_descr->tx_frag_end.handle = virt_to_bus (tx_descr);
1395 tx_descr->tx_frag_end.vc = 0;
1396 tx_descr->tx_frag_end.next_descriptor_length = 0;
1397 tx_descr->tx_frag_end.next_descriptor = 0;
1398#ifdef AMB_NEW_MICROCODE
1399 tx_descr->tx_frag_end.cpcs_uu = 0;
1400 tx_descr->tx_frag_end.cpi = 0;
1401 tx_descr->tx_frag_end.pad = 0;
1402#endif
1403
1404 tx.vc = cpu_to_be16 (vcc->tx_frame_bits | vc);
1405 tx.tx_descr_length = cpu_to_be16 (sizeof(tx_frag)+sizeof(tx_frag_end));
1406 tx.tx_descr_addr = cpu_to_be32 (virt_to_bus (&tx_descr->tx_frag));
1407
1408 while (tx_give (dev, &tx))
1409 schedule();
1410 return 0;
1411}
1412
1413/********** Change QoS on a VC **********/
1414
1415// int amb_change_qos (struct atm_vcc * atm_vcc, struct atm_qos * qos, int flags);
1416
1417/********** Free RX Socket Buffer **********/
1418
1419#if 0
1420static void amb_free_rx_skb (struct atm_vcc * atm_vcc, struct sk_buff * skb) {
1421 amb_dev * dev = AMB_DEV (atm_vcc->dev);
1422 amb_vcc * vcc = AMB_VCC (atm_vcc);
1423 unsigned char pool = vcc->rx_info.pool;
1424 rx_in rx;
1425
1426 // This may be unsafe for various reasons that I cannot really guess
1427 // at. However, I note that the ATM layer calls kfree_skb rather
1428 // than dev_kfree_skb at this point so we are least covered as far
1429 // as buffer locking goes. There may be bugs if pcap clones RX skbs.
1430
1431 PRINTD (DBG_FLOW|DBG_SKB, "amb_rx_free skb %p (atm_vcc %p, vcc %p)",
1432 skb, atm_vcc, vcc);
1433
1434 rx.handle = virt_to_bus (skb);
1435 rx.host_address = cpu_to_be32 (virt_to_bus (skb->data));
1436
1437 skb->data = skb->head;
1438 skb->tail = skb->head;
1439 skb->len = 0;
1440
1441 if (!rx_give (dev, &rx, pool)) {
1442 // success
1443 PRINTD (DBG_SKB|DBG_POOL, "recycled skb for pool %hu", pool);
1444 return;
1445 }
1446
1447 // just do what the ATM layer would have done
1448 dev_kfree_skb_any (skb);
1449
1450 return;
1451}
1452#endif
1453
1454/********** Proc File Output **********/
1455
1456static int amb_proc_read (struct atm_dev * atm_dev, loff_t * pos, char * page) {
1457 amb_dev * dev = AMB_DEV (atm_dev);
1458 int left = *pos;
1459 unsigned char pool;
1460
1461 PRINTD (DBG_FLOW, "amb_proc_read");
1462
1463 /* more diagnostics here? */
1464
1465 if (!left--) {
1466 amb_stats * s = &dev->stats;
1467 return sprintf (page,
1468 "frames: TX OK %lu, RX OK %lu, RX bad %lu "
1469 "(CRC %lu, long %lu, aborted %lu, unused %lu).\n",
1470 s->tx_ok, s->rx.ok, s->rx.error,
1471 s->rx.badcrc, s->rx.toolong,
1472 s->rx.aborted, s->rx.unused);
1473 }
1474
1475 if (!left--) {
1476 amb_cq * c = &dev->cq;
1477 return sprintf (page, "cmd queue [cur/hi/max]: %u/%u/%u. ",
1478 c->pending, c->high, c->maximum);
1479 }
1480
1481 if (!left--) {
1482 amb_txq * t = &dev->txq;
1483 return sprintf (page, "TX queue [cur/max high full]: %u/%u %u %u.\n",
1484 t->pending, t->maximum, t->high, t->filled);
1485 }
1486
1487 if (!left--) {
1488 unsigned int count = sprintf (page, "RX queues [cur/max/req low empty]:");
1489 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1490 amb_rxq * r = &dev->rxq[pool];
1491 count += sprintf (page+count, " %u/%u/%u %u %u",
1492 r->pending, r->maximum, r->buffers_wanted, r->low, r->emptied);
1493 }
1494 count += sprintf (page+count, ".\n");
1495 return count;
1496 }
1497
1498 if (!left--) {
1499 unsigned int count = sprintf (page, "RX buffer sizes:");
1500 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1501 amb_rxq * r = &dev->rxq[pool];
1502 count += sprintf (page+count, " %u", r->buffer_size);
1503 }
1504 count += sprintf (page+count, ".\n");
1505 return count;
1506 }
1507
1508#if 0
1509 if (!left--) {
1510 // suni block etc?
1511 }
1512#endif
1513
1514 return 0;
1515}
1516
1517/********** Operation Structure **********/
1518
1519static const struct atmdev_ops amb_ops = {
1520 .open = amb_open,
1521 .close = amb_close,
1522 .send = amb_send,
1523 .proc_read = amb_proc_read,
1524 .owner = THIS_MODULE,
1525};
1526
1527/********** housekeeping **********/
1528static void do_housekeeping (unsigned long arg) {
1529 amb_dev * dev = (amb_dev *) arg;
1530
1531 // could collect device-specific (not driver/atm-linux) stats here
1532
1533 // last resort refill once every ten seconds
1534 fill_rx_pools (dev);
1535 mod_timer(&dev->housekeeping, jiffies + 10*HZ);
1536
1537 return;
1538}
1539
1540/********** creation of communication queues **********/
1541
1542static int __devinit create_queues (amb_dev * dev, unsigned int cmds,
1543 unsigned int txs, unsigned int * rxs,
1544 unsigned int * rx_buffer_sizes) {
1545 unsigned char pool;
1546 size_t total = 0;
1547 void * memory;
1548 void * limit;
1549
1550 PRINTD (DBG_FLOW, "create_queues %p", dev);
1551
1552 total += cmds * sizeof(command);
1553
1554 total += txs * (sizeof(tx_in) + sizeof(tx_out));
1555
1556 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
1557 total += rxs[pool] * (sizeof(rx_in) + sizeof(rx_out));
1558
1559 memory = kmalloc (total, GFP_KERNEL);
1560 if (!memory) {
1561 PRINTK (KERN_ERR, "could not allocate queues");
1562 return -ENOMEM;
1563 }
1564 if (check_area (memory, total)) {
1565 PRINTK (KERN_ERR, "queues allocated in nasty area");
1566 kfree (memory);
1567 return -ENOMEM;
1568 }
1569
1570 limit = memory + total;
1571 PRINTD (DBG_INIT, "queues from %p to %p", memory, limit);
1572
1573 PRINTD (DBG_CMD, "command queue at %p", memory);
1574
1575 {
1576 command * cmd = memory;
1577 amb_cq * cq = &dev->cq;
1578
1579 cq->pending = 0;
1580 cq->high = 0;
1581 cq->maximum = cmds - 1;
1582
1583 cq->ptrs.start = cmd;
1584 cq->ptrs.in = cmd;
1585 cq->ptrs.out = cmd;
1586 cq->ptrs.limit = cmd + cmds;
1587
1588 memory = cq->ptrs.limit;
1589 }
1590
1591 PRINTD (DBG_TX, "TX queue pair at %p", memory);
1592
1593 {
1594 tx_in * in = memory;
1595 tx_out * out;
1596 amb_txq * txq = &dev->txq;
1597
1598 txq->pending = 0;
1599 txq->high = 0;
1600 txq->filled = 0;
1601 txq->maximum = txs - 1;
1602
1603 txq->in.start = in;
1604 txq->in.ptr = in;
1605 txq->in.limit = in + txs;
1606
1607 memory = txq->in.limit;
1608 out = memory;
1609
1610 txq->out.start = out;
1611 txq->out.ptr = out;
1612 txq->out.limit = out + txs;
1613
1614 memory = txq->out.limit;
1615 }
1616
1617 PRINTD (DBG_RX, "RX queue pairs at %p", memory);
1618
1619 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1620 rx_in * in = memory;
1621 rx_out * out;
1622 amb_rxq * rxq = &dev->rxq[pool];
1623
1624 rxq->buffer_size = rx_buffer_sizes[pool];
1625 rxq->buffers_wanted = 0;
1626
1627 rxq->pending = 0;
1628 rxq->low = rxs[pool] - 1;
1629 rxq->emptied = 0;
1630 rxq->maximum = rxs[pool] - 1;
1631
1632 rxq->in.start = in;
1633 rxq->in.ptr = in;
1634 rxq->in.limit = in + rxs[pool];
1635
1636 memory = rxq->in.limit;
1637 out = memory;
1638
1639 rxq->out.start = out;
1640 rxq->out.ptr = out;
1641 rxq->out.limit = out + rxs[pool];
1642
1643 memory = rxq->out.limit;
1644 }
1645
1646 if (memory == limit) {
1647 return 0;
1648 } else {
1649 PRINTK (KERN_ERR, "bad queue alloc %p != %p (tell maintainer)", memory, limit);
1650 kfree (limit - total);
1651 return -ENOMEM;
1652 }
1653
1654}
1655
1656/********** destruction of communication queues **********/
1657
1658static void destroy_queues (amb_dev * dev) {
1659 // all queues assumed empty
1660 void * memory = dev->cq.ptrs.start;
1661 // includes txq.in, txq.out, rxq[].in and rxq[].out
1662
1663 PRINTD (DBG_FLOW, "destroy_queues %p", dev);
1664
1665 PRINTD (DBG_INIT, "freeing queues at %p", memory);
1666 kfree (memory);
1667
1668 return;
1669}
1670
1671/********** basic loader commands and error handling **********/
1672// centisecond timeouts - guessing away here
1673static unsigned int command_timeouts [] = {
1674 [host_memory_test] = 15,
1675 [read_adapter_memory] = 2,
1676 [write_adapter_memory] = 2,
1677 [adapter_start] = 50,
1678 [get_version_number] = 10,
1679 [interrupt_host] = 1,
1680 [flash_erase_sector] = 1,
1681 [adap_download_block] = 1,
1682 [adap_erase_flash] = 1,
1683 [adap_run_in_iram] = 1,
1684 [adap_end_download] = 1
1685};
1686
1687
1688static unsigned int command_successes [] = {
1689 [host_memory_test] = COMMAND_PASSED_TEST,
1690 [read_adapter_memory] = COMMAND_READ_DATA_OK,
1691 [write_adapter_memory] = COMMAND_WRITE_DATA_OK,
1692 [adapter_start] = COMMAND_COMPLETE,
1693 [get_version_number] = COMMAND_COMPLETE,
1694 [interrupt_host] = COMMAND_COMPLETE,
1695 [flash_erase_sector] = COMMAND_COMPLETE,
1696 [adap_download_block] = COMMAND_COMPLETE,
1697 [adap_erase_flash] = COMMAND_COMPLETE,
1698 [adap_run_in_iram] = COMMAND_COMPLETE,
1699 [adap_end_download] = COMMAND_COMPLETE
1700};
1701
1702static int decode_loader_result (loader_command cmd, u32 result)
1703{
1704 int res;
1705 const char *msg;
1706
1707 if (result == command_successes[cmd])
1708 return 0;
1709
1710 switch (result) {
1711 case BAD_COMMAND:
1712 res = -EINVAL;
1713 msg = "bad command";
1714 break;
1715 case COMMAND_IN_PROGRESS:
1716 res = -ETIMEDOUT;
1717 msg = "command in progress";
1718 break;
1719 case COMMAND_PASSED_TEST:
1720 res = 0;
1721 msg = "command passed test";
1722 break;
1723 case COMMAND_FAILED_TEST:
1724 res = -EIO;
1725 msg = "command failed test";
1726 break;
1727 case COMMAND_READ_DATA_OK:
1728 res = 0;
1729 msg = "command read data ok";
1730 break;
1731 case COMMAND_READ_BAD_ADDRESS:
1732 res = -EINVAL;
1733 msg = "command read bad address";
1734 break;
1735 case COMMAND_WRITE_DATA_OK:
1736 res = 0;
1737 msg = "command write data ok";
1738 break;
1739 case COMMAND_WRITE_BAD_ADDRESS:
1740 res = -EINVAL;
1741 msg = "command write bad address";
1742 break;
1743 case COMMAND_WRITE_FLASH_FAILURE:
1744 res = -EIO;
1745 msg = "command write flash failure";
1746 break;
1747 case COMMAND_COMPLETE:
1748 res = 0;
1749 msg = "command complete";
1750 break;
1751 case COMMAND_FLASH_ERASE_FAILURE:
1752 res = -EIO;
1753 msg = "command flash erase failure";
1754 break;
1755 case COMMAND_WRITE_BAD_DATA:
1756 res = -EINVAL;
1757 msg = "command write bad data";
1758 break;
1759 default:
1760 res = -EINVAL;
1761 msg = "unknown error";
1762 PRINTD (DBG_LOAD|DBG_ERR,
1763 "decode_loader_result got %d=%x !",
1764 result, result);
1765 break;
1766 }
1767
1768 PRINTK (KERN_ERR, "%s", msg);
1769 return res;
1770}
1771
1772static int __devinit do_loader_command (volatile loader_block * lb,
1773 const amb_dev * dev, loader_command cmd) {
1774
1775 unsigned long timeout;
1776
1777 PRINTD (DBG_FLOW|DBG_LOAD, "do_loader_command");
1778
1779 /* do a command
1780
1781 Set the return value to zero, set the command type and set the
1782 valid entry to the right magic value. The payload is already
1783 correctly byte-ordered so we leave it alone. Hit the doorbell
1784 with the bus address of this structure.
1785
1786 */
1787
1788 lb->result = 0;
1789 lb->command = cpu_to_be32 (cmd);
1790 lb->valid = cpu_to_be32 (DMA_VALID);
1791 // dump_registers (dev);
1792 // dump_loader_block (lb);
1793 wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (lb) & ~onegigmask);
1794
1795 timeout = command_timeouts[cmd] * 10;
1796
1797 while (!lb->result || lb->result == cpu_to_be32 (COMMAND_IN_PROGRESS))
1798 if (timeout) {
1799 timeout = msleep_interruptible(timeout);
1800 } else {
1801 PRINTD (DBG_LOAD|DBG_ERR, "command %d timed out", cmd);
1802 dump_registers (dev);
1803 dump_loader_block (lb);
1804 return -ETIMEDOUT;
1805 }
1806
1807 if (cmd == adapter_start) {
1808 // wait for start command to acknowledge...
1809 timeout = 100;
1810 while (rd_plain (dev, offsetof(amb_mem, doorbell)))
1811 if (timeout) {
1812 timeout = msleep_interruptible(timeout);
1813 } else {
1814 PRINTD (DBG_LOAD|DBG_ERR, "start command did not clear doorbell, res=%08x",
1815 be32_to_cpu (lb->result));
1816 dump_registers (dev);
1817 return -ETIMEDOUT;
1818 }
1819 return 0;
1820 } else {
1821 return decode_loader_result (cmd, be32_to_cpu (lb->result));
1822 }
1823
1824}
1825
1826/* loader: determine loader version */
1827
1828static int __devinit get_loader_version (loader_block * lb,
1829 const amb_dev * dev, u32 * version) {
1830 int res;
1831
1832 PRINTD (DBG_FLOW|DBG_LOAD, "get_loader_version");
1833
1834 res = do_loader_command (lb, dev, get_version_number);
1835 if (res)
1836 return res;
1837 if (version)
1838 *version = be32_to_cpu (lb->payload.version);
1839 return 0;
1840}
1841
1842/* loader: write memory data blocks */
1843
1844static int __devinit loader_write (loader_block * lb,
1845 const amb_dev * dev, const u32 * data,
1846 u32 address, unsigned int count) {
1847 unsigned int i;
1848 transfer_block * tb = &lb->payload.transfer;
1849
1850 PRINTD (DBG_FLOW|DBG_LOAD, "loader_write");
1851
1852 if (count > MAX_TRANSFER_DATA)
1853 return -EINVAL;
1854 tb->address = cpu_to_be32 (address);
1855 tb->count = cpu_to_be32 (count);
1856 for (i = 0; i < count; ++i)
1857 tb->data[i] = cpu_to_be32 (data[i]);
1858 return do_loader_command (lb, dev, write_adapter_memory);
1859}
1860
1861/* loader: verify memory data blocks */
1862
1863static int __devinit loader_verify (loader_block * lb,
1864 const amb_dev * dev, const u32 * data,
1865 u32 address, unsigned int count) {
1866 unsigned int i;
1867 transfer_block * tb = &lb->payload.transfer;
1868 int res;
1869
1870 PRINTD (DBG_FLOW|DBG_LOAD, "loader_verify");
1871
1872 if (count > MAX_TRANSFER_DATA)
1873 return -EINVAL;
1874 tb->address = cpu_to_be32 (address);
1875 tb->count = cpu_to_be32 (count);
1876 res = do_loader_command (lb, dev, read_adapter_memory);
1877 if (!res)
1878 for (i = 0; i < count; ++i)
1879 if (tb->data[i] != cpu_to_be32 (data[i])) {
1880 res = -EINVAL;
1881 break;
1882 }
1883 return res;
1884}
1885
1886/* loader: start microcode */
1887
1888static int __devinit loader_start (loader_block * lb,
1889 const amb_dev * dev, u32 address) {
1890 PRINTD (DBG_FLOW|DBG_LOAD, "loader_start");
1891
1892 lb->payload.start = cpu_to_be32 (address);
1893 return do_loader_command (lb, dev, adapter_start);
1894}
1895
1896/********** reset card **********/
1897
1898static inline void sf (const char * msg)
1899{
1900 PRINTK (KERN_ERR, "self-test failed: %s", msg);
1901}
1902
1903static int amb_reset (amb_dev * dev, int diags) {
1904 u32 word;
1905
1906 PRINTD (DBG_FLOW|DBG_LOAD, "amb_reset");
1907
1908 word = rd_plain (dev, offsetof(amb_mem, reset_control));
1909 // put card into reset state
1910 wr_plain (dev, offsetof(amb_mem, reset_control), word | AMB_RESET_BITS);
1911 // wait a short while
1912 udelay (10);
1913#if 1
1914 // put card into known good state
1915 wr_plain (dev, offsetof(amb_mem, interrupt_control), AMB_DOORBELL_BITS);
1916 // clear all interrupts just in case
1917 wr_plain (dev, offsetof(amb_mem, interrupt), -1);
1918#endif
1919 // clear self-test done flag
1920 wr_plain (dev, offsetof(amb_mem, mb.loader.ready), 0);
1921 // take card out of reset state
1922 wr_plain (dev, offsetof(amb_mem, reset_control), word &~ AMB_RESET_BITS);
1923
1924 if (diags) {
1925 unsigned long timeout;
1926 // 4.2 second wait
1927 msleep(4200);
1928 // half second time-out
1929 timeout = 500;
1930 while (!rd_plain (dev, offsetof(amb_mem, mb.loader.ready)))
1931 if (timeout) {
1932 timeout = msleep_interruptible(timeout);
1933 } else {
1934 PRINTD (DBG_LOAD|DBG_ERR, "reset timed out");
1935 return -ETIMEDOUT;
1936 }
1937
1938 // get results of self-test
1939 // XXX double check byte-order
1940 word = rd_mem (dev, offsetof(amb_mem, mb.loader.result));
1941 if (word & SELF_TEST_FAILURE) {
1942 if (word & GPINT_TST_FAILURE)
1943 sf ("interrupt");
1944 if (word & SUNI_DATA_PATTERN_FAILURE)
1945 sf ("SUNI data pattern");
1946 if (word & SUNI_DATA_BITS_FAILURE)
1947 sf ("SUNI data bits");
1948 if (word & SUNI_UTOPIA_FAILURE)
1949 sf ("SUNI UTOPIA interface");
1950 if (word & SUNI_FIFO_FAILURE)
1951 sf ("SUNI cell buffer FIFO");
1952 if (word & SRAM_FAILURE)
1953 sf ("bad SRAM");
1954 // better return value?
1955 return -EIO;
1956 }
1957
1958 }
1959 return 0;
1960}
1961
1962/********** transfer and start the microcode **********/
1963
1964static int __devinit ucode_init (loader_block * lb, amb_dev * dev) {
1965 unsigned int i = 0;
1966 unsigned int total = 0;
1967 const u32 * pointer = ucode_data;
1968 u32 address;
1969 unsigned int count;
1970 int res;
1971
1972 PRINTD (DBG_FLOW|DBG_LOAD, "ucode_init");
1973
1974 while (address = ucode_regions[i].start,
1975 count = ucode_regions[i].count) {
1976 PRINTD (DBG_LOAD, "starting region (%x, %u)", address, count);
1977 while (count) {
1978 unsigned int words;
1979 if (count <= MAX_TRANSFER_DATA)
1980 words = count;
1981 else
1982 words = MAX_TRANSFER_DATA;
1983 total += words;
1984 res = loader_write (lb, dev, pointer, address, words);
1985 if (res)
1986 return res;
1987 res = loader_verify (lb, dev, pointer, address, words);
1988 if (res)
1989 return res;
1990 count -= words;
1991 address += sizeof(u32) * words;
1992 pointer += words;
1993 }
1994 i += 1;
1995 }
1996 if (*pointer == 0xdeadbeef) {
1997 return loader_start (lb, dev, ucode_start);
1998 } else {
1999 // cast needed as there is no %? for pointer differnces
2000 PRINTD (DBG_LOAD|DBG_ERR,
2001 "offset=%li, *pointer=%x, address=%x, total=%u",
2002 (long) (pointer - ucode_data), *pointer, address, total);
2003 PRINTK (KERN_ERR, "incorrect microcode data");
2004 return -ENOMEM;
2005 }
2006}
2007
2008/********** give adapter parameters **********/
2009
2010static inline __be32 bus_addr(void * addr) {
2011 return cpu_to_be32 (virt_to_bus (addr));
2012}
2013
2014static int __devinit amb_talk (amb_dev * dev) {
2015 adap_talk_block a;
2016 unsigned char pool;
2017 unsigned long timeout;
2018
2019 PRINTD (DBG_FLOW, "amb_talk %p", dev);
2020
2021 a.command_start = bus_addr (dev->cq.ptrs.start);
2022 a.command_end = bus_addr (dev->cq.ptrs.limit);
2023 a.tx_start = bus_addr (dev->txq.in.start);
2024 a.tx_end = bus_addr (dev->txq.in.limit);
2025 a.txcom_start = bus_addr (dev->txq.out.start);
2026 a.txcom_end = bus_addr (dev->txq.out.limit);
2027
2028 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
2029 // the other "a" items are set up by the adapter
2030 a.rec_struct[pool].buffer_start = bus_addr (dev->rxq[pool].in.start);
2031 a.rec_struct[pool].buffer_end = bus_addr (dev->rxq[pool].in.limit);
2032 a.rec_struct[pool].rx_start = bus_addr (dev->rxq[pool].out.start);
2033 a.rec_struct[pool].rx_end = bus_addr (dev->rxq[pool].out.limit);
2034 a.rec_struct[pool].buffer_size = cpu_to_be32 (dev->rxq[pool].buffer_size);
2035 }
2036
2037#ifdef AMB_NEW_MICROCODE
2038 // disable fast PLX prefetching
2039 a.init_flags = 0;
2040#endif
2041
2042 // pass the structure
2043 wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (&a));
2044
2045 // 2.2 second wait (must not touch doorbell during 2 second DMA test)
2046 msleep(2200);
2047 // give the adapter another half second?
2048 timeout = 500;
2049 while (rd_plain (dev, offsetof(amb_mem, doorbell)))
2050 if (timeout) {
2051 timeout = msleep_interruptible(timeout);
2052 } else {
2053 PRINTD (DBG_INIT|DBG_ERR, "adapter init timed out");
2054 return -ETIMEDOUT;
2055 }
2056
2057 return 0;
2058}
2059
2060// get microcode version
2061static void __devinit amb_ucode_version (amb_dev * dev) {
2062 u32 major;
2063 u32 minor;
2064 command cmd;
2065 cmd.request = cpu_to_be32 (SRB_GET_VERSION);
2066 while (command_do (dev, &cmd)) {
2067 set_current_state(TASK_UNINTERRUPTIBLE);
2068 schedule();
2069 }
2070 major = be32_to_cpu (cmd.args.version.major);
2071 minor = be32_to_cpu (cmd.args.version.minor);
2072 PRINTK (KERN_INFO, "microcode version is %u.%u", major, minor);
2073}
2074
2075// swap bits within byte to get Ethernet ordering
2076static u8 bit_swap (u8 byte)
2077{
2078 const u8 swap[] = {
2079 0x0, 0x8, 0x4, 0xc,
2080 0x2, 0xa, 0x6, 0xe,
2081 0x1, 0x9, 0x5, 0xd,
2082 0x3, 0xb, 0x7, 0xf
2083 };
2084 return ((swap[byte & 0xf]<<4) | swap[byte>>4]);
2085}
2086
2087// get end station address
2088static void __devinit amb_esi (amb_dev * dev, u8 * esi) {
2089 u32 lower4;
2090 u16 upper2;
2091 command cmd;
2092
2093 cmd.request = cpu_to_be32 (SRB_GET_BIA);
2094 while (command_do (dev, &cmd)) {
2095 set_current_state(TASK_UNINTERRUPTIBLE);
2096 schedule();
2097 }
2098 lower4 = be32_to_cpu (cmd.args.bia.lower4);
2099 upper2 = be32_to_cpu (cmd.args.bia.upper2);
2100 PRINTD (DBG_LOAD, "BIA: lower4: %08x, upper2 %04x", lower4, upper2);
2101
2102 if (esi) {
2103 unsigned int i;
2104
2105 PRINTDB (DBG_INIT, "ESI:");
2106 for (i = 0; i < ESI_LEN; ++i) {
2107 if (i < 4)
2108 esi[i] = bit_swap (lower4>>(8*i));
2109 else
2110 esi[i] = bit_swap (upper2>>(8*(i-4)));
2111 PRINTDM (DBG_INIT, " %02x", esi[i]);
2112 }
2113
2114 PRINTDE (DBG_INIT, "");
2115 }
2116
2117 return;
2118}
2119
2120static void fixup_plx_window (amb_dev *dev, loader_block *lb)
2121{
2122 // fix up the PLX-mapped window base address to match the block
2123 unsigned long blb;
2124 u32 mapreg;
2125 blb = virt_to_bus(lb);
2126 // the kernel stack had better not ever cross a 1Gb boundary!
2127 mapreg = rd_plain (dev, offsetof(amb_mem, stuff[10]));
2128 mapreg &= ~onegigmask;
2129 mapreg |= blb & onegigmask;
2130 wr_plain (dev, offsetof(amb_mem, stuff[10]), mapreg);
2131 return;
2132}
2133
2134static int __devinit amb_init (amb_dev * dev)
2135{
2136 loader_block lb;
2137
2138 u32 version;
2139
2140 if (amb_reset (dev, 1)) {
2141 PRINTK (KERN_ERR, "card reset failed!");
2142 } else {
2143 fixup_plx_window (dev, &lb);
2144
2145 if (get_loader_version (&lb, dev, &version)) {
2146 PRINTK (KERN_INFO, "failed to get loader version");
2147 } else {
2148 PRINTK (KERN_INFO, "loader version is %08x", version);
2149
2150 if (ucode_init (&lb, dev)) {
2151 PRINTK (KERN_ERR, "microcode failure");
2152 } else if (create_queues (dev, cmds, txs, rxs, rxs_bs)) {
2153 PRINTK (KERN_ERR, "failed to get memory for queues");
2154 } else {
2155
2156 if (amb_talk (dev)) {
2157 PRINTK (KERN_ERR, "adapter did not accept queues");
2158 } else {
2159
2160 amb_ucode_version (dev);
2161 return 0;
2162
2163 } /* amb_talk */
2164
2165 destroy_queues (dev);
2166 } /* create_queues, ucode_init */
2167
2168 amb_reset (dev, 0);
2169 } /* get_loader_version */
2170
2171 } /* amb_reset */
2172
2173 return -EINVAL;
2174}
2175
2176static void setup_dev(amb_dev *dev, struct pci_dev *pci_dev)
2177{
2178 unsigned char pool;
2179 memset (dev, 0, sizeof(amb_dev));
2180
2181 // set up known dev items straight away
2182 dev->pci_dev = pci_dev;
2183 pci_set_drvdata(pci_dev, dev);
2184
2185 dev->iobase = pci_resource_start (pci_dev, 1);
2186 dev->irq = pci_dev->irq;
2187 dev->membase = bus_to_virt(pci_resource_start(pci_dev, 0));
2188
2189 // flags (currently only dead)
2190 dev->flags = 0;
2191
2192 // Allocate cell rates (fibre)
2193 // ATM_OC3_PCR = 1555200000/8/270*260/53 - 29/53
2194 // to be really pedantic, this should be ATM_OC3c_PCR
2195 dev->tx_avail = ATM_OC3_PCR;
2196 dev->rx_avail = ATM_OC3_PCR;
2197
2198#ifdef FILL_RX_POOLS_IN_BH
2199 // initialise bottom half
2200 INIT_WORK(&dev->bh, (void (*)(void *)) fill_rx_pools, dev);
2201#endif
2202
2203 // semaphore for txer/rxer modifications - we cannot use a
2204 // spinlock as the critical region needs to switch processes
2205 init_MUTEX (&dev->vcc_sf);
2206 // queue manipulation spinlocks; we want atomic reads and
2207 // writes to the queue descriptors (handles IRQ and SMP)
2208 // consider replacing "int pending" -> "atomic_t available"
2209 // => problem related to who gets to move queue pointers
2210 spin_lock_init (&dev->cq.lock);
2211 spin_lock_init (&dev->txq.lock);
2212 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2213 spin_lock_init (&dev->rxq[pool].lock);
2214}
2215
2216static void setup_pci_dev(struct pci_dev *pci_dev)
2217{
2218 unsigned char lat;
2219
2220 // enable bus master accesses
2221 pci_set_master(pci_dev);
2222
2223 // frobnicate latency (upwards, usually)
2224 pci_read_config_byte (pci_dev, PCI_LATENCY_TIMER, &lat);
2225
2226 if (!pci_lat)
2227 pci_lat = (lat < MIN_PCI_LATENCY) ? MIN_PCI_LATENCY : lat;
2228
2229 if (lat != pci_lat) {
2230 PRINTK (KERN_INFO, "Changing PCI latency timer from %hu to %hu",
2231 lat, pci_lat);
2232 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, pci_lat);
2233 }
2234}
2235
2236static int __devinit amb_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_ent)
2237{
2238 amb_dev * dev;
2239 int err;
2240 unsigned int irq;
2241
2242 err = pci_enable_device(pci_dev);
2243 if (err < 0) {
2244 PRINTK (KERN_ERR, "skipped broken (PLX rev 2) card");
2245 goto out;
2246 }
2247
2248 // read resources from PCI configuration space
2249 irq = pci_dev->irq;
2250
2251 if (pci_dev->device == PCI_DEVICE_ID_MADGE_AMBASSADOR_BAD) {
2252 PRINTK (KERN_ERR, "skipped broken (PLX rev 2) card");
2253 err = -EINVAL;
2254 goto out_disable;
2255 }
2256
2257 PRINTD (DBG_INFO, "found Madge ATM adapter (amb) at"
2258 " IO %lx, IRQ %u, MEM %p", pci_resource_start(pci_dev, 1),
2259 irq, bus_to_virt(pci_resource_start(pci_dev, 0)));
2260
2261 // check IO region
2262 err = pci_request_region(pci_dev, 1, DEV_LABEL);
2263 if (err < 0) {
2264 PRINTK (KERN_ERR, "IO range already in use!");
2265 goto out_disable;
2266 }
2267
2268 dev = kmalloc (sizeof(amb_dev), GFP_KERNEL);
2269 if (!dev) {
2270 PRINTK (KERN_ERR, "out of memory!");
2271 err = -ENOMEM;
2272 goto out_release;
2273 }
2274
2275 setup_dev(dev, pci_dev);
2276
2277 err = amb_init(dev);
2278 if (err < 0) {
2279 PRINTK (KERN_ERR, "adapter initialisation failure");
2280 goto out_free;
2281 }
2282
2283 setup_pci_dev(pci_dev);
2284
2285 // grab (but share) IRQ and install handler
2286 err = request_irq(irq, interrupt_handler, SA_SHIRQ, DEV_LABEL, dev);
2287 if (err < 0) {
2288 PRINTK (KERN_ERR, "request IRQ failed!");
2289 goto out_reset;
2290 }
2291
2292 dev->atm_dev = atm_dev_register (DEV_LABEL, &amb_ops, -1, NULL);
2293 if (!dev->atm_dev) {
2294 PRINTD (DBG_ERR, "failed to register Madge ATM adapter");
2295 err = -EINVAL;
2296 goto out_free_irq;
2297 }
2298
2299 PRINTD (DBG_INFO, "registered Madge ATM adapter (no. %d) (%p) at %p",
2300 dev->atm_dev->number, dev, dev->atm_dev);
2301 dev->atm_dev->dev_data = (void *) dev;
2302
2303 // register our address
2304 amb_esi (dev, dev->atm_dev->esi);
2305
2306 // 0 bits for vpi, 10 bits for vci
2307 dev->atm_dev->ci_range.vpi_bits = NUM_VPI_BITS;
2308 dev->atm_dev->ci_range.vci_bits = NUM_VCI_BITS;
2309
2310 init_timer(&dev->housekeeping);
2311 dev->housekeeping.function = do_housekeeping;
2312 dev->housekeeping.data = (unsigned long) dev;
2313 mod_timer(&dev->housekeeping, jiffies);
2314
2315 // enable host interrupts
2316 interrupts_on (dev);
2317
2318out:
2319 return err;
2320
2321out_free_irq:
2322 free_irq(irq, dev);
2323out_reset:
2324 amb_reset(dev, 0);
2325out_free:
2326 kfree(dev);
2327out_release:
2328 pci_release_region(pci_dev, 1);
2329out_disable:
2330 pci_disable_device(pci_dev);
2331 goto out;
2332}
2333
2334
2335static void __devexit amb_remove_one(struct pci_dev *pci_dev)
2336{
2337 struct amb_dev *dev;
2338
2339 dev = pci_get_drvdata(pci_dev);
2340
2341 PRINTD(DBG_INFO|DBG_INIT, "closing %p (atm_dev = %p)", dev, dev->atm_dev);
2342 del_timer_sync(&dev->housekeeping);
2343 // the drain should not be necessary
2344 drain_rx_pools(dev);
2345 interrupts_off(dev);
2346 amb_reset(dev, 0);
2347 free_irq(dev->irq, dev);
2348 pci_disable_device(pci_dev);
2349 destroy_queues(dev);
2350 atm_dev_deregister(dev->atm_dev);
2351 kfree(dev);
2352 pci_release_region(pci_dev, 1);
2353}
2354
2355static void __init amb_check_args (void) {
2356 unsigned char pool;
2357 unsigned int max_rx_size;
2358
2359#ifdef DEBUG_AMBASSADOR
2360 PRINTK (KERN_NOTICE, "debug bitmap is %hx", debug &= DBG_MASK);
2361#else
2362 if (debug)
2363 PRINTK (KERN_NOTICE, "no debugging support");
2364#endif
2365
2366 if (cmds < MIN_QUEUE_SIZE)
2367 PRINTK (KERN_NOTICE, "cmds has been raised to %u",
2368 cmds = MIN_QUEUE_SIZE);
2369
2370 if (txs < MIN_QUEUE_SIZE)
2371 PRINTK (KERN_NOTICE, "txs has been raised to %u",
2372 txs = MIN_QUEUE_SIZE);
2373
2374 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2375 if (rxs[pool] < MIN_QUEUE_SIZE)
2376 PRINTK (KERN_NOTICE, "rxs[%hu] has been raised to %u",
2377 pool, rxs[pool] = MIN_QUEUE_SIZE);
2378
2379 // buffers sizes should be greater than zero and strictly increasing
2380 max_rx_size = 0;
2381 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2382 if (rxs_bs[pool] <= max_rx_size)
2383 PRINTK (KERN_NOTICE, "useless pool (rxs_bs[%hu] = %u)",
2384 pool, rxs_bs[pool]);
2385 else
2386 max_rx_size = rxs_bs[pool];
2387
2388 if (rx_lats < MIN_RX_BUFFERS)
2389 PRINTK (KERN_NOTICE, "rx_lats has been raised to %u",
2390 rx_lats = MIN_RX_BUFFERS);
2391
2392 return;
2393}
2394
2395/********** module stuff **********/
2396
2397MODULE_AUTHOR(maintainer_string);
2398MODULE_DESCRIPTION(description_string);
2399MODULE_LICENSE("GPL");
2400module_param(debug, ushort, 0644);
2401module_param(cmds, uint, 0);
2402module_param(txs, uint, 0);
2403module_param_array(rxs, uint, NULL, 0);
2404module_param_array(rxs_bs, uint, NULL, 0);
2405module_param(rx_lats, uint, 0);
2406module_param(pci_lat, byte, 0);
2407MODULE_PARM_DESC(debug, "debug bitmap, see .h file");
2408MODULE_PARM_DESC(cmds, "number of command queue entries");
2409MODULE_PARM_DESC(txs, "number of TX queue entries");
2410MODULE_PARM_DESC(rxs, "number of RX queue entries [" __MODULE_STRING(NUM_RX_POOLS) "]");
2411MODULE_PARM_DESC(rxs_bs, "size of RX buffers [" __MODULE_STRING(NUM_RX_POOLS) "]");
2412MODULE_PARM_DESC(rx_lats, "number of extra buffers to cope with RX latencies");
2413MODULE_PARM_DESC(pci_lat, "PCI latency in bus cycles");
2414
2415/********** module entry **********/
2416
2417static struct pci_device_id amb_pci_tbl[] = {
2418 { PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR, PCI_ANY_ID, PCI_ANY_ID,
2419 0, 0, 0 },
2420 { PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR_BAD, PCI_ANY_ID, PCI_ANY_ID,
2421 0, 0, 0 },
2422 { 0, }
2423};
2424
2425MODULE_DEVICE_TABLE(pci, amb_pci_tbl);
2426
2427static struct pci_driver amb_driver = {
2428 .name = "amb",
2429 .probe = amb_probe,
2430 .remove = __devexit_p(amb_remove_one),
2431 .id_table = amb_pci_tbl,
2432};
2433
2434static int __init amb_module_init (void)
2435{
2436 PRINTD (DBG_FLOW|DBG_INIT, "init_module");
2437
2438 // sanity check - cast needed as printk does not support %Zu
2439 if (sizeof(amb_mem) != 4*16 + 4*12) {
2440 PRINTK (KERN_ERR, "Fix amb_mem (is %lu words).",
2441 (unsigned long) sizeof(amb_mem));
2442 return -ENOMEM;
2443 }
2444
2445 show_version();
2446
2447 amb_check_args();
2448
2449 // get the juice
2450 return pci_register_driver(&amb_driver);
2451}
2452
2453/********** module exit **********/
2454
2455static void __exit amb_module_exit (void)
2456{
2457 PRINTD (DBG_FLOW|DBG_INIT, "cleanup_module");
2458
2459 return pci_unregister_driver(&amb_driver);
2460}
2461
2462module_init(amb_module_init);
2463module_exit(amb_module_exit);